Multi-module Hashing System for SHA-3 & FPGA Integration

Hash functions are crucial cryptographic primitives and are widely used in security protocols. Up to now SHA-2 is the proposed NIST standard for hash functions, but is going to be substituted by the end of the next year. NIST is holding up a public competition to select a new hash algorithm(s), called SHA-3 (Secure Hash Algorithm Version 3), for the purpose of completely superseding the functions of the SHA-2 family. The four finalists have been selected by NIST, and a year is allocated for the public review of these algorithms. BLAKE hash functions family is one of the most promising finalists. A multi-module hashing system for this hash functions family, and the FPGA integration of it, are proposed in this work. The introduced system supports a multi-module operation in the sense that upon to the users selection performs efficiently for all hash functions of BLAKE family: -28, -32, -48, -64. The proposed multi-module system is compared with the stand alone implementations of each of the hash functions, integrated in separate FPGA devices. Comparisons with previously published related works are also presented, in order to have a fair and detailed evaluation of the proposed design methodology. Compared with them, the proposed multi-module system performs with higher operation frequency and allocates less silicon area resources. Finally, the proposed performs better, compared with other ones, in the term of throughput on a range of 100% to 500% and better at about 50%, compared with area-delay product factor.