Impact of substrate bias on GIDL for thin-BOX ETSOI devices

We present a detailed analysis of substrate bias (V
_bb
) impact on gate induced drain leakage (GIDL) for thin-BOX extremely thin silicon-on-insulator (ETSOI) with BOX thickness (T
_BOX
) ranging from 10 to 50 nm and inversion layer thicknesses (T
_INV
) ranging from 1.1 to 1.3 nm. The GIDL behavior for thin-BOX under various substrate biases (V
_bb
) and partially depleted SOI (PDSOI) devices with different body doping are compared.