Design and simulation of a lumped element metal finger capacitor for RF-CMOS power splitters

Design, development and simulation results of an interdigitated metal-fingers capacitors in 0.18μm RF-CMOS technology that are exploiting both lateral and vertical metal-metal capacitances are presented. Two RF-CMOS capacitors are designed specifically for applications in a 2.45GHz power splitter circuit. Five metal RF-CMOS layers are used to design two capacitors of 1.39pF and 2.2pF, consisting of 101 and 105 metal fingers respectively. The real impedance obtained at the input is Z
₁
= 35.04Ω and Z
₂
= 39.73Ω, while the insertion loss is S
₂₁
= 2.47dB. Return loss S
₁₁
and S
₂₂
are simulated as 4.042dB and 4.047dB respectively. Phase measurements of 110.9° and 101.2° are obtained for the input and output ports, indicating that the phase shift is not degraded too much due to the capacitor.