Abstract:
Integrated circuit process technology is entering the ultra deep submicron era. At this level, interconnect structure becomes very stiff and the metal resistance shieldin...Show MoreMetadata
Abstract:
Integrated circuit process technology is entering the ultra deep submicron era. At this level, interconnect structure becomes very stiff and the metal resistance shielding effects problem is more serious. Although several delay metrics have been proposed, they are inefficient and difficult to implement. Hence, we propose a new delay and slew metric for interconnect based on Beta distribution and which does not require a look-up table to be built. Our metrics are efficient and easy to implement; the overall standard deviation and error mean are smaller than in previous works.
Date of Conference: 08-12 March 2010
Date Added to IEEE Xplore: 29 April 2010
ISBN Information: