A 622 Mb/s line terminator for the ATM network

A line terminator (LT) that implements the physical layer of the asynchronous transfer mode (ATM) network for cell-based interface according to CCITT Recommendation I.4321 is described. This circuit is for use in Research for Advanced Communications in the European (RACE) 1022 ATM technology test bed. The LT transmits cells from a standard parallel ATM interface (SAI) to the serial line and from the serial line to the SAI. CCITT bit rates of 622.08 Mb/s and 155.52 Mb/s are supported. The LT module implements the entire physical layer of the ATM standard, except operations and maintenance information and the medium-dependent functions. The LT is composed of the LTS die, implementing the physical medium sublayer, and the LTP die implementing the transmission convergence sublayer. The attributes of the LT implementation are the high level of integration provided and the high operating speeds.<
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