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On-Chip Interconnect Networks at the End of the Roadmap: Limits and Nanotechnology Opportunities | IEEE Conference Publication | IEEE Xplore

On-Chip Interconnect Networks at the End of the Roadmap: Limits and Nanotechnology Opportunities


Abstract:

Physical models are presented for single- and multi-wall carbon nanotubes. The models are used to quantify the performance enhancements that they can potentially offer if...Show More

Abstract:

Physical models are presented for single- and multi-wall carbon nanotubes. The models are used to quantify the performance enhancements that they can potentially offer if used as interconnects in GSI chips. For short lengths, mono-layer SWCN interconnects can lower capacitance by 50% whereas for long lengths SWCN-bundles can improve conductivity up to 100%. Conductivity of MWCNs increases with diameter if they are longer than a critical length of about 7 mum and decreases otherwise
Date of Conference: 05-07 June 2006
Date Added to IEEE Xplore: 05 July 2006
Print ISBN:1-4244-0104-6

ISSN Information:

Conference Location: Burlingame, CA, USA

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References

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