A 1 V 1.1 GHz CMOS integrated receiver front-end

This work describes the design of a 1 V 1.1 GHz CMOS integrated receiver front-end. The receiver consists of a transconductance low noise amplifier (LNA) and a current mode down conversion mixer powered by a 1 V supply. The receiver was fabricated and measured using an AMS/spl reg/ 0.35 /spl mu/m CMOS technology. The total measured noise figure is equal to 11.77 dB and the input-referred third-order intercept point (IIP/sub 3/) is equal to 2 dBm. Moreover, the overall power gain of the receiver is equal to 7 dB.