A 2.3Gb/s fully integrated and synthesizable AES Rijndael core

The growth of the Internet as a vehicle for secure communication and electronic commerce has brought cryptographic processing performance to the forefront of high throughput system design. This trend will gain further momentum with the widespread adoption of secure protocols such as secure IP (IPSEC) and virtual private networks (VPNs). In this paper, we present a fully integrated and synthesizable cipher core supporting the advanced encryption standard - Rijndael. We designed and fabricated the fully integrated core $key scheduler, encipher, and decipher using TSMC 0.18 /spl mu/m technology. The core operating frequency is 465 MHz and throughput is 2.3 Gb/s.