A 10 Gb/s decision circuit using AlGaAs/GaAs HBT technology

A decision circuit (DEC) that operates at speeds above 10 Gb/s and utilizes self-aligned AlGaAs/GaAs HBT (heterostructure-bipolar-transistor) technology is described. A DEC consists of a preamplifier, an internal buffer, a D-latch, and an output buffer. In a conventional DEC without an internal buffer, the output level of the high-gain amplifier does not match the logic level of the D-latch. This problem is particularly acute for AlGaAs/GaAs HBT devices because of the dependence of f/sub T/ on V/sub ce/. To overcome this problem, an internal buffer constructed with an emitter-coupled-logic (ECL) gate has been inserted to adjust the amplifier output level to the logic level of the D-latch. The D-latch uses an ECL series-gating technique. The logic swing is 500 mV to enhance speed. The output buffer consists of a differential circuit and is capable of driving 50 loads with 1 V using open-collector circuitry. The reference voltage was generated on the chip. The power consumption is 750 mW with 7.0-V supply.<
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