# IEEE Transactions on Circuits and Systems I: Regular Papers

Includes the top 50 most frequently accessed documents for this publication according to the usage statistics for the month of

• ### A Low-Power NB-IoT Transceiver With Digital-Polar Transmitter in 180-nm CMOS

Publication Year: 2017, Page(s):2569 - 2581
| | PDF (4584 KB) | HTML

A fully integrated 750~960 MHz wireless transceiver (TRX) is presented for single-tone NB-IoT applications. Effective design methodologies and techniques, from the system level to circuit level, are proposed to address various design challenges while achieving low-power consumption. The TRX consists of a low-IF receiver with 180-kHz signal bandwidth, a digital polar transmitter with 3.75-kHz signa... View full abstract»

• ### Time Domain Processing Techniques Using Ring Oscillator-Based Filter Structures

Publication Year: 2017, Page(s):3003 - 3012
| | PDF (2197 KB) | HTML

The ability to process time-encoded signals with high fidelity is becoming increasingly important for the time domain (TD) circuit techniques that are used at the advanced nanometer technology nodes. This paper proposes a compact oscillator-based subsystem that performs precise filtering of asynchronous pulse-width modulation encoded signals and makes extensive use of digital logic, enabling low-v... View full abstract»

• ### Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures

Publication Year: 2008, Page(s):1441 - 1454
Cited by:  Papers (99)  |  Patents (1)
| | PDF (1188 KB) | HTML

The need for highly integrable and programmable analog-to-digital converters (ADCs) is pushing towards the use of dynamic regenerative comparators to maximize speed, power efficiency and reconfigurability. Comparator thermal noise is, however, a limiting factor for the achievable resolution of several ADC architectures with scaled supply voltages. While mismatch in these comparators can be compens... View full abstract»

• ### Picowatt, 0.45–0.6 V Self-Biased Subthreshold CMOS Voltage Reference

Publication Year: 2017, Page(s):3036 - 3046
| | PDF (2408 KB) | HTML

In this paper, a self-biased temperature-compensated CMOS voltage reference operating at picowatt-level power consumption is presented. The core of the proposed circuit is the self-cascode MOSFET (SCM) and two variants are explored: a self-biased SCM (SBSCM) and a self-biased NMOS (SBNMOS) voltage reference. Power consumption and silicon area are remarkably reduced by combining subthreshold operat... View full abstract»

• ### Design of Millimeter-Wave CMOS Radios: A Tutorial

Publication Year: 2009, Page(s):4 - 16
Cited by:  Papers (90)  |  Patents (1)
| | PDF (806 KB) | HTML

This paper deals with the challenges in the design of millimeter-wave CMOS radios and describes circuit and architecture techniques that lead to compact, low-power transceivers. Candidate topologies for building blocks such as low-noise amplifiers, mixers, oscillators, and frequency dividers are presented. Also, a number of radio architectures that relax the generation, division, and distribution ... View full abstract»

• ### A 0.016 mm2 12 b $Delta Sigma$ SAR With 14 fJ/conv. for Ultra Low Power Biosensor Arrays

Publication Year: 2017, Page(s):2655 - 2665
| | PDF (3342 KB) | HTML

The instrumentation systems for implantable brain- machine interfaces represent one of the most demanding applications for ultra low-power analogue-to-digital-converters (ADC) to date. To address this challenge, this paper proposes a ΔΣSAR topology for very large sensor arrays that allows an exceptional reduction in silicon footprint by using a continuous time 0-2MASH topology. This ... View full abstract»

• ### The flipped voltage follower: a useful cell for low-voltage low-power circuit design

Publication Year: 2005, Page(s):1276 - 1291
Cited by:  Papers (240)  |  Patents (2)
| | PDF (1168 KB) | HTML

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits ... View full abstract»

• ### Ultra-Low Power, Secure IoT Platform for Predicting Cardiovascular Diseases

Publication Year: 2017, Page(s):2624 - 2637
| | PDF (2896 KB) | HTML

Internet of Things (IoT) promises to revolutionize the health-care sector through remote, continuous, and non-invasive monitoring of patients. However, there are two main challenges faced by the IoT-enabled medical devices: energy-efficiency and security/privacy concerns. Researchers have independently attempted to develop solutions, such as low-power ECG-processors and security protocols, that ad... View full abstract»

• ### A Lightweight Masked AES Implementation for Securing IoT Against CPA Attacks

Publication Year: 2017, Page(s):2934 - 2944
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A false key-based advanced encryption standard (AES) technique is proposed to prevent the stored secret key leaking from the substitution-box under correlation power analysis (CPA) attacks without significant power and area overhead. Wave dynamic differential logic (WDDL)-based XOR gates are utilized during the reconstruction stage to hide the intermediate data that may be highly correlated with t... View full abstract»

• ### Full On-Chip CMOS Low-Dropout Voltage Regulator

Publication Year: 2007, Page(s):1879 - 1890
Cited by:  Papers (224)  |  Patents (13)
| | PDF (1617 KB) | HTML

This paper proposes a solution to the present bulky external capacitor low-dropout (LDO) voltage regulators with an external capacitorless LDO architecture. The large external capacitor used in typical LDOs is removed allowing for greater power system integration for system-on-chip (SoC) applications. A compensation scheme is presented that provides both a fast transient response and full range al... View full abstract»

• ### Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part I—Analog Circuit Techniques

Publication Year: 2017, Page(s):2237 - 2249
| | PDF (3220 KB) | HTML

This paper, split into Parts I and II, reviews recent innovations in circuit design that have accelerated the miniaturization of sensor nodes. Design techniques for key building blocks, such as sensor interfaces, timing reference, data communication, energy harvesting, and power management are reviewed. In particular, Part I introduces analog circuit techniques and sensor interfaces for miniaturiz... View full abstract»

• ### Analysis and Design of a Thermoelectric Energy Harvesting System With Reconfigurable Array of Thermoelectric Generators for IoT Applications

Publication Year: 2017, Page(s):2346 - 2358
| | PDF (2726 KB) | HTML

In this paper, a novel thermoelectric energy harvesting system with a reconfigurable array of thermoelectric generators (TEGs), which requires neither an inductor nor a flying capacitor, is proposed. The proposed architecture can accomplish maximum power point tracking (MPPT) and voltage conversion simultaneously via the reconfiguration of the TEG array, and demonstrate significantly improved powe... View full abstract»

• ### Consensus of Multiagent Systems and Synchronization of Complex Networks: A Unified Viewpoint

Publication Year: 2010, Page(s):213 - 224
Cited by:  Papers (775)
| | PDF (1045 KB) | HTML

This paper addresses the consensus problem of multiagent systems with a time-invariant communication topology consisting of general linear node dynamics. A distributed observer-type consensus protocol based on relative output measurements is proposed. A new framework is introduced to address in a unified way the consensus of multiagent systems and the synchronization of complex networks. Under thi... View full abstract»

• ### Efficient Solar Power Management System for Self-Powered IoT Node

Publication Year: 2017, Page(s):2359 - 2369
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An efficient micro-scale solar power management architecture for self-powered Internet-of-Things node is presented in this paper. The proposed architecture avoids the linear regulator and presents a complete on-chip switched capacitor based power converter in order to achieve higher end-to-end efficiency. Unlike traditional architectures, where the harvested energy processes twice, the proposed ar... View full abstract»

• ### Sigma-Delta Modulators: Tutorial Overview, Design Guide, and State-of-the-Art Survey

Publication Year: 2011, Page(s):1 - 21
Cited by:  Papers (89)  |  Patents (7)
| | PDF (1691 KB) | HTML

This paper presents a tutorial overview of ΣΔ modulators, their operating principles and architectures, circuit errors and models, design methods, and practical issues. A review of the state of the art on nanometer CMOS implementations is described, giving a survey of cutting-edge ΣΔ architectures, with emphasis on their application to the next generation of wireless te... View full abstract»

• ### The Circuit Theory Behind Coupled-Mode Magnetic Resonance-Based Wireless Power Transmission

Publication Year: 2012, Page(s):2065 - 2074
Cited by:  Papers (136)
| | PDF (2999 KB) | HTML

Inductive coupling is a viable scheme to wirelessly energize devices with a wide range of power requirements from nanowatts in radio frequency identification tags to milliwatts in implantable microelectronic devices, watts in mobile electronics, and kilowatts in electric cars. Several analytical methods for estimating the power transfer efficiency (PTE) across inductive power transmission links ha... View full abstract»

• ### Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors

Publication Year: 2017, Page(s):2821 - 2834
| | PDF (4131 KB) | HTML

Direct time-of-flight (d-ToF) estimation with high frame rate requires the incorporation of a time-to-digital converter (TDC) at pixel level. A feasible approach to a compact implementation of the TDC is to use the multiple phases of a voltage-controlled ring-oscillator (VCRO) for the finest bits. The VCRO becomes central in determining the performance parameters of a d-ToF image sensor. In this p... View full abstract»

• ### A 0.6V 75nW All-CMOS Temperature Sensor With 1.67m°C/mV Supply Sensitivity

Publication Year: 2017, Page(s):2274 - 2283
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This paper presents the design of a fully-integrated ultra-low-power temperature sensor applicable for use in wearable, environmental monitoring, and Internet-of-Things applications. Temperature is transduced in the proposed design by charging a pair of capacitors with proportional to or complementary to (proportional to absolute temperature or complementary to absolute temperature) current source... View full abstract»

• ### Circuit and System Designs of Ultra-Low Power Sensor Nodes With Illustration in a Miniaturized GNSS Logger for Position Tracking: Part II—Data Communication, Energy Harvesting, Power Management, and Digital Circuits

Publication Year: 2017, Page(s):2250 - 2262
| | PDF (3760 KB) | HTML

This two-part paper reviews recent innovations in circuit design that have accelerated the miniaturization of sensor nodes. In this second part of the paper, we focus on key building blocks of miniaturized sensor nodes, such as data transceivers, energy harvesters, power management units, and digital logic circuits. System level design considerations are also discussed to provide guidelines for th... View full abstract»

• ### Distributed Observer-Based Cyber-Security Control of Complex Dynamical Networks

Publication Year: 2017, Page(s):2966 - 2975
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Distributed tracking problem for complex dynamical networks with Lipschitz-type nonlinear dynamics under the framework of cyber-physical systems is investigated. Due to practical limitations in some circumstances, the states of the agents are usually unavailable for controllers, so distributed observers used to reconstruct the states of nodes are needed, which will be first designed. Differing fro... View full abstract»

• ### Switched-Capacitor/Switched-Inductor Structures for Getting Transformerless Hybrid DC–DC PWM Converters

Publication Year: 2008, Page(s):687 - 696
Cited by:  Papers (371)  |  Patents (1)
| | PDF (1294 KB) | HTML

A few simple switching structures, formed by either two capacitors and two-three diodes (C-switching), or two inductors and two-three diodes (L-switching) are proposed. These structures can be of two types: ldquostep-downrdquo and ldquostep-up.rdquo These blocks are inserted in classical converters: buck, boost, buck-boost, Cuk, Zeta, Sepic. The ldquostep-downrdquo C- or L-switching structures can... View full abstract»

• ### Kron Reduction of Graphs With Applications to Electrical Networks

Publication Year: 2013, Page(s):150 - 163
Cited by:  Papers (98)
| | PDF (3757 KB) | HTML

Consider a weighted undirected graph and its corresponding Laplacian matrix, possibly augmented with additional diagonal elements corresponding to self-loops. The Kron reduction of this graph is again a graph whose Laplacian matrix is obtained by the Schur complement of the original Laplacian matrix with respect to a specified subset of nodes. The Kron reduction process is ubiquitous in classic ci... View full abstract»

• ### Ultra-Sub-Threshold Operation of Always-On Digital Circuits for IoT Applications by Use of Schmitt Trigger Gates

Publication Year: 2017, Page(s):2920 - 2933
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Supply-voltage reduction in digital circuits beyond the minimum energy per operation point is advantageous for supply-voltage-constrained applications and can help to considerably reduce standby power consumption. Schmitt trigger (ST) logic allows for ultra-low voltage (ULV) operation; hardware implementations with supply voltages as low as 62mV have been demonstrated. In this paper, a systematic ... View full abstract»

• ### Efficient Behavioral Simulation of Charge-Pump Phase-Locked Loops

Publication Year: 2017, Page(s):1 - 13
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The simulation of the full netlist of a phase locked loop (PLL) is resource demanding due to the prohibitive time needed to derive output noise, spurs, and transient performance from detailed transistor-level simulations. To overcome this limitation, behavioral models are needed but they must be accurate and time-efficient. This paper introduces a new behavioral macro-model of the charge-pump PLL,... View full abstract»

• ### Resistive RAM-Centric Computing: Design and Modeling Methodology

Publication Year: 2017, Page(s):2263 - 2273
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Memory-centric computing with on-chip nonvolatile memories provides unique opportunities for native and local information processing in an energy-efficient manner. Design and modeling methodology based on resistive random access memory (RRAM) is presented in this paper. A hierarchical RRAM SPICE model having different levels of physics realism is described, where the incorporated stochasticity pro... View full abstract»

• ### A High-Speed and Ultra Low-Power Subthreshold Signal Level Shifter

Publication Year: 2017, Page(s):1164 - 1172
| | PDF (2048 KB) | HTML

In this paper, we present a novel level shifter circuit converting subthreshold signal levels to super-threshold signal levels at high-speed using ultra low-power and a small silicon area, making it well-suited for low-power applications such as wireless sensor networks and implantable medical devices. The proposed circuit introduces a new voltage level shifter topology employing a level-shifting ... View full abstract»

• ### A High-Voltage-Enabled Class-D Polar PA Using Interactive AM-AM Modulation, Dynamic Matching, and Power-Gating for Average PAE Enhancement

Publication Year: 2017, Page(s):2844 - 2857
| | PDF (2677 KB) | HTML

This paper describes a 2.4-GHz digitally-modulated class-D polar power amplifier (PA) with novel circuit techniques to enhance the average power-added efficiency (PAEave) that becomes increasingly crucial to prolong the battery lifetime. The PA features 5+5-b interactive AM-AM modulation between the class-D unit amplifiers and a novel high resolution dynamic matching network (DMN) to im... View full abstract»

• ### A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier With High Efficiency

Publication Year: 2011, Page(s):1591 - 1603
Cited by:  Papers (33)
| | PDF (1735 KB) | HTML

A two-stage fully differential CMOS amplifier comprising inverters as input structures and employing self-biasing techniques is presented. The proposed amplifier benefits from an optimum compensation through time-domain optimization which permits achieving high energy efficiency. Moreover, it achieves the highest efficiency of its class and although it relies on a quasi-class-A topology, it is com... View full abstract»

• ### Phase-Noise Reduction in a CMOS-MEMS Oscillator Under Nonlinear MEMS Operation

Publication Year: 2017, Page(s):3047 - 3055
| | PDF (3252 KB) | HTML

In this paper, we will present an all-CMOS oscillator based on monolithically integrated MEMS resonators fabricated from the VIA layer (tungsten) of a $0.35~mu text{m}$ CMOS technology process. With this CMOS MEMS closed-loop system, the nonlinear MEMS frequency response due to the electrostatic actuation has been reconstruct... View full abstract»

• ### Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC

Publication Year: 2008, Page(s):1392 - 1401
Cited by:  Papers (71)  |  Patents (2)
| | PDF (2180 KB) | HTML

The design issues of a single-transistor-control (STC) low-drop-out (LDO) based on flipped voltage follower is discussed in this paper, in particular the feedback stability at different conditions of output capacitors, equivalent series resistances (ESRs) and load current. Based on the analysis, an STC LDO was implemented in a standard 0.35-mum MOS technology. It is proven experimentally that the ... View full abstract»

• ### Joint Sparsity and Order Optimization Based on ADMM With Non-Uniform Group Hard Thresholding

Publication Year: 2017, Page(s):1 - 12
| | PDF (2082 KB)

This paper proposes a new optimization framework for the joint optimization of sparsity and filter order (JOSFO) for FIR filter design. Since the cost function for JOSFO involves ℓ₀ and non-uniform overlapped group ℓ₀ norms, which are not convex, a global optimal solution is difficult to obtain. To find an approximate solution of the non-convex problem, existing approac... View full abstract»

• ### Infrastructure Circuits for Lifetime Improvement of Ultra-Low Power IoT Devices

Publication Year: 2017, Page(s):2598 - 2610
| | PDF (4432 KB) | HTML

An ultra-low power (ULP), energy-harvesting system-on-chip, that can operate in various application scenarios, is needed for enabling the trillions of Internet-of-Things (IoT) devices. However, energy from the ambient sources is little and system power consumption is high. Circuits and system development require an optimal use of available energy. In this paper, we present circuits that can improv... View full abstract»

• ### A Third-Order MASH $Sigma Delta$ Modulator Using Passive Integrators

Publication Year: 2017, Page(s):2871 - 2883
| | PDF (2749 KB) | HTML

This paper presents a MASH ΣΔM using only passive integrators and simple differential pairs as low-gain blocks. Instead of high-gain power hungry op-amps it uses more processing gain from the comparator (1-bit quantizer) as a part of the loop gain. The proposed approach allows the design of a continuous-time, 2-1 MASH ΣΔM in a 65-nm CMOS technology occupying an area of ... View full abstract»

• ### Four-Wire Interface ASIC for a Multi-Implant Link

Publication Year: 2017, Page(s):3056 - 3067
| | PDF (3049 KB) | HTML

This paper describes an on-chip interface for recovering power and providing full-duplex communication over an AC-coupled 4-wire lead between active implantable devices. The target application requires two modules to be implanted in the brain (cortex) and upper chest; connected via a subcutaneous lead. The brain implant consists of multiple identical “optrodes” that facilitate a bidi... View full abstract»

• ### Consensus Tracking of Multi-Agent Systems With Lipschitz-Type Node Dynamics and Switching Topologies

Publication Year: 2014, Page(s):499 - 511
Cited by:  Papers (196)
| | PDF (3732 KB) | HTML

Distributed consensus tracking is addressed in this paper for multi-agent systems with Lipschitz-type node dynamics. The main contribution of this work is solving the consensus tracking problem without the assumption that the topology among followers is strongly connected and fixed. By using tools from M-matrix theory, a class of consensus tracking protocols based only on the relative states among... View full abstract»

• ### Design Procedure for Two-Stage CMOS Opamp With Flexible Noise-Power Balancing Scheme

Publication Year: 2005, Page(s):1508 - 1514
Cited by:  Papers (42)
| | PDF (368 KB) | HTML

This paper presents a basic two-stage CMOS opamp design procedure that provides the circuit designer with a means to strike a balance between two important characteristics in electronic circuit design, namely noise performance and power consumption. It is shown in this paper that, unlike the previously reported design procedures, the proposed design step allows opamp designers to trade between noi... View full abstract»

• ### A frequency compensation scheme for LDO voltage regulators

Publication Year: 2004, Page(s):1041 - 1050
Cited by:  Papers (150)  |  Patents (6)
| | PDF (576 KB) | HTML

A stable low dropout (LDO) voltage regulator topology for low equivalent series resistance (ESR) capacitive loads is presented. The proposed scheme generates a zero internally instead of relying on the zero generated by the load capacitor and its ESR combination for stability. It is demonstrated that this scheme realizes robust frequency compensation, facilitates the use of multilayer ceramic capa... View full abstract»

• ### A Millimeter-Wave Fully Integrated Passive Reflection-Type Phase Shifter With Transformer-Based Multi-Resonance Loads for 360° Phase Shifting

Publication Year: 2017, Page(s):1 - 14
| | PDF (9058 KB)

This paper presents a millimeter-wave fully differential transformer-based passive reflection-type phase shifter (RTPS) capable of performing full span 360° continuous phase shift from 58 to 64 GHz. It consists of two transformer-based 90° couplers and two transformer-based multi-resonance reflective loads to provide 360° phase shift with low loss and ultra-compact chip size. ... View full abstract»

• ### A Sub-$\mu{\rm W}$ Bandgap Reference Circuit With an Inherent Curvature-Compensation Property

Publication Year: 2015, Page(s):1 - 9
Cited by:  Papers (16)
| | PDF (1515 KB) | HTML

A new current-mode bandgap reference circuit (BGR) which is capable of generating sub-1-V output voltage is presented. It has not only the lowest theoretical minimum current consumption among published current-mode BGRs, but also additional advantages of an inherent curvature-compensation function and not requiring NPN BJTs. The curvature-compensation is achieved by utilizing the exponential behav... View full abstract»

• ### High-Efficiency Wireless Power Transfer for Biomedical Implants by Optimal Resonant Load Transformation

Publication Year: 2013, Page(s):867 - 874
Cited by:  Papers (61)
| | PDF (1382 KB) | HTML

Wireless power transfer provides a safe and robust way for powering biomedical implants, where high efficiency is of great importance. A new wireless power transfer technique using optimal resonant load transformation is presented with significantly improved efficiency at the cost of only one additional chip inductor component. The optimal resonant load condition for the maximized power transfer e... View full abstract»

• ### ACRO-PUF: A Low-power, Reliable and Aging-Resilient Current Starved Inverter-Based Ring Oscillator Physical Unclonable Function

Publication Year: 2017, Page(s):3138 - 3149
| | PDF (2849 KB) | HTML

Ring oscillator (RO)-based physical unclonable function (PUF) is an emerging hardware security primitive but its response reproducibility is susceptible to changes in operating conditions and device aging. Present solutions to increase RO PUF reliability either incur large hardware overhead or require sophisticated RO selection algorithm. This paper exploits the optimal biasing of current starved ... View full abstract»

• ### An IoT Endpoint System-on-Chip for Secure and Energy-Efficient Near-Sensor Analytics

Publication Year: 2017, Page(s):2481 - 2494
| | PDF (4826 KB) | HTML

Near-sensor data analytics is a promising direction for internet-of-things endpoints, as it minimizes energy spent on communication and reduces network load - but it also poses security concerns, as valuable data are stored or sent over the network at various stages of the analytics pipeline. Using encryption to protect sensitive data at the boundary of the on-chip analytics engine is a way to add... View full abstract»

• ### An Efficient Digital Background Control for Hybrid Transformer-Based Receivers

Publication Year: 2017, Page(s):3068 - 3080
| | PDF (3944 KB) | HTML

The design and hardware implementation of a digital control system tailored to a hybrid transformer-based duplexer is proposed. Working at Nyquist sampling frequency, it finds the optimal transmit-receive isolation in about 150 $mu text{s}$ even when modulated signals with high PAPR (16-QAM) are transmitted. A simple tracking... View full abstract»

• ### A $250$-MHz Pipelined ADC-Based $f_S/4$ Noise-Shaping Bandpass ADC

Publication Year: 2017, Page(s):1 - 10
| | PDF (2708 KB)

A new fS/4 bandpass Δ Σ-analog-to-digital converter (ADC) architecture is realized by feeding back the delayed quantization noise inherently produced by a pipelined ADC. Designed in a 55-nm global foundry (GF) LP-CMOS process, the prototype ADC sampling at 250 MHz achieves an Signal-to-Noise+Distortion Ratio of 72, 75.8, 80.1, and 85.3 dB in a 15.64-, 7.82-, 3.91-, and 1.953-MHz band... View full abstract»

• ### A Temperature Compensated Triple-Path PLL With $K_{mathrm {VCO}}$ Non-Linearity Desensitization Capable of Operating at 77 K

Publication Year: 2017, Page(s):2835 - 2843
| | PDF (2264 KB) | HTML

A novel triple-path PLL (TPPLL) is presented to compensate the VCO frequency drift caused by the large temperature variations meanwhile maintaining a stable bandwidth and good jitter performance. The proposed PLL architecture splits the VCO tuning loop into three paths as the proportional, the integral, and the temperature compensation (TC) path, respectively. The feed-forward TC path with a large... View full abstract»

• ### An Ultra-Low Power 1.7-2.7 GHz Fractional-N Sub-Sampling Digital Frequency Synthesizer and Modulator for IoT Applications in 40 nm CMOS

Publication Year: 2017, Page(s):1094 - 1105
| | PDF (3700 KB) | HTML

This paper introduces an ultra-low power 1.7-2.7-GHz fractional-N sub-sampling digital PLL (SS-DPLL) for Internet-of-Things (IoT) applications targeting compliance with Bluetooth Low Energy (BLE) and IEEE802.15.4 standards. A snapshot time-to-digital converter (TDC) acts as a digital sub-sampler featuring an increased out-of-range gain and without any assistance from the traditional counting of DC... View full abstract»

• ### A 4.2-mW 77.1-dB SNDR 5-MHz BW DT 2-1 MASH $Delta Sigma$ Modulator With Multirate Opamp Sharing

Publication Year: 2017, Page(s):2641 - 2654
| | PDF (2659 KB) | HTML

This paper presents a discrete time 2-1 MASH Delta-Sigma (ΔΣ) modulator with multirate opamp sharing for analog-to-digital converters, targeting the optimization of power efficiency in active blocks, such as opamps and quantizers. Through the allocation of different settling times to the opamps and by adopting the multirate technique, the power of the shared opamps is utilized more e... View full abstract»

• ### Noise Analysis for Comparator-Based Circuits

Publication Year: 2009, Page(s):541 - 553
Cited by:  Papers (32)  |  Patents (2)
| | PDF (854 KB) | HTML

Noise analysis for comparator-based circuits is presented. The goal is to gain insight into the different sources of noise in these circuits for design purposes. After the general analysis techniques are established, they are applied to different noise sources in the comparator-based switched-capacitor pipeline analog-to-digital converter (ADC). The results show that the noise from the virtual gro... View full abstract»

• ### A Low-Energy Machine-Learning Classifier Based on Clocked Comparators for Direct Inference on Analog Sensors

Publication Year: 2017, Page(s):2954 - 2965
| | PDF (2911 KB) | HTML

This paper presents a system, where clocked comparators consuming only CV2 energy directly derive classification decisions from analog sensor signals, thereby replacing instrumentation amplifiers, ADCs, and digital MACs, as typically required. A machine-learning algorithm for training the classifier is presented, which enables circuit non-idealities as well as severe energy/area scaling... View full abstract»

• ### TEAM: ThrEshold Adaptive Memristor Model

Publication Year: 2013, Page(s):211 - 221
Cited by:  Papers (153)  |  Patents (1)
| | PDF (2472 KB) | HTML

Memristive devices are novel devices, which can be used in applications ranging from memory and logic to neuromorphic systems. A memristive device offers several advantages: nonvolatility, good scalability, effectively no leakage current, and compatibility with CMOS technology, both electrically and in terms of manufacturing. Several models for memristive devices have been developed and are discus... View full abstract»

## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK