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# IEEE Transactions on Nanotechnology

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• ### Negative Capacitance for Boosting Tunnel FET performance

Publication Year: 2017, Page(s):253 - 258
| | PDF (1243 KB) | HTML

We have proposed and investigated a super steep subthreshold slope transistor by introducing negative capacitance of a ferroelectric HfO2 gate insulator to a vertical tunnel FET for energy efficient computing. The channel structure and gate insulator are systematically designed to maximize the Ion/Ioff ratio. The simulation study reveals that the electric field at ... View full abstract»

• ### Paper-Based Lithium-Ion Batteries Using Carbon Nanotube-Coated Wood Microfibers

Publication Year: 2013, Page(s):408 - 412
Cited by:  Papers (11)
| | PDF (650 KB) | HTML

Lithium-ion batteries using flexible paper-based current collectors have been developed. These current collectors were fabricated from wood microfibers that were coated with carbon nanotubes (CNT) through an electrostatic layer-by-layer nanoassembly process. The carbon nanotube mass loading of the presented (CNT-microfiber paper) current collectors is 10.1 μg/cm2. The capacities ... View full abstract»

• ### Stochasticity Modeling in Memristors

Publication Year: 2016, Page(s):15 - 28
Cited by:  Papers (3)
| | PDF (2704 KB) | HTML

Diverse models have been proposed over the past years to explain the exhibiting behavior of memristors, the fourth fundamental circuit element. The models varied in complexity ranging from a description of physical mechanisms to a more generalized mathematical modeling. Nonetheless, stochasticity, a widespread observed phenomenon, has been immensely overlooked from the modeling perspective. This i... View full abstract»

• ### Crossbar-Based Memristive Logic-in-Memory Architecture

Publication Year: 2017, Page(s):491 - 501
| | PDF (1153 KB) | HTML

The use of memristors and resistive random access memory (ReRAM) technology to perform logic computations, has drawn considerable attention from researchers in recent years. However, the topological aspects of the underlying ReRAM architecture and its organization have received less attention, as the focus has mainly been on device-specific properties for functionally complete logic gates through ... View full abstract»

• ### Applications of Micro/Nano Automation Technology in Detecting Cancer Cells for Personalized Medicine

Publication Year: 2017, Page(s):217 - 229
| | PDF (691 KB) | HTML

The coming era of personalized cancer treatment is presenting automation with unprecedented opportunities. Currently, the drug susceptibility test of clinical cancer patients is mainly dependent on manual labor with a low level of automation. Automating the process of primary cancer cell detection will potentially have tremendous economic benefits and social significance. Automated cancer cell det... View full abstract»

• ### Real-Time Controllable and Multifunctional Metasurfaces Utilizing Indium Tin Oxide Materials: A Phased Array Perspective

Publication Year: 2017, Page(s):296 - 306
| | PDF (923 KB) | HTML

In this paper, two electrically tunable dual-band reflectarray antennas are designed by the integration of a thin layer of indium tin oxide (ITO) into plasmonic multi-sized and multilayer unit cells. The presented geometries include two gold nanoribbons located next to each other with different widths and backed by a stack of alumina-ITO-metallic ground plane and two pairs of vertically stacked go... View full abstract»

• ### Transparent Microwave Absorber Based on Patterned Graphene: Design, Measurement, and Enhancement

Publication Year: 2017, Page(s):484 - 490
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A patterned graphene-based transparent microwave absorber is proposed in this paper. Graphene is transferred onto polyethylene terephthalate (PET) film, and patterned as μm-level periodic patches, so that a capacitive and resistive graphene surface is obtained at microwave band. By placing this graphene/PET film on the top of a glass substrate and applying fluorine-doped tin oxide fi... View full abstract»

• ### Tunneling Effects in a Charge-Plasma Dopingless Transistor

Publication Year: 2017, Page(s):315 - 320
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The recently proposed device concept, the so-called charge-plasma (C-P) dopingless transistor (DLT), is revisited. The novel device, which utilizes the workfunction difference between the source/drain (S/D) metal and the substrate enclosing the S/D junction, does not demand external S/D chemical doping via ion implant. It shows excellent immunity against short-channel effects due to an extremely t... View full abstract»

• ### High-Efficiency InGaN/GaN Core–Shell Nanorod Light-Emitting Diodes With Low-Peak Blueshift and Efficiency Droop

Publication Year: 2017, Page(s):355 - 358
| | PDF (331 KB) | HTML

In this study, novel three-dimensional (3-D) nanoscale structures and methodology are demonstrated for application in high-efficiency core-shell nanorod (NR) light-emitting diodes (LEDs). The key to our successful growth of the structures is the introduction of passivation, which can be used to selectively grow active layers in desired structures. Through the fabrication methodology, core-shell NR... View full abstract»

• ### A Study of Electrical Resistance in Carbon Nanotube–Insulator–Metal Diode Arrays for Optical Rectenna

Publication Year: 2017, Page(s):230 - 238
| | PDF (989 KB) | HTML

Vertical tunnel diode arrays made from multiwall carbon nanotubes (MWCNTs) have shown recent promise for developing a practical optical rectenna, which is a device to convert electromagnetic waves at optical frequencies to direct current. Realizing an optical rectenna requires an antenna to be coupled to a diode that operates on the order of PHz (switching speed on the order of fs). Previously, we... View full abstract»

• ### Channel Stress and Ballistic Performance Advantages of Gate-All-Around FETs and Inserted-Oxide FinFETs

Publication Year: 2017, Page(s):209 - 216
| | PDF (5446 KB) | HTML

Detailed stress modeling of various three-dimensional (3-D) MOSFET designs reveals that the “inserted-oxide” FinFET and gate-all-around (GAA) stacked-nanowire MOSFET (GAAFET) exhibit increased longitudinal stress and decreased transverse stress in both p-channel and n-channel devices, as compared against the bulk FinFET. By combining 3-D electrostatics modeling with mid-channel Schro... View full abstract»

• ### CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits

Publication Year: 2011, Page(s):217 - 225
Cited by:  Papers (87)  |  Patents (1)
| | PDF (773 KB) | HTML

This paper presents a novel design of ternary logic gates using carbon nanotube (CNT) FETs (CNTFETs). Ternary logic is a promising alternative to the conventional binary logic design technique, since it is possible to accomplish simplicity and energy efficiency in modern digital design due to the reduced circuit overhead such as interconnects and chip area. A resistive-load CNTFET-based ternary lo... View full abstract»

• ### Synthesis, Transfer, and Devices of Single- and Few-Layer Graphene by Chemical Vapor Deposition

Publication Year: 2009, Page(s):135 - 138
Cited by:  Papers (126)  |  Patents (11)
| | PDF (284 KB) | HTML

The advance of graphene-based nanoelectronics has been hampered due to the difficulty in producing single- or few-layer graphene over large areas. We report a simple, scalable, and cost-efficient method to prepare graphene using methane-based CVD on nickel films deposited over complete Si/SiO2 wafers. By using highly diluted methane, single- and few-layer graphene were obtained, as conf... View full abstract»

• ### Low Cost, Large Area, Flexible Graphene Nanocomposite Films for Energy Harvesting Applications

Publication Year: 2017, Page(s):259 - 264
| | PDF (869 KB) | HTML

In this paper, we report a robust and a low-cost spin coating approach for fabrication of large area flexible piezoelectric nanocomposite generator device for harvesting biomechanical motions. In order to develop the piezoelectric nanocomposite, ZnO and BaTiO3 were used as filler materials for realization of piezoelectric nanogenerator. Serial stretching and bending tests over these dev... View full abstract»

• ### A Quasi-3-D Scaling Length Model for Trapezoidal FinFET and Its Application to Subthreshold Behavior Analysis

Publication Year: 2017, Page(s):281 - 289
| | PDF (1832 KB) | HTML

Based on the equivalent channel width and equivalent number of gates, a quasi-3-D scaling length model for the trapezoidal FinFET (TzFinFET) is developed. By accounting for the coupling effects between equivalent double-gate FET and single-gate FET, the scaling length of TzFinFET can be accurately predicted. Besides Fin height, top Fin width, and gate oxide, the scaling length is also sensitive to... View full abstract»

• ### Variability-Aware Analysis of Hybrid MTJ/CMOS Circuits by a Micromagnetic-Based Simulation Framework

Publication Year: 2017, Page(s):160 - 168
| | PDF (957 KB) | HTML Media

Magnetic tunnel junctions (MTJs) are attracting an increasing interest due to their potentiality for high-density nonvolatile memories. However, some issues need to be opportunely considered in the design and optimization of hybrid MTJ/CMOS circuits, such as the stochastic nature of the MTJ switching, the high write energy consumption and the susceptibility to process variations. In this paper, we... View full abstract»

• ### Investigation of Negative Capacitance Gate-all-Around Tunnel FETs Combining Numerical Simulation and Analytical Modeling

Publication Year: 2017, Page(s):58 - 67
| | PDF (1132 KB) | HTML

A short-channel negative capacitance gate-all-around tunnel field-effect transistor (NC-GAA-TFET) with a ferroelectric gate stack is proposed. Device performance is investigated by integrating three-dimensional (3-D) numerical simulation and the 1D Landau-Khalatnikov equation. It is shown that the NC-GAA-TFET has a steeper subthreshold swing and higher on-state current compared to conventional GAA... View full abstract»

• ### An Active Absorber Based on Nonvolatile Floating-Gate Graphene Structure

Publication Year: 2017, Page(s):189 - 195
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An active absorber with nearly zero static power consumption is proposed based on nonvolatile floating-gate graphene structure. Such absorber has almost no static power consumption benefited from the nonvolatile design. In such design, the central graphene can capture the tunneled electrons under the positive applied voltage, but cannot release these electrons after removing the voltage since it i... View full abstract»

• ### Design of a Beam Reconfigurable THz Antenna With Graphene-Based Switchable High-Impedance Surface

Publication Year: 2012, Page(s):836 - 842
Cited by:  Papers (33)
| | PDF (889 KB) | HTML

In this paper, a new beam reconfigurable antenna is proposed for THz application, which is based on a switchable high-impedance surface (HIS) using a single-layer graphene. The effects of impurity density and gate voltage on the conductivity of graphene are utilized, and the switchable reflection characteristic of the graphene-based HIS is observed. Then the THz antenna is designed over this switc... View full abstract»

• ### Immunity to Device Variations in a Spiking Neural Network With Memristive Nanodevices

Publication Year: 2013, Page(s):288 - 295
Cited by:  Papers (43)  |  Patents (2)
| | PDF (493 KB) | HTML

Memristive nanodevices can feature a compact multilevel nonvolatile memory function, but are prone to device variability. We propose a novel neural network-based computing paradigm, which exploits their specific physics, and which has virtual immunity to their variability. Memristive devices are used as synapses in a spiking neural network performing unsupervised learning. They learn using a simpl... View full abstract»

• ### The Effects of Water on the Dielectric Properties of Silicon-Based Nanocomposites

Publication Year: 2017, Page(s):169 - 179
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A series of polyethylene-based nanocomposites was prepared, utilizing silicon nitride or silicon dioxide (silica) nanopowders, and the effect of filler loading and conditioning (i.e., water content) on their morphology and electrical properties was examined. The addition of nanosilicon nitride led to systems that were free of obvious nanoparticle aggregates, whereas the nanosilica-based systems sh... View full abstract»

• ### Compact Modeling of Charge, Capacitance, and Drain Current in III–V Channel Double Gate FETs

Publication Year: 2017, Page(s):347 - 354
| | PDF (719 KB) | HTML

In this paper, we present a surface potential based compact modeling of terminal charge, terminal capacitance, and drain current for III-V channel double gate field-effect transistor (DGFET) including the effect of conduction band nonparabolicity. The proposed model is developed accounting for the two-dimensional density of states and includes the effect of quantum capacitance associated with the ... View full abstract»

• ### QCADesigner: a rapid design and Simulation tool for quantum-dot cellular automata

Publication Year: 2004, Page(s):26 - 31
Cited by:  Papers (226)  |  Patents (1)
| | PDF (584 KB) | HTML

This paper describes a project to create a novel design and simulation tool for quantum-dot cellular automata (QCA), namely QCADesigner. QCA logic and circuit designers require a rapid and accurate simulation and design layout tool to determine the functionality of QCA circuits. QCADesigner gives the designer the ability to quickly layout a QCA design by providing an extensive set of CAD tools. As... View full abstract»

• ### The Role of Geometry Parameters and Fin Aspect Ratio of Sub-20nm SOI-FinFET: An Analysis Towards Analog and RF Circuit Design

Publication Year: 2015, Page(s):546 - 554
Cited by:  Papers (18)
| | PDF (937 KB) | HTML

Nowadays FinFETs integrated into complex circuit applications can fulfill the demand of smartphones and tablets for better performance and make chips that can compute faster. This paper studies the impact of HFin and WFin variations on various performance matrices including static as well as dynamic figures of merit (FOMs). With the help of aspect ratio (WFin/H... View full abstract»

• ### Single-walled carbon nanotube electronics

Publication Year: 2002, Page(s):78 - 85
Cited by:  Papers (634)  |  Patents (55)
| | PDF (423 KB) | HTML

Single-walled carbon nanotubes (SWNTs) have emerged as a very promising new class of electronic materials. The fabrication and electronic properties of devices based on individual SWNTs are reviewed. Both metallic and semiconducting SWNTs are found to possess electrical characteristics that compare favorably to the best electronic materials available. Manufacturability issues, however, remain a ma... View full abstract»

• ### Reconfigurable Terahertz Leaky-Wave Antenna Using Graphene-Based High-Impedance Surface

Publication Year: 2015, Page(s):62 - 69
Cited by:  Papers (17)
| | PDF (909 KB) | HTML

The concept of graphene-based two-dimensional leaky-wave antenna (LWA), allowing both frequency tuning and beam steering in the terahertz band, is proposed in this paper. In its design, a graphene sheet is used as a tuning part of the high-impedance surface (HIS) that acts as the ground plane of such 2-D LWA. It is shown that, by adjusting the graphene conductivity, the reflection phase of the HIS... View full abstract»

• ### Mechanical Properties Tunability of Three-Dimensional Polymeric Structures in Two-Photon Lithography

Publication Year: 2017, Page(s):23 - 31
| | PDF (675 KB) | HTML Media

Two-photon (2P) lithography shows great potential for the fabrication of three-dimensional (3-D) micro- and nanomechanical elements, for applications ranging from microelectromechanical systems to tissue engineering, by virtue of its high resolution (<;100 nm) and biocompatibility of the photosensitive resists. However, there is a considerable lack of quantitative data on mechanical properties ... View full abstract»

• ### High-performance carbon nanotube field-effect transistor with tunable polarities

Publication Year: 2005, Page(s):481 - 489
Cited by:  Papers (265)  |  Patents (48)
| | PDF (936 KB) | HTML

State-of-the-art carbon nanotube field-effect transistors (CNFETs) behave as Schottky-barrier-modulated transistors. It is known that vertical scaling of the gate oxide significantly improves the performance of these devices. However, decreasing the oxide thickness also results in pronounced ambipolar transistor characteristics and increased drain leakage currents. Using a novel device concept, we... View full abstract»

• ### Robustness Analysis of a Memristive Crossbar PUF Against Modeling Attacks

Publication Year: 2017, Page(s):396 - 405
| | PDF (777 KB) | HTML

In the greater context of computer security, hardware security issues such as integrated circuit counterfeiting, cloning, reverse engineering and piracy have emerged as critical issues due in part to an increasingly globalized supply chain. To help combat hardware security vulnerabilities, a wide range of security primitives have emerged in recent years. A popular example is physical unclonable fu... View full abstract»

• ### Experimental Study on Flexible ZnO Based Nanogenerator Using Schottky Contact for Energy Harvesting Applications

Publication Year: 2017, Page(s):469 - 476
| | PDF (1216 KB) | HTML

This paper presents the synthesis and implementation of a metal-insulator-semiconductor-type energy harvester. The proposed harvester generates power from ambient vibration. The flexible nanogenerator (NG) is developed from well- aligned ZnO nanorods (NRs) on kapton substrate with ITO sputtered bottom contact using the low-temperature hydrothermal method. PMMA insulation region is coated over NRs ... View full abstract»

• ### Benchmarking nanotechnology for high-performance and low-power logic transistor applications

Publication Year: 2005, Page(s):153 - 158
Cited by:  Papers (441)  |  Patents (3)
| | PDF (520 KB) | HTML

Recently there has been tremendous progress made in the research of novel nanotechnology for future nanoelectronic applications. In particular, several emerging nanoelectronic devices such as carbon-nanotube field-effect transistors (FETs), Si nanowire FETs, and planar III-V compound semiconductor (e.g., InSb, InAs) FETs, all hold promise as potential device candidates to be integrated onto the si... View full abstract»

• ### Graphene Field-Effect Transistors for In Vitro and Ex Vivo Recordings

Publication Year: 2017, Page(s):140 - 147
| | PDF (575 KB) | HTML

Recording extracellular potentials from electrogenic cells (especially neurons) is the hallmark destination of modern bioelectronics. While fabrication of flexible and biocompatible in vivo devices via silicon technology is complicated and time-consuming, graphene field-effect transistors (GFETs), instead, can easily be fabricated on flexible and biocompatible substrates. In this work, we compare ... View full abstract»

• ### Ultrahigh Storage Densities via the Scaling of Patterned Probe Phase-Change Memories

Publication Year: 2017, Page(s): 1
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The scaling potential of patterned probe phase-change memory (PP-PCM) cells is investigated, down to single-nanometer dimensions, using physically realistic simulations that combine electro-thermal modelling with a Gillespie Cellular Automata (GCA) phase-change model. For this study, a trilayer TiN/Ge $_2$ Sb $_2$ Te ... View full abstract»

• ### A Comprehensive Computational Modeling Approach for AlGaN/GaN HEMTs

Publication Year: 2016, Page(s):947 - 955
| | PDF (1363 KB) | HTML

This paper for the first time presents a comprehensive computational modeling approach for AlGaN/GaN high electron mobility transistors. Impact of the polarization charge at different material interfaces on the energy band profile as well as parasitic charge across the epitaxial stack is modeled and studied. Furthermore, impact of surface and bulk traps on two-dimensional electron gas, device char... View full abstract»

• ### Design of a Multilayer Graphene-Based Ultrawideband Terahertz Absorber

Publication Year: 2017, Page(s):68 - 74
| | PDF (737 KB)

In this paper, an step by step efficient design procedure for designing a multilayer absorber using graphene thin films is presented. The absorber design is based on scattering parameters of plasmonic waves propagating on the surface of graphene layers. We have provided appropriate interpretations for designing different features of the absorber including graphene pattern and substrate material. W... View full abstract»

• ### Graphene Terahertz Plasmon Oscillators

Publication Year: 2008, Page(s):91 - 99
Cited by:  Papers (286)  |  Patents (7)
| | PDF (1000 KB) | HTML

In this paper we propose and discuss coherent terahertz sources based on charge density wave (plasmon) amplification in two-dimensional graphene. The coupling of the plasmons to interband electron-hole transitions in population inverted graphene layers can lead to plasmon amplification through stimulated emission. Plasmon gain values in graphene can be very large due to the small group velocity of... View full abstract»

• ### Memristor Applications for Programmable Analog ICs

Publication Year: 2011, Page(s):266 - 274
Cited by:  Papers (122)  |  Patents (4)
| | PDF (565 KB) | HTML

This paper demonstrates that memristors can be used to implement programmable analog circuits, leveraging memristor's fine-resolution programmable resistance without causing perturbations due to parasitic components. Fine-resolution programmable resistance is achieved by varying the amount of flux across memristors. The resistance programming can be achieved by controlling the input pulsewidth and... View full abstract»

• ### Performance of Nanocrystal ZnO Thin-Film Schottky Contacts on Cu by Atomic Layer Deposition

Publication Year: 2017, Page(s):135 - 139
| | PDF (608 KB) | HTML

To address a “number of emerging applications” it is advantageous to synthesize semiconductor material on top of metal contacts. This is among the first reports of ZnO grown on top of copper (Cu) to form a Schottky contact (SC). Electrical and analytical studies were performed on SCs with ultrathin ZnO films grown by atomic layer deposition (ALD) in this work. Similar thickness films... View full abstract»

• ### Energy-Efficient Nonvolatile Reconfigurable Logic Using Spin Hall Effect-Based Lookup Tables

Publication Year: 2017, Page(s):32 - 43
| | PDF (1829 KB) | HTML

In this paper, we leverage magnetic tunnel junction (MTJ) devices to design an energy-efficient nonvolatile lookup table (LUT), which utilizes a spin Hall effect (SHE) assisted switching approach for MTJ storage cells. SHE-MTJ characteristics are modeled in Verilog-A based on precise physical equations. Functionality of the proposed SHE-MTJ-based LUT is validated using SPICE simulation. Our propos... View full abstract»

• ### Top–Down Fabrication of Gate-All-Around Vertically Stacked Silicon Nanowire FETs With Controllable Polarity

Publication Year: 2014, Page(s):1029 - 1038
Cited by:  Papers (15)  |  Patents (1)
| | PDF (1586 KB) | HTML

As the current MOSFET scaling trend is facing strong limitations, technologies exploiting novel degrees of freedom at physical and architecture level are promising candidates to enable the continuation of Moore's predictions. In this paper, we report on the fabrication of novel ambipolar Silicon nanowire (SiNW) Schottky-barrier (SB) FET transistors featuring two independent gate-all-around electro... View full abstract»

• ### Analysis of Crosstalk Effects for Multiwalled Carbon Nanotube Bundle Interconnects in Ternary Logic and Comparison With Cu Interconnects

Publication Year: 2017, Page(s):107 - 117
| | PDF (1571 KB) | HTML

In this study, the crosstalk-induced effects are investigated in ternary logic by using the three-line bus architecture. The worst case crosstalk delays for both repeated and unrepeated interconnect and the peak crosstalk noise voltage on the victim net are investigated. Analyses have been done for global level multiwalled carbon nanotube (MWCNT) bundle and copper interconnects with carbon nanotub... View full abstract»

• ### Comparison of TFETs and CMOS Using Optimal Design Points for Power–Speed Tradeoffs

Publication Year: 2017, Page(s):83 - 89
| | PDF (866 KB) | HTML

Tunnel transistors are one of the most attractive steep subthreshold slope devices currently being investigated as a means of overcoming the power density and energy inefficiency limitations of CMOS technology. In this paper, the evaluation and the comparison of the performance of distinct fan-in logic gates, using a set of widely accepted power-speed metrics, are addressed for five projected tunn... View full abstract»

• ### Wafer-Scale Growth and Transfer of Aligned Single-Walled Carbon Nanotubes

Publication Year: 2009, Page(s):498 - 504
Cited by:  Papers (107)  |  Patents (1)
| | PDF (1472 KB) | HTML

Experimental demonstration of wafer-scale growth of well-aligned, dense, single-walled carbon nanotubes on 4" ST-cut quartz wafers is presented. We developed a new carbon nanotube (CNT) wafer-scale growth process. This process allows quartz wafers to be heated to the CNT growth temperature of 865degC through the alpha-beta phase transformation temperature of quartz (573degC) without wafer fracture... View full abstract»

• ### Logic Design Within Memristive Memories Using Memristor-Aided loGIC (MAGIC)

Publication Year: 2016, Page(s):635 - 650
Cited by:  Papers (7)
| | PDF (2531 KB) | HTML Media

Realizing logic operations within passive crossbar memory arrays is a promising approach to enable novel computer architectures, different from conventional von Neumann architecture. Attractive candidates to enable such architectures are memristors, nonvolatile memory elements commonly used within a crossbar, that can also perform logic operations. In such novel architectures, data are stored and ... View full abstract»

• ### A New Short-Channel-Effect-Degraded Subthreshold Behavior Model for Double-Fin Multichannel FETs (DFMcFETs)

Publication Year: 2017, Page(s):16 - 22
| | PDF (1246 KB) | HTML

On the basis of the quasi-three-dimensional scaling equation and minimum bottom-central potential, a new short-channel-effect-degraded subthreshold behavior model for double-Fin multichannel FET (DFMcFET) is presented. It is shown that the deep trench of the DFMcFET is superior to the shallow one in respect of suppressing short-channel effects (SCEs) and reducing the threshold voltage roll-off and... View full abstract»

• ### Joint Energy Harvesting and Communication Analysis for Perpetual Wireless Nanosensor Networks in the Terahertz Band

Publication Year: 2012, Page(s):570 - 580
Cited by:  Papers (65)
| | PDF (710 KB) | HTML

Wireless nanosensor networks (WNSNs) consist of nanosized communicating devices, which can detect and measure new types of events at the nanoscale. WNSNs are the enabling technology for unique applications such as intrabody drug delivery systems or surveillance networks for chemical attack prevention. One of the major bottlenecks in WNSNs is posed by the very limited energy that can be stored in a... View full abstract»

• ### Nanoscale memory elements based on solid-state electrolytes

Publication Year: 2005, Page(s):331 - 338
Cited by:  Papers (345)  |  Patents (22)
| | PDF (896 KB) | HTML

We report on the fabrication and characterization of nanoscale memory elements based on solid electrolytes. When combined with silver, chalcogenide glasses such as Se-rich Ge-Se are good solid electrolytes, exhibiting high Ag ion mobility and availability. By placing an anode that has oxidizable Ag and an inert cathode (e.g., Ni) in contact with a thin layer of such a material, a device is formed ... View full abstract»

• ### Top-down technology for reconfigurable nanowire FETs with symmetric on-currents

Publication Year: 2017, Page(s): 1
| | PDF (1517 KB)

In this paper a technology for top-down single-gated Schottky barrier transistor is presented exhibiting the highest symmetry of on-currents for n- and p-conductance of such SOI based devices. The symmetry in the current-voltagecharacteristics is a mandatory requirement to realize circuits with reconfigurable nanowire field effect transistors (RFETs) whose channel can be switched electrostatically... View full abstract»

• ### Design, Identification, and Control of a Flexure-Based XY Stage for Fast Nanoscale Positioning

Publication Year: 2009, Page(s):46 - 54
Cited by:  Papers (160)  |  Patents (1)
| | PDF (770 KB) | HTML

The design, identification, and control of a novel, flexure-based, piezoelectric stack-actuated XY nanopositioning stage are presented in this paper. The main goal of the design is to combine the ability to scan over a relatively large range (25times25 mum) with high scanning speed. Consequently, the stage is designed to have its first dominant mode at 2.7 kHz. Cross-coupling between the two axes ... View full abstract»

• ### Programmable CMOS/Memristor Threshold Logic

Publication Year: 2013, Page(s):115 - 119
Cited by:  Papers (32)
| | PDF (366 KB) | HTML

This paper proposes a hybrid CMOS/memristor implementation of a programmable threshold logic gate. In this gate, memristive devices implement ratioed diode-resistor logic, while CMOS circuitry is used for signal amplification and inversion. Due to the excellent scaling prospects and nonvolatile analog memory of memristive devices, the proposed threshold logic is in-field configurable and potential... View full abstract»

## Aims & Scope

The IEEE Transactions on Nanotechnology is devoted to the publication of manuscripts of archival value in the general area of nanotechnology, which is rapidly emerging as one of the fastest growing and most promising new technological developments for the next generation and beyond.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Fabrizio Lombardi
Dept. of ECE
Northeastern Univ.