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Components and Packaging Technologies, IEEE Transactions on

Popular Articles (January 2015)

Includes the top 50 most frequently downloaded documents for this publication according to the most recent monthly usage statistics.
  • 1. Dynamic lithium-ion battery model for system simulation

    Publication Year: 2002 , Page(s): 495 - 505
    Cited by:  Papers (177)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (848 KB) |  | HTML iconHTML  

    Presents here a complete dynamic model of a lithium ion battery that is suitable for virtual-prototyping of portable battery-powered systems. The model accounts for nonlinear equilibrium potentials, rate- and temperature-dependencies, thermal effects and response to transient power demand. The model is based on publicly available data such as the manufacturers' data sheets. The Sony US18650 is used as an example. The model output agrees both with manufacturer's data and with experimental results. The model can be easily modified to fit data from different batteries and can be extended for wide dynamic ranges of different temperatures and current rates. View full abstract»

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  • 2. Nanoscale heat transfer and nanostructured thermoelectrics

    Publication Year: 2006 , Page(s): 238 - 246
    Cited by:  Papers (11)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (526 KB)  

    Heat transfer at nanoscales differs significantly from that in macroscales because of size effects on the phonon and electron transport. Nanoscale heat transfer effects have significant implications for the microelectronic and microphotonic industries, from the thermal management, the device design and reliability, and the active cooling considerations. Past studies have shown that heat conduction in nanostructures can be significantly impeded below that of the predictions of the Fourier theory. Such size effects imply higher device temperatures than anticipated and demands more stringent thermal management measures. On the other hand, same size effects can be exploited for developing highly efficient thermoelectric (TE) materials for direct cooling. This paper starts with a discussion on some nanoscale heat transfer effects and their impacts on the device performance, particularly using thermal conductivity reduction in superlattices as an example, followed by a review of recent developments in nanostructured TE materials View full abstract»

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  • 3. Prognostics and health management of electronics

    Publication Year: 2006 , Page(s): 222 - 229
    Cited by:  Papers (52)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (483 KB)  

    There has been a growing interest in monitoring the ongoing "health" of products and systems in order to predict failures and provide warning to avoid catastrophic failure. Here, health is defined as the extent of degradation or deviation from an expected normal condition. While the application of health monitoring, also referred to as prognostics, is well established for assessment of mechanical systems, this is not the case for electronic systems. However, electronic systems are integral to the functionality of most systems today, and their reliability is often critical for system reliability. This paper presents the state-of-practice and the current state-of-research in the area of electronics prognostics and health management. Four current approaches include built-in-test (BIT), use of fuses and canary devices, monitoring and reasoning of failure precursors, and modeling accumulated damage based on measured life-cycle loads. Examples are provided for these different approaches, and the implementation challenges are discussed. View full abstract»

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  • 4. Power and life extension of battery-ultracapacitor hybrids

    Publication Year: 2002 , Page(s): 120 - 131
    Cited by:  Papers (102)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (387 KB) |  | HTML iconHTML  

    The performance of a battery-ultracapacitor hybrid power source under pulsed load conditions is analytically described using simplified models. We show that peak power can be greatly enhanced, internal losses can be considerably reduced, and that discharge life of the battery is extended. Greatest benefits are seen when the load pulse rate is higher than the system eigenfrequency and when the pulse duty is small. Actual benefits are substantial; adding a 23 F ultracapacitor bank (3 × 7 PC10 ultracapacitors) in parallel with a typical Li-ion battery of 7.2 V and 1.35 A hr capacity can boost the peak power capacity by 5 times and reduce the power loss by 74%, while minimally impacting system volume and weight, for pulsed loads of 5 A, 1 Hz repetition rate, and 10% duty View full abstract»

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  • 5. Effective thermal conductivity of porous solder layers

    Publication Year: 2004 , Page(s): 259 - 267
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (400 KB) |  | HTML iconHTML  

    Microscopic voids in the die attachment solder layers of power semiconductor devices degrade their overall thermal transfer performance. This paper presents analytical results of the effect of spherical and spheroidal void geometries on the thermal conductivity of bulk media. Analytical results are compared with axially symmetric and three-dimensional thermal simulations of single and multiple cavity defects in planar structures. The effective thermal conductivity of the die to the case attachment solder layer of two commercial metal oxide semiconductor field effect transistor (MOSFET) devices is estimated using these results, with cavity dimensions and distributions obtained by electron microscopy. View full abstract»

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  • 6. Assessment of high-heat-flux thermal management schemes

    Publication Year: 2001 , Page(s): 122 - 141
    Cited by:  Papers (152)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (524 KB) |  | HTML iconHTML  

    This paper explores the recent research developments in high-heat-flux thermal management. Cooling schemes such as pool boiling, detachable heat sinks, channel flow boiling, microchannel and mini-channel heat sinks, jet-impingement, and sprays, are discussed and compared relative to heat dissipation potential, reliability, and packaging concerns. It is demonstrated that, while different cooling options can be tailored to the specific needs of individual applications, system considerations always play a paramount role in determining the most suitable cooling scheme. It is also shown that extensive fundamental electronic cooling knowledge has been amassed over the past two decades. Yet there is now a growing need for hardware innovations rather than perturbations to those fundamental studies. An example of these innovations is the cooling of military avionics, where research findings from the electronic cooling literature have made possible the development of a new generation of cooling hardware which promise order of magnitude increases in heat dissipation compared to today's cutting edge avionics cooling schemes View full abstract»

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  • 7. Low-Temperature Sintered Nanoscale Silver as a Novel Semiconductor Device-Metallized Substrate Interconnect Material

    Publication Year: 2006 , Page(s): 589 - 593
    Cited by:  Papers (74)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1161 KB) |  | HTML iconHTML  

    A nanoscale silver paste containing 30-nm silver particles that can be sintered at 280degC was made for interconnecting semiconductor devices. Sintering of the paste produced a microstructure containing micrometer-size porosity and a relative density of around 80%. Electrical and thermal conductivities of around 2.6times105 (Omegamiddotcm)-1 and 2.4W/K-cm, respectively, were obtained, which are much higher than those of the solder alloys that are currently used for die attachment and/or flip-chip interconnection of power semiconductor devices. The sintered porous silver had an apparent elastic modulus of about 9GPa, which is substantially lower than that of bulk silver, as well as most solder materials. The lower elastic modulus of the porous silver may be beneficial in achieving a more reliable joint between the device and substrate because of increased compliance that can better accommodate stress arising from thermal expansion mismatch View full abstract»

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  • 8. Shape Optimization of Micro-Channel Heat Sink for Micro-Electronic Cooling

    Publication Year: 2008 , Page(s): 322 - 330
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (725 KB) |  | HTML iconHTML  

    A numerical investigation of 3D fluid flow and heat transfer in a rectangular micro-channel has been carried out using water as a cooling fluid in a silicon substrate. Navier-Stokes and energy equations for laminar flow and conjugate heat transfer are solved using a finite volume solver. Solutions are first carefully validated with available analytical and experimental results; the shape of the micro-channel is then optimized using surrogate methods. Ratios of the width of the micro-channel to the depth and the width of the fin to the depth are selected as design variables. Design points are selected through a four-level full factorial design. A single objective function thermal resistance, formulated using pumping power as a constraint, is optimized. Mass flow rate is adjusted by the constant pumping power constraint. Response surface approximation, kriging, and radial basis neural network methods are applied to construct surrogates and the optimum point is searched by sequential quadratic programming. View full abstract»

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  • 9. A study on the variation of effective CTE of printed circuit boards through a validated comparison between strain gages and Moire´ interferometry

    Publication Year: 2003 , Page(s): 712 - 718
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (987 KB)  

    The effective coefficient of thermal expansion (CTE) of printed circuit boards (PCBs) have a great deal of influence on the reliability of solder joints in microelectronic packages. In this paper we carryout a systematic characterization of nineteen circuit board samples using strain gages, further validated by moire´ interferometry, to understand the impact of CTE variation on the reliability of solder joints. It is shown that the measured effective coefficient of thermal expansion varied in a wide range by as much as 5 PPM about the commonly used value of 17 PPM. This is shown to cause a significant reliability impact for a representative plastic ball grid array package assembly. The comparison between strain gage and moire´ interferometry showed good overall correlation, but differed from each other by as much as 2.73 parts per million (PPM). The possible sources of error in each technique are identified and discussed. View full abstract»

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  • 10. Thermal Challenges in Next-Generation Electronic Systems

    Publication Year: 2008 , Page(s): 801 - 815
    Cited by:  Papers (48)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1993 KB) |  | HTML iconHTML  

    Thermal challenges in next-generation electronic systems, as identified through panel presentations and ensuing discussions at the workshop, Thermal Challenges in Next Generation Electronic Systems, held in Santa Fe, NM, January 7-10, 2007, are summarized in this paper. Diverse topics are covered, including electrothermal and multiphysics codesign of electronics, new and nanostructured materials, high heat flux thermal management, site-specific thermal management, thermal design of next-generation data centers, thermal challenges for military, automotive, and harsh environment electronic systems, progress and challenges in software tools, and advances in measurement and characterization. Barriers to further progress in each area that require the attention of the research community are identified. View full abstract»

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  • 11. On one-dimensional analysis of thermoelectric modules (TEMs)

    Publication Year: 2005 , Page(s): 218 - 229
    Cited by:  Papers (27)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (656 KB) |  | HTML iconHTML  

    A novel framework for the one-dimensional analysis of a thermoelectric module (TEM) in which controlled and uncontrolled sides rather than cold and hot sides of it are defined is introduced. Next, heat conduction in a TEM is considered within this framework. Then, the operating modes of a TEM (cooling, generation, etc.) are defined and a means to compute the operating mode from a minimal set of operating parameters is provided. Refrigeration mode is considered in depth to illustrate the application of the analysis framework. Finally, the analysis is extended to TEMs subjected to boundary conditions of the third kind. Novel aspects of the analysis are indicated in the Conclusions. View full abstract»

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  • 12. Analytical and Numerical Modeling of the Thermal Performance of Three-Dimensional Integrated Circuits

    Publication Year: 2010 , Page(s): 56 - 63
    Cited by:  Papers (29)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (644 KB) |  | HTML iconHTML  

    Three-dimensional (3D) interconnection technology offers several electrical advantages, including reduced signal delay, reduced interconnect power, and design flexibility. 3D integration relies on through-silicon vias (TSVs) and the bonding of multiple active layers to stack several die or wafers containing integrated circuits (ICs) and provide direct electrical interconnection between the stacked strata. While this approach provides several electrical benefits, it also offers significant challenges in thermal management. While some work has been done in the past in this field, a comprehensive treatment is still lacking. In the current work, analytical and finite-element models of heat transfer in stacked 3D ICs are developed. The models are used to investigate the limits of thermal feasibility of 3D electronics and to determine the improvements required in traditional packaging in order to accommodate 3D ICs. An analytical model for temperature distribution in a multidie stack with multiple heat sources is developed. The analytical model is used to extend the traditional concept of a single-valued junction-to-air thermal resistance in an IC to thermal resistance and thermal sensitivity matrices for a 3D IC. The impact of various geometric parameters and thermophysical properties on thermal performance of a 3D IC is investigated. It is shown that package and heat sink thermal resistances play a more important role in determining temperature rise compared to thermal resistances intrinsic to the multidie stack. The improvement required in package and heat sink thermal resistances for a 3D logic-on-memory implementation to be thermally feasible is quantified. An increase in maximum temperature in a 3D IC compared to an equivalent system-in-package (SiP) is predicted. This increase is found to be mainly due to the reduced chip footprint. The increased memory die temperature in case of memory-on-logic integration compared to a SiP implementation is identified to be a sig- - nificant thermal management challenge in the future. The results presented in this paper may be useful in the development of thermal design guidelines for 3D ICs, which are expected to help maximize the electrical benefits of 3D technology without exacerbating thermal management issues when implemented in early-stage electrical design and layout tools. View full abstract»

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  • 13. Thermal cycling analysis of flip-chip solder joint reliability

    Publication Year: 2001 , Page(s): 705 - 712
    Cited by:  Papers (53)  |  Patents (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (182 KB) |  | HTML iconHTML  

    The reliability concern in flip-chip-on-board (FCOB) technology is the high thermal mismatch deformation between the silicon die and the printed circuit board that results in large solder joint stresses and strains causing fatigue failure. Accelerated thermal cycling (ATC) test is one of the reliability tests performed to evaluate the fatigue strength of the solder interconnects. Finite element analysis (FEA) was employed to simulate thermal cycling loading for solder joint reliability in electronic assemblies. This study investigates different methods of implementing thermal cycling analysis, namely using the "dwell creep" and "full creep" methods based on a phenomenological approach to modeling time independent plastic and time dependent creep deformations. There are significant differences between the "dwell creep" and "full creep" analysis results for the flip chip solder joint strain responses and the predicted fatigue life. Comparison was made with a rate dependent viscoplastic analysis approach. Investigations on thermal cycling analysis of the temperature range, (ΔT) effects on the predicted fatigue lives of solder joints are reported View full abstract»

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  • 14. Effects of Cu/Al intermetallic compound (IMC) on copper wire and aluminum pad bondability

    Publication Year: 2003 , Page(s): 367 - 374
    Cited by:  Papers (63)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (928 KB) |  | HTML iconHTML  

    Copper wire bonding is an alternative interconnection technology that serves as a viable, and cost saving alternative to gold wire bonding. Its excellent mechanical and electrical characteristics attract the high-speed, power management devices and fine-pitch applications. Copper wire bonding can be a potentially alternative interconnection technology along with flip chip interconnection. However, the growth of Cu/Al intermetallic compound (IMC) at the copper wire and aluminum interface can induce a mechanical failure and increase a potential contact resistance. In this study, the copper wire bonded chip samples were annealed at the temperature range from 150°C to 300°C for 2 to 250 h, respectively. The formation of Cu/Al IMC was observed and the activation energy of Cu/Al IMC growth was obtained from an Arrhenius plot (ln (growth rate) versus 1/T). The obtained activation energy was 26Kcal/mol and the behavior of IMC growth was very sensitive to the annealing temperature. To investigate the effects of IMC formation on the copper wire bondability on Al pad, ball shear tests were performed on annealed samples. For as-bonded samples, ball shear strength ranged from 240-260gf, and ball shear strength changed as a function of annealing times. For annealed samples, fracture mode changed from adhesive failure at Cu/Al interface to IMC layer or Cu wire itself. The IMC growth and the diffusion rate of aluminum and copper were closely related to failure mode changes. Micro-XRD was performed on fractured pads and balls to identify the phases of IMC and their effects on the ball bonding strength. From XRD results, it was confirmed that the major IMC was γ-Cu9Al4 and it provided a strong bondability. View full abstract»

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  • 15. A precise numerical prediction of effective dielectric constant for polymer-ceramic composite based on effective-medium theory

    Publication Year: 2000 , Page(s): 680 - 683
    Cited by:  Papers (66)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (100 KB)  

    Nanostructure polymer-ceramic composite with high dielectric constant (ετ~90) has been developed for embedded capacitor application. This polymer-ceramic system consists of lead magnesium niobate-lead titanate (PMN-PT) ceramic particle and modified high-dielectric constant low-viscosity epoxy resin. In order to obtain precise prediction of effective dielectric constant of this composite, an empirical prediction model based on self-consistent theory is proposed. The electrical polarization mechanism and interaction between epoxy resin and ceramic filler has been studied. This model can establish the relevant constitutional parameters of polymer-ceramic composite materials such as particle shape, composition, and connectivity that determine the dielectric properties of the composite. This model is simpler, uses fewer parameters and its prediction compares better with experiment (error <10%). The precision and simplicity of the model can be exploited for predictions of the properties and design of nanostructure ferroelectric polymer-ceramic composites. The effective-medium theory (EMT) has been proved a good tool to predict effective properties of nanocomposites View full abstract»

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  • 16. Scaling and Optimization of Gravure-Printed Silver Nanoparticle Lines for Printed Electronics

    Publication Year: 2010 , Page(s): 105 - 114
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4557 KB) |  | HTML iconHTML  

    Printed electronics promises to enable new applications such as RFID tags, displays and various types of sensors. Critical to the development of printed electronics is the establishment of a manufacturable printing technique with high resolution and throughput. Gravure is a high-speed roll-to-roll printing technique that has many of the characteristics necessary for a viable printed electronics process. We present the first systematic study on the scaling and optimization of conductive lines for printed electronics, especially with high viscosity nanoparticle inks. We demonstrate gravure-printed nanoparticle lines, which are potentially suitable for use in thin-film transistor (TFT) based circuits as well as passive components. We present several trends observed by varying cell and ink parameters, and compare two different techniques for printing lines. We examine current limits to scaling printed lines and demonstrate the potential viability and scalability of gravure for printed electronics. View full abstract»

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  • 17. Packaging Effect on MEMS Pressure Sensor Performance

    Publication Year: 2007 , Page(s): 285 - 293
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (949 KB) |  | HTML iconHTML  

    In this study, the effect of epoxy based molding compound packaging on a micro-electro-mechanical system (MEMS) pressure sensor performance is investigated. A series of experiments were conducted to characterize the MEMS sensor over temperature and pressure changes by measuring output voltage signals. The sensor was modeled by a finite element method to investigate the stress developments. The molding compound was assumed as elastic and viscoelastic material to examine the material modeling effect on the calculation results. The model was verified by comparing the calculated results with experimental data. It was found that the stress induced by the molding compound had significant influence on the sensor performance, and the accuracy of the calculations was highly dependent on the modeling of the molding compound. Based on the results, the mechanism of the stress development and its effect on the sensor signal were discussed View full abstract»

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  • 18. Dense Vertically Aligned Multiwalled Carbon Nanotube Arrays as Thermal Interface Materials

    Publication Year: 2007 , Page(s): 92 - 100
    Cited by:  Papers (29)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1583 KB) |  | HTML iconHTML  

    Carbon nanotube (CNT) arrays are being considered as thermal interface materials (TIMs). Using a phase sensitive transient thermo-reflectance technique, we measure the thermal conductance of the two interfaces on each side of a vertically aligned CNT array as well as the CNT array itself. We show that the physically bonded interface by van der Waals adhesion has a conductance ~105W/m2K and is the dominant resistance. We also demonstrate that by bonding the free-end CNT tips to a target surface with the help of a thin layer of indium weld, the conductance can be increased to ~106W/m2K making it attractive as a TIM View full abstract»

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  • 19. Reliability of Lead-Free Solder Interconnections in Thermal and Power Cycling Tests

    Publication Year: 2009 , Page(s): 302 - 308
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1295 KB) |  | HTML iconHTML  

    Lead-free solder interconnection reliability of thin fine-pitch ball grid array (BGA) lead-free packages has been studied experimentally as well as with finite-element (FE) simulations. The reliability tests were composed of the thermal shock test, the local thermal cycling test (resistors embedded in the board around the package), and the power cycling test (heat generation in the die). A 3-D board-level finite-element analysis (FEA) with local models was carried out to estimate the reliability of the solder interconnections under various test conditions. Due to the transient nature of the local thermal cycling test and the power cycling test, a sequential thermal-structural coupling analysis was employed to simulate the transient temperature distribution as well as the mechanical responses. Darveaux's approach was used to predict the life time of the solder interconnections. Furthermore, the numerical results validated by the experimental results indicated that the diagonal solder interconnections beneath the die edge were the most critical ones of all the tests studied here. It has been found that the fatigue life in the power cycling test was much longer than that in the other two tests. Detailed discussions about the failure mechanism of solder interconnections as well as the microstructural observations of the primary cracks are reported in this paper. View full abstract»

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  • 20. The Effect of Epoxy Molding Compound on Thermal/Residual Deformations and Stresses in IC Packages During Manufacturing Process

    Publication Year: 2006 , Page(s): 625 - 635
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4306 KB) |  | HTML iconHTML  

    Thermal/residual deformations and stresses in plastic integrated circuit (IC) packages caused by epoxy molding compound (EMC) during the manufacturing process are investigated experimentally (only for deformations), theoretically, and numerically. A real-time Twyman-Green interferometry is used for measuring the out-of-plane thermal and residual deformations of die/EMC bi-material specimens. Dynamic mechanical analysis (DMA) and thermomechanical analysis (TMA) are for characterizing thermomechanical properties of the EMC materials. A finite element model (FEM) and theory associated with experimental observations are employed for understanding the thermal/residual deformations and stresses of IC packages due to EMC encapsulation. It is shown that EMC materials must be fully cured so that the material properties are stable enough for applications. Experimental results show that the EMC material experiences stress relaxation due to its viscoelastic behavior during the post mold curing (PMC) process. As a result, the strains (stresses) resulted from the chemical shrinkage of the EMC curing could be relaxed during the PMC process, so that the chemical shrinkage has no effect on the residual strains (stresses) for the plastic packages being post cured. Compared with numerical and theoretical analyses, the experimental results have demonstrated that die/EMC bi-material structure at high temperature (above Tg) warps less than expected, as a result of viscoelastic stress relaxation of EMC at high temperature (during solder reflow process). Meanwhile, this stress relaxation can also cause shifting this zero-stress temperature to the higher one, so that the residual deformations (stresses) of die/EMC bi-material specimens were found to increase by about 40% after the solder reflow process. The residual and thermal stresses have been resolved by FEM and theoretical analyses. The results suggest that the pure bending stresses (without shear and peel stresses) of the b- - i-material specimens are only limited in the region from x= 0 (the center) to x= 0.75 L due to the free edge effects, but this region is shrunk down to x= 0.4L at 200degC. And the maximum warpage and bending stress per unit temperature change is occurred around 165degC (Tg of the EMC). This study has demonstrated that the Twyman-Green experiment with associated bi-material plate theory and FEM can provide a useful tool for studying the EMC-induce residual/thermal deformations and stresses during the IC packaging fabrication View full abstract»

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  • 21. Contact resistance calculations: generalizations of Greenwood's formula including interface films

    Publication Year: 2001 , Page(s): 50 - 58
    Cited by:  Papers (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (216 KB) |  | HTML iconHTML  

    The calculation of the contact resistance between two rough electrodes is a difficult task, since the contact interface comprises many spots corresponding to more or less conducting paths for the electrons. The present paper starts with an analytical formula derived by J.A. Greenwood (1966) to find the electrical resistance of a cluster of perfect circular microcontacts. It is first shown that Greenwood's formula can be used to derive known and new formulas for the constriction resistance of single spots of various shapes. Then we consider the case where the microcontacts are not perfect, and characterize each microcontact by a film resistance. To generalize Greenwood's formula, we use an intermediate expression derived by this author, and substitute for the constriction resistance term of each spot, a term comprising the constriction resistance and the film resistance. We then test the formulas proposed. In all situations the electrical contact area is modeled by means of a set of square spots. At first, we consider experimental results concerning long rectangular spots. Then, we consider numerical results concerning square ring-shaped spots. And lastly, we consider the ease where two large electrodes communicate through two concentric thin flat rings of variable conductivity. The contact resistance is then calculated using Greenwood's generalized formula and by means of the finite-element method. All tests are passed satisfactorily View full abstract»

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  • 22. Optimization of plate fin heat sinks using entropy generation minimization

    Publication Year: 2001 , Page(s): 159 - 165
    Cited by:  Papers (63)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (148 KB) |  | HTML iconHTML  

    The specification and design of heat sinks for electronic applications is not easily accomplished through the use of conventional thermal analysis tools because “optimized” geometric and boundary conditions are not known a priori. A procedure is presented that allows the simultaneous optimization of heat sink design parameters based on a minimization of the entropy generation associated with heat transfer and fluid friction. All relevant design parameters for plate fin heat sinks, including geometric parameters, heat dissipation, material properties and flow conditions can be simultaneously optimized to characterize a heat sink that minimizes entropy generation and in turn results in a minimum operating temperature. In addition, a novel approach for incorporating forced convection through the specification of a fan curve is integrated into the optimization procedure, providing a link between optimized design parameters and the system operating point. Examples are presented that demonstrate the robust nature of the model for conditions typically found in electronic applications. The model is shown to converge to a unique solution that gives the optimized design conditions for the imposed problem constraints View full abstract»

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  • 23. Electrical breakdown in atmospheric air between closely spaced (0.2 μm-40 μm) electrical contacts

    Publication Year: 2002 , Page(s): 390 - 396
    Cited by:  Papers (65)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (375 KB) |  | HTML iconHTML  

    The increasing importance of electrical contacts in air with micrometer spacing prompted recent experiments on the electrical breakdown behavior of these gaps. The electrical field between the contacts used in one of the experiments was analyzed using finite element analysis to model the electric field. The experimental data on the electrical breakdown voltage could be divided into three regions as a function of the gap spacing. First, at close gap spacing (≤4 μm) both the breakdown voltages as well as the electrical fields at the cathode were similar to values measured during the breakdown of vacuum gaps of less than 200 μm. Second, at larger gaps (>6 μm) the breakdown voltages followed Paschen's curve for the Townsend electron avalanche process in air. Finally, in between these two regions the breakdown values were below the expected values for purely vacuum breakdown or purely Townsend breakdown. The breakdown phenomena have been discussed in terms of field emission of electrons from the cathode and their effect on initiating the observed breakdown regimes. View full abstract»

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  • 24. Low-Temperature Sintering of Nanoscale Silver Paste for Attaching Large-Area ({>}100~{\rm mm}^{2}) Chips

    Publication Year: 2010 , Page(s): 98 - 104
    Cited by:  Papers (43)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1680 KB) |  | HTML iconHTML  

    A low-temperature sintering technique enabled by a nanoscale silver paste has been developed for attaching large-area (>100 mm2) semiconductor chips. This development addresses the need of power device or module manufacturers who face the challenge of replacing lead-based or lead-free solders for high-temperature applications. The solder-reflow technique for attaching large chips in power electronics poses serious concern on reliability at higher junction temperatures above 125??C. Unlike the soldering process that relies on melting and solidification of solder alloys, the low-temperature sintering technique forms the joints by solid-state atomic diffusion at processing temperatures below 275??C with the sintered joints having the melting temperature of silver at 961??C. Recently, we showed that a nanoscale silver paste could be used to bond small chips at temperatures similar to soldering temperatures without any externally applied pressure. In this paper, we extend the use of the nanomaterial to attach large chips by introducing a low pressure up to 5 MPa during the densification stage. Attachment of large chips to substrates with silver, gold, and copper metallization is demonstrated. Analyses of the sintered joints by scanning acoustic imaging and electron microscopy showed that the attachment layer had a uniform microstructure with micrometer-sized porosity with the potential for high reliability under high-temperature applications. View full abstract»

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  • 25. Contact physics of gold microcontacts for MEMS switches

    Publication Year: 1999 , Page(s): 357 - 364
    Cited by:  Papers (125)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (708 KB)  

    This work presents a study of gold metallic contacts regarding contact resistance, heat dissipation, and surface damage in the normal-force regime of tens to hundreds of μN, which is typical of the contact forces from microactuation. The purpose of this work is to present the micromechanical switch designer with practical information on gold contact phenomena in this force regime, as most work in micrometallic contacts has focused on contact forces greater than 1 mN. Results indicate actuation forces of several hundred μN are required for reliable fully metallic contacts, with resistance and current carrying ability primarily dependent on morphology, thermal management, and nm-depth material properties of the contact electrodes View full abstract»

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  • 26. Double-sided cooling for high power IGBT modules using flip chip technology

    Publication Year: 2001 , Page(s): 698 - 704
    Cited by:  Papers (31)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (184 KB) |  | HTML iconHTML  

    A new technique for the packaging of IGBT modules has been developed. The components are sandwiched between two direct bond copper (DBC) substrates with aluminum nitride. Wire bonds are replaced with flip chip solder bumps, which allows cooling of components on both sides. Microchannel heat sinks are directly integrated in the package to decrease the thermal resistance of the module. Thus, a very compact module with high thermal performance is obtained. A prototype with two insulated gate bipolar transistors (IGBTs) and four diodes associated in parallel was realized and tested. In this paper, the innovative packaging technique is described, and results of thermal tests are presented View full abstract»

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  • 27. Interfacial shear stress, peeling stress, and die cracking stress in trilayer electronic assemblies

    Publication Year: 2000 , Page(s): 309 - 316
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (176 KB)  

    Interfacial shear stress, peeling stress, and die cracking stress due to thermal and elastic mismatch in layered electronic assemblies are one of the major causes of the mechanical failure of electronic packages. A simple but rather accurate method is developed to estimate these thermal stresses for packages with different layer lengths. For layered electronics with thin adhesives, analytical expressions are obtained for interfacial shear stress and peeling stress, and they agree well with the finite element analysis, especially when the moduli of adhesive layers are significantly lower than the moduli of the other layers. An analytic expression of die cracking stress is also obtained for multilayer electronic assemblies View full abstract»

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  • 28. UTCP: A Novel Polyimide-Based Ultra-Thin Chip Packaging Technology

    Publication Year: 2010 , Page(s): 754 - 760
    Cited by:  Papers (15)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2405 KB) |  | HTML iconHTML  

    Flexible materials, today, are being used already as base substrates for electronic assembly. A lot of mounted components could be integrated in flexible polyimide (PI) substrates. Very interesting advantages of integrating components into the flex are compactness and enhanced flexibility; not only the interconnection but also the components themselves can be mechanically flexible. This paper describes a PI-based embedding technology for integrating very thin silicon chips in between two spin-on PI layers, the ultra-thin chip package (UTCP). This paper discusses the different process steps in the UTCP production and also presents the interconnection test results realized with this technology. View full abstract»

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  • 29. Optimization study of stacked micro-channel heat sinks for micro-electronic cooling

    Publication Year: 2003 , Page(s): 55 - 61
    Cited by:  Papers (38)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (475 KB) |  | HTML iconHTML  

    With smaller inlet flow velocity, a micro-channel stack requires less pumping power to remove a certain rate of heat than a single-layered micro-channel, because it provides a larger heat transfer area. A simple thermal resistance network model was developed to evaluate the overall thermal performance of a stacked micro-channel heat sink. Based on this simple model, in this study, a single objective minimization of overall thermal resistance is carried out using genetic algorithms. The aspect ratio, fin thickness and the ratio of channel width to fin thickness are the variables to be optimized, subject to constraints of maximum pressure drop (4 bar) and maximum volumetric flow rate (1000 ml/min). During the optimization, the overall dimensions, number of layers and pumping power (product of pressure drop and flow rate) are fixed. The study indicates that reduction in thermal resistance can be achieved by optimizing the channel configuration. The effects of number of layers in the stack, pumping power per unit area, and the channel length are also investigated. View full abstract»

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  • 30. Design and Simulation of the CPU Fan and Heat Sinks

    Publication Year: 2008 , Page(s): 890 - 903
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1534 KB) |  | HTML iconHTML  

    Traditional design methods to achieve improvement in heat sink performance are not suitable for meeting new thermal challenges. Revolutionary rather than evolutionary concepts are required for removing heat from the electronic components. We have recently developed an emerging novel approach, the integration design of the forced convection air cooling system. The aerodynamic design for the miniature axial-flow fan is conducted and a CPU fan is designed to be integrated with the radial fins in order to form a complete fan-heat sink assembly. The 3-D data of the fan generated by FORTRAN program are imported into Pro/E to create its 3-D model. The performance curve of the fan prototype fabricated by the computer numerically controlled machine is tested in a standard wind tunnel. To reduce the economic cost and prompt the design efficiency, the computational fluid dynamics is adopted to estimate the initial fan's performance. A series of radial heat sinks is designed in accordance with the outflow angle of airflow discharged from the fan. The inlet angle of the fin is arranged so that the incoming flow from the upstream impeller matches the fin's angle of heat sinks. Using the multi-block hexahedral grid technique, the numerical simulation of the system, including the fan and heat sinks, is performed by means of Multiple Reference Frame (MRF) and RNG k-epsiv Model. Our results indicate that the thermal resistance of the streamlined heat sink is decreased by 15.9% compared to the traditional heat sink and the entropy generation rate of the streamlined heat sink is lower. The experiments support our simulation results. The series of heat sinks is able to achieve the productive thermal performance when the integration design concept is utilized. View full abstract»

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  • 31. Comparison of Micro-Pin-Fin and Microchannel Heat Sinks Considering Thermal-Hydraulic Performance and Manufacturability

    Publication Year: 2010 , Page(s): 148 - 160
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2313 KB) |  | HTML iconHTML  

    This paper explores the potential of micro-pin-fin heat sinks as an effective alternative to microchannel heat sinks for dissipating high heat fluxes from small areas. The overall goal is to compare microchannel and micro-pin-fin heat sinks based on three metrics: thermal performance, hydraulic performance, and cost of manufacturing. The channels and pins of the microchannel and micro-pin-fin heat sinks, respectively, have a width of 200 ??m and a height of 670 ??m. A comparison of the thermal-hydraulic performance shows that the micro-pin-fin heat sink has a lower convection thermal resistance at liquid flow rates above approximately 60 g/min, though this is accompanied by a higher pressure drop. Methods that could feasibly fabricate the two heat sinks are reviewed, with references outlining current capabilities and limitations. A case study on micro-end-milling of the heat sinks is included. This paper includes equations that separate the fabrication cost into the independent variables that contribute to material cost, machining cost, and machining time. It is concluded that, with micro-end-milling, the machining time is the primary factor in determining cost, and, due to the additional machining time required, the micro-pin-fin heat sinks are roughly three times as expensive to make. It is also noted that improvements in the fabrication process, including spindle speed and tool coatings, will decrease the difference in cost. View full abstract»

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  • 32. Current and future miniature refrigeration cooling technologies for high power microelectronics

    Publication Year: 2002 , Page(s): 356 - 365
    Cited by:  Papers (43)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (423 KB) |  | HTML iconHTML  

    Utilizing refrigeration may provide the only means by which future high-performance electronic chips can be maintained below predicted maximum temperature limits. Widespread application of refrigeration in electronic packaging will remain limited, until the refrigerators can be made sufficiently small so that they can be easily incorporated within the packaging. A review of existing microscale and mesoscale refrigeration systems revealed that only thermoelectric coolers (TECs) are now commercially available in small sizes. However, existing TECs are limited by their maximum cooling power and low efficiencies. A simple model was constructed to analyze the performance of both existing and predicted future TECs, in an electronic packaging environment. Comparison with the cooling provided by an existing high-performance fan shows that they are most effective for heat loads less than approximately 100 W, but that for higher heat loads, fan air cooling actually yields a lower junction temperature. Thermal resistance between the refrigerator and the chip is not as critical as the thermal resistance between the refrigerator and the ambient air. View full abstract»

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  • 33. An overview of experimental methodologies and their applications for die strength measurement

    Publication Year: 2003 , Page(s): 423 - 428
    Cited by:  Papers (16)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (589 KB) |  | HTML iconHTML  

    As the trends in semiconductor packages continue toward a decrease in overall package size and an increase in functionality and performance requirements, they bring challenges of processing, handling, and understanding smaller components and, in particular, thinner dies. In the meantime, high reliability remains a critical necessity. It is necessary to be able to appropriately characterize thinned dies in terms of their mechanical integrity and, equally important, in terms of the processes used to produce them. In practice, die strength can be adversely affected during various manufacturing processes, such as thinning and singulation. A realistic understanding of the significance of processing on die strength is gained through the study of the actual, processed component. This work outlines three methodologies that enable the measurement of die strength and demonstrates their application in three studies. Characterization of die damage, experimentation, and failure analysis are coupled to gain understanding of die strength with respect to processing conditions. The approaches demonstrated ultimately show the use of such information toward quantifying die strength, developing design criteria, selecting wafer processes, and optimizing processes. View full abstract»

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  • 34. Analysis of Convective Thermal Resistance in Ducted Fan-Heat Sinks

    Publication Year: 2006 , Page(s): 439 - 448
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (613 KB) |  | HTML iconHTML  

    The thermal performance of plate fin, round pin-fin, and offset strip-fin heat sinks with a duct-flow type fan arrangement was analytically evaluated. Heat sinks of 65mmtimes60 mm plan areatimes50 mm height with a 4300-RPM dc fan (60mmtimes15mm) were chosen for the performance comparison. A constant temperature, 6-mm thick heat sink base plate is assumed so that thermal spreading resistance is not involved. The operating point on the fan curve is based on the flow pressure drop impedance curve through a heat sink using the friction factor correlation for the chosen heat sink. The loss coefficients at both the entrance and the exit of the heat sink are included in the flow impedance curve. The operating point is defined by the balance point of the flow impedance curve and the fan performance curve. After determining the operating air velocity, the convective thermal resistance of heat sinks is evaluated from the Nusselt number correlation for the chosen heat sink. Results obtained show that optimized round pin-fin heat sinks provide 32.8%-46.4% higher convective thermal resistance compared to an optimized plate-fin heat sink. The optimized offset strip-fin heat sink shows a slightly lower convective thermal resistance than the plate-fin heat sink. As the offset strip length decreases, however, thermal performance seriously deteriorates View full abstract»

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  • 35. Thermal design and optimization of natural convection polymer pin fin heat sinks

    Publication Year: 2005 , Page(s): 238 - 246
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1096 KB) |  | HTML iconHTML  

    The design and optimization methodology of a thermally conductive polyphenylene sulphide (PPS) polymer staggered pin fin heat sink, for an advanced natural convection cooled microprocessor application, are described using existing analytical equations. The geometric dependence of heat dissipation and the relationships between the pin fin height, pin diameter, horizontal spacing, and pin fin density for a fixed base area and excess temperature are discussed. Experimental results of a pin finned thermally conductive PPS heat sink in natural convection indicate substantially high thermal performance. Numerical results substantiate analytical modeling results for heat sinks within the Aihara et al. fin density range. The cooling rates and coefficient of thermal performance, COPT, that relates cooling capability to the energy invested in the formation of the heat sink, has been determined for such heat sinks and compared with conventional aluminum heat sinks. View full abstract»

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  • 36. Comprehensive system-level optimization of thermoelectric devices for electronic cooling applications

    Publication Year: 2008 , Page(s): 23 - 31
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1163 KB) |  | HTML iconHTML  

    Advanced cooling solutions are needed to address the growing challenges posed by future generations of microprocessors. This paper outlines an optimization methodology for electronic system based thermoelectric (TE) cooling. This study stresses that an optimum TE cooling system should keep the electronic device below a critical junction temperature while utilizing the smallest possible heat sink. The methodology considers the electric current and TE geometry that will minimize the junction temperature. A comparison is made between the junction temperature minimization scheme and the more conventional coefficient of performance (COP) maximization scheme. It is found that it is possible to design a TE solution that will both maximize the COP and minimize the junction temperature. Experimental measurements that validate the modeling are also presented. View full abstract»

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  • 37. Electronic part life cycle concepts and obsolescence forecasting

    Publication Year: 2000 , Page(s): 707 - 717
    Cited by:  Papers (17)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (196 KB)  

    Obsolescence of electronic parts is a major contributor to the life cycle cost of long-field life systems such as avionics. A methodology to forecast life cycles of electronic parts is presented, in which both years to obsolescence and life cycle stages are predicted. The methodology embeds both market and technology factors based on the dynamic assessment of sales data. The predictions enabled from the models developed in this paper allow engineers to effectively manage the introduction and on-going use of long field-life products based on the projected life cycle of the parts incorporated into the products. Application of the methodology to integrated circuits is discussed and obsolescence predictions for dynamic random access memories (DRAMs) are demonstrated. The goal is to significantly reduce design iterations, inventory expenses, sustainment costs, and overall life cycle product costs View full abstract»

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  • 38. Capacitive Pressure Sensor With Very Large Dynamic Range

    Publication Year: 2010 , Page(s): 79 - 83
    Cited by:  Papers (15)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (382 KB) |  | HTML iconHTML  

    A new capacitive pressure sensor with very large dynamic range is introduced. The sensor is based on a new technique for substantially changing the surface area of the electrodes, rather than the inter-electrode spacing as commonly done at the present. The prototype device has demonstrated a change in capacitance of approximately 2500 pF over a pressure range of 10 kPa. View full abstract»

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  • 39. Studies on Optical Consistency of White LEDs Affected by Phosphor Thickness and Concentration Using Optical Simulation

    Publication Year: 2010 , Page(s): 680 - 687
    Cited by:  Papers (16)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1350 KB) |  | HTML iconHTML  

    Effects of variations of yttrium aluminum garnet:Ce phosphor thickness and concentration on optical consistency of produced white light-emitting diodes (LEDs) including the consistency of brightness and light colors were studied by optical simulation. Five packaging methods with different phosphor locations were compared. Optical models of LED chip and the phosphor were presented and a Monte Carlo ray-tracing simulation procedure was developed. Both color binning and brightness level were used to sort the simulated LEDs to evaluate their optical consistency. Results revealed that the optical consistency of white LEDs strongly depends on how the phosphor thickness and the concentration vary. To obtain desired color binning, conformal phosphor coating is not a favorable packaging method due to its low brightness level and poor brightness consistency by large shifts of the brightness level as the phosphor thickness and concentration varying. Planar remoter phosphor improves the brightness level and its consistency, but realization of high color consistency becomes more difficult due to its smaller variation ranges of the phosphor thickness and concentration. Hemispherical remoter phosphor can fulfill the requirements of both high color consistency and high brightness consistency due to its capability of larger variation ranges of the phosphor thickness and concentration. By applying this method with thick phosphor thickness or high phosphor concentration, this method can be a promising packaging method for the low cost production. View full abstract»

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  • 40. Heat Transfer Analysis in a Rectangular Duct Without and With Cross-Flow and an Impinging Synthetic Jet

    Publication Year: 2010 , Page(s): 488 - 497
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (818 KB) |  | HTML iconHTML  

    A synthetic jet is a zero-net-mass-flux device, which synthesizes stagnant air to form a jet, and is potentially useful for cooling. Due to the inherent suction and ejection processes in a synthetic jet, its utility in a confined enclosure is not obvious. The synthetic jet impingement heat transfer characteristics inside a rectangular duct are studied in this paper. In addition, the effect of cross-flow created using either fans or another synthetic jet on its heat dissipation capability is examined. Experiments are conducted for different jet Reynolds numbers (Re), in the range of 950-4000, at different offset positions of the synthetic jet with respect to a heated block flush mounted on one surface of the duct. The height of the duct is the same (25 mm) for all measurements while the width is varied between 110 mm and 330 mm in order to examine the effect of confinement on the heat transfer coefficient. The change in the width of the duct is found to have a negligible effect on heat transfer. The heat transfer coefficient is found to be more with synthetic jet direct impingement (150 W/m2 · K) than with combined flow (both impingement and cross-flow) (134 W/m2 · K) or with only cross-flow (45 W/m2 · K) in the duct. The offset of the synthetic jet from the center of the heated block is found to drastically reduce the heat transfer. These results are expected to be useful for designing synthetic jet-based cooling solutions. View full abstract»

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  • 41. Contact resistance of thin metal film contacts

    Publication Year: 2006 , Page(s): 371 - 378
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (843 KB) |  | HTML iconHTML  

    To be able to reduce the size of products having electronic devices, it becomes more and more important to miniaturize the electromechanical parts of the system. The use of micromechanical connectors and contact structures implies the need of methods for estimating the properties of such devices. This work will, by use of finite element modeling, treat the influence of a thin film constituting at least one of the contacting members of an electrical contact. The error introduced by using the traditional Maxwell/Holm contact constriction resistance theory will be investigated. Numerical methods are used to present a way to approximate the total resistance for the thin metal film contact View full abstract»

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  • 42. Effect of Permittivity and Permeability of a Flexible Magnetic Composite Material on the Performance and Miniaturization Capability of Planar Antennas for RFID and Wearable Wireless Applications

    Publication Year: 2009 , Page(s): 849 - 858
    Cited by:  Papers (1)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (917 KB) |  | HTML iconHTML  

    This paper is an investigation of the feasibility of applying a mechanically flexible magnetic composite material to radio frequency identification (RFID) planar antennas operating in the lower ultrahigh-frequency (UHF) spectrum (~300500 MHz). A key challenge is that the magnetic loss introduced by the magnetic composite must be sufficiently low for successful application at the targeted operating frequency. A flexible magnetic composite comprised of particles of Z-phase Co hexaferrite, also known as Co2Z, in a silicone matrix was developed. To the authors' knowledge, this is the first flexible magnetic composite demonstrated to work at these frequencies. The benchmarking structure was a quarter-wavelength microstrip patch antenna. Antennas on the developed magnetic composite and pure silicone substrates were electromagnetically modeled in Ansoft High-Frequency Sounder System full wave electromagnetic software. A prototype of the antenna on the magnetic composite was fabricated, and good agreement between the simulated and measured results was found. Comparison of the antennas on the magnetic composite versus the pure silicone substrate showed miniaturization capability of 2.4 times and performance differences of increased bandwidth and reduced gain, both of which were attributed in part to the increase in the dielectric and magnetic losses. A key finding of this paper is that a small amount of permeability (mur~2.5) can provide a substantial capability for miniaturization, while sufficiently low-magnetic loss can be introduced for successful application at the targeted operating frequency. This magnetic composite shows the capability to fulfill this balance and to be a feasible option for RFID, flexible wearable, and conformal applications in the lower UHF spectrum. View full abstract»

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  • 43. Room-Temperature Sintering Process of Ag Nanoparticle Paste

    Publication Year: 2009 , Page(s): 627 - 632
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2779 KB) |  | HTML iconHTML  

    Recently, the authors developed a novel room-temperature wiring method using Ag nanoparticle paste. In this paper, the sintering mechanism of the Ag nanoparticle paste was clarified through examination of the adsorption stability and the removal of the dispersant from the Ag nanoparticles. The Ag nanoparticles in the paste are protected by dodecylamine as a dispersant. This paste possesses substantially long shelf life and thermo stability at room temperature. When the printed line of the Ag nanoparticle paste is dipped in a methanol bath, methanol effectively dissolves and removes the dispersant from the nanoparticles. Ag nanoparticles are sintered within a short period. The sintering of Ag nanoparticles is not uniform. Some Ag nanoparticles quickly grow and form a network by sintering (necking). The others maintain a nanometer scale. Large Ag particles and an Ag skeleton continue to grow by absorbing very small nanoparticles. In addition, the use of ethanol and isopropanol as the treatment agent is shown for the first time. View full abstract»

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  • 44. A life consumption monitoring methodology for electronic systems

    Publication Year: 2003 , Page(s): 625 - 634
    Cited by:  Papers (54)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1921 KB) |  | HTML iconHTML  

    Failures in electronic products are often attributable to various combinations, intensities, and durations of environmental loads, such as temperature, humidity, vibration, and radiation. For many of the failure mechanisms in electronic products, there are models that relate environmental loads to the time to failure of the product. Thus, by monitoring the environment of a product over its life cycle, it may be possible to determine the amount of damage induced by various loads and predict when the product might fail. This paper describes the development of a physics-of-failure-based methodology for determining the damage or life consumption in a product. As a demonstration of the methodology, a data recorder has been used to monitor the temperature and vibration loads on a printed circuit board placed under the hood of a car. The data collected by the recorder has been used to determine the life consumption in the solder joints of the printed circuit board due to temperature and vibration loading. The calculated remaining life has then been compared with temperature cycling test results on the board to assess the validity of the approach. View full abstract»

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  • 45. High heat flux heat pipe mechanism for cooling of electronics

    Publication Year: 2001 , Page(s): 220 - 225
    Cited by:  Papers (30)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (148 KB)  

    This paper discusses an advanced heat pipe mechanism that has the potential of achieving heat flux capabilities over 250 W/cm2. The mechanism utilizes thermally driven pulsating two-phase flow to achieve high heat flux capability and heat transfer coefficient. A simplified hydrodynamic model in was developed to guide the proof-of-concept heat pipe design. A more detailed numerical model was also developed and will be solved to predict the heat pipe's thermal performance. Test results of proof-of-concept heat pipes verified the heat flux capability of the advanced mechanism and the accuracy of the simplified model. Pulsating heat pipes are feasible approaches to removing increasing heat dissipation densities in electronic equipment View full abstract»

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  • 46. Model for BGA and CSP reliability in automotive underhood applications

    Publication Year: 2004 , Page(s): 585 - 593
    Cited by:  Papers (55)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1688 KB)  

    Fine-pitch ball grid array (BGA) and underfills have been used in benign office environments and wireless applications for a number of years, however their reliability in automotive underhood environment is not well understood. In this work, the reliability of fine-pitch plastic ball grid array (PBGA) packages has been evaluated in the automotive underhood environment. Experimental studies indicate that the coefficient of thermal expansion (CTE) as measured by thermomechanical analyzer (TMA) typically starts to change at 10-15°C lower temperature than the Tg specified by differential scanning calorimetry (DSC) potentially extending the change in CTE well into the accelerated test envelope in the neighborhood of 125°C. High Tg substrates with glass-transition temperatures much higher than the 125°C high temperature limit, are therefore not subject to the effect of high coefficient of thermal expansion close to the high temperature of the accelerated test. Darveaux's damage relationships were derived on ceramic ball grid array (CBGA) assemblies, with predominantly solder mask defined (SMD) pads and 62Sn36Pb2Ag solder. In addition to significant differences in the crack propagation paths for the two pad constructions, SMD pads fail significantly faster than the non solder mask defined (NSMD) pads in thermal fatigue. The thermal mismatch on CBGAs is much larger than PBGA assemblies. Crack propagation in CBGAs is often observed predominantly on the package side as opposed to both package and board side for PBGAs. In the present study, crack propagation data has been acquired on assemblies with 15, 17, and 23mm size plastic BGAs with NSMD pads and 63Sn37Pb on high-Tg printed circuit boards. The data has been benchmarked against Darveaux's data on CBGA assemblies. Experimental matrix also encompasses the effect of bis-maleimide triazine (BT) substrate thickness on reliability. Damage constants have been developed and compared against existing Darveaux Constants. Prediction error has been quantified for both sets of constants. View full abstract»

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  • 47. Planar LTCC Transformers for High-Voltage Flyback Converters

    Publication Year: 2010 , Page(s): 359 - 372
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2402 KB) |  | HTML iconHTML  

    This paper discusses the design and use of low-temperature (850°C to 950°C) cofired ceramic (LTCC) planar magnetic flyback transformers for applications that require conversion of a low-voltage to high-voltage (> 100-V) with significant volumetric constraints. Measured performance and modeling results for multiple designs show that the LTCC flyback transformer design and construction imposes serious limitations on the achievable coupling, and significantly impacts the transformer performance and output voltage. This paper discusses the impact of various design factors that can provide improved performance by increasing transformer coupling and output voltage. The experiments performed on prototype units demonstrate LTCC transformer designs capable of greater than 2-kV output. Finally, the paper investigates the effect of the LTCC microstructure on transformer insulation. Although this paper focuses on generating voltages in the kV range, the experimental characterization and discussion presented in this paper applies to designs requiring lower voltage. View full abstract»

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  • 48. Prognostics and Health Management of Electronic Packaging

    Publication Year: 2006 , Page(s): 666 - 677
    Cited by:  Papers (46)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (3805 KB) |  | HTML iconHTML  

    The current state of the art in managing system reliability is geared toward the development of predictive models for unaged pristine materials. The current state of art allows the prediction of time-to-failure for a pristine material under known loading conditions based on relationships such as the Paris' power law , , the Coffin-Manson relationship [2], [13], [23], [24], and the S-N diagram. There is a need for methods and processes which will allow interrogation of material state in complex systems and subsystems to determine the remaining useful life prior to repair or replacement. This capability of determination of material or system state is called prognosis. In this paper, a methodology for prognostication of electronics has been demonstrated with data of leading indicators of failure for accurate assessment of product damage prior to appearance of any macro indicators of damage. Proxies for leading indicators of failure have been identified. Examples of proxies include microstructural evolution characterized by average phase size and correlated to time and equivalent creep strain rate, and stresses at interface of silicon structures. Structures examined include an electronics package and microelectromechanical systems package and interconnections. The test vehicle includes packages that have been mounted on a metal-backed printed circuit board typical of electronics deployed in harsh environments. In application environment, the metal backing provides thermal dissipation, mechanical stability, and interconnections reliability. Since an aged material knows its state, the research presented in this paper focuses on enhancing the understanding of material damage to facilitate proper interrogation of material state. A mathematical relationship has been developed between phase growth rate and time-to-1-percent failure to enable the computation of damage manifested and a forward estimate of residual life View full abstract»

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  • 49. A novel hybrid heat sink using phase change materials for transient thermal management of electronics

    Publication Year: 2005 , Page(s): 281 - 289
    Cited by:  Papers (31)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (656 KB) |  | HTML iconHTML  

    A hybrid heat sink concept which combines passive and active cooling approaches is proposed. The hybrid heat sink is essentially a plate fin heat sink with the tip immersed in a phase change material (PCM). The exposed area of the fins dissipates heat during periods when high convective cooling is available. When the air cooling is reduced, the heat is absorbed by the PCM. The governing conservation equations are solved using a finite-volume method on orthogonal, rectangular grids. An enthalpy method is used for modeling the melting/re-solidification phenomena. Results from the analysis elucidate the thermal performance of these hybrid heat sinks. The improved performance of the hybrid heat sink compared to a finned heat sink (without a PCM) under identical conditions, is quantified. In order to reduce the computational time and aid in preliminary design, a one-dimensional fin equation is formulated which accounts for the simultaneous convective heat transfer from the finned surface and melting of the PCM at the tip. The influence of the location, amount, and type of PCM, as well as the fin thickness on the thermal performance of the hybrid heat sink is investigated. Simple guidelines are developed for preliminary design of these heat sinks. View full abstract»

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  • 50. Characterization of compact heat sink models in natural convection

    Publication Year: 2002 , Page(s): 78 - 86
    Cited by:  Papers (11)
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    In this study, an approximate analytical-numerical procedure is used to model natural convection cooling of heat sinks using electronics cooling software. The analysis evolves in two stages: a numerical simulation of the detailed heat sink, and a simulation of a compact model that exhibits similar thermal and flow resistance characteristics to those of the actual heat sink. From the analysis, the thermal resistance of the heat sink is evaluated. Subsequently, the effective thermal conductivity that must be assigned to the compact heat sink is determined using the Nusselt number correlation for free convection over a vertical plate. Due to the algebraic form of the Nusselt number correlation, the effective thermal conductivity is determined in an iterative fashion. The purpose of a compact heat sink is to reduce computational effort while retaining a desired level of accuracy. In this article, the compact modeling scheme is first applied to either an extruded or a pin-fin heat sink in order to validate the procedure under laminar conditions. Subsequently, the same approach is applied to a multichip system consisting of a set of pin-fin heat sinks placed in series. At both individual and system-level models, it is found that the compact approach results in substantial savings in mesh size and computing time. These savings are accompanied by a small acceptable error that is less than 10% relative to the detailed model predictions View full abstract»

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IEEE Transactions on Components and Packaging Technologies publishes research and applications articles on the modeling, building blocks, technical infrastructure, and analysis underpinning electronic, photonic, MEMS and sensor packaging.

 

This Transaction ceased production in 2010. The current publication is titled IEEE Transactions on Components, Packaging, and Manufacturing Technology.

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Editor-in-Chief
Koneru Ramakrishna
Freescale Semiconductor, Inc.