IRE Transactions on Electronic Computers

Includes the top 50 most frequently accessed documents for this publication according to the usage statistics for the month of

  • The CORDIC Trigonometric Computing Technique

    Publication Year: 1959, Page(s):330 - 334
    Cited by:  Papers (810)  |  Patents (119)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (826 KB)

    The COordinate Rotation DIgital Computer(CORDIC) is a special-purpose digital computer for real-time airborne computation. In this computer, a unique computing technique is employed which is especially suitable for solving the trigonometric relationships involved in plane coordinate rotation and conversion from rectangular to polar coordinates. CORDIC is an entire-transfer computer; it contains a ... View full abstract»

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  • An Algorithm for Path Connections and Its Applications

    Publication Year: 1961, Page(s):346 - 365
    Cited by:  Papers (642)  |  Patents (19)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2799 KB)

    The algorithm described in this paper is the outcome of an endeavor to answer the following question: Is it possible to find procedures which would enable a computer to solve efficiently path-connection problems inherent in logical drawing, wiring diagramming, and optimal route finding? The results are highly encouraging. Within our framework, we are able to solve the following types of problems: ... View full abstract»

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  • Computer Multiplication and Division Using Binary Logarithms

    Publication Year: 1962, Page(s):512 - 517
    Cited by:  Papers (141)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (826 KB)

    A method of computer multiplication and division is proposed which uses binary logarithms. The logarithm of a binary number may be determined approximately from the number itself by simple shifting and counting. A simple add or subtract and shift operation is all that is required to multiply or divide. Since the logarithms used are approximate there can be errors in the result. An error analysis i... View full abstract»

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  • On the Encoding of Arbitrary Geometric Configurations

    Publication Year: 1961, Page(s):260 - 268
    Cited by:  Papers (731)  |  Patents (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1465 KB)

    A method is described which permits the encoding of arbitrary geometric configurations so as to facilitate their analysis and manipulation by means of a digital computer. It is shown that one can determine through the use of relatively simple numerical techniques whether a given arbitrary plane curve is open or closed, whether it is singly or multiply connected, and what area it encloses. Further,... View full abstract»

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  • Signed-Digit Numbe Representations for Fast Parallel Arithmetic

    Publication Year: 1961, Page(s):389 - 400
    Cited by:  Papers (791)  |  Patents (21)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2274 KB)

    This paper describes a class of number representations which are called signed-digit representations. Signed-digit representations limit carry-propagation to one position to the left during the operations of addition and subtraction in digital computers. Carry-propagation chains are eliminated by the use of redundant representations for the operands. Redundancy in the number representation allows ... View full abstract»

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  • Carry-Select Adder

    Publication Year: 1962, Page(s):340 - 346
    Cited by:  Papers (131)  |  Patents (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (845 KB)

    A large, extremely fast digital adder with sum selection and multiple-radix carry is described. Boolean expressions for the operation are included. The amount of hardware and the logical delay for a 100-bit ripple-carry adder and a carry-select adder are compared. The adder system described increases the speed of the addition process by reducing the carry-propagation time to the minimum commensura... View full abstract»

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  • Regular Expressions and State Graphs for Automata

    Publication Year: 1960, Page(s):39 - 47
    Cited by:  Papers (178)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1573 KB)

    Algorithms are presented for 1) converting a state graph describing the behavior of an automaton to a regular expression describing the behavior of the same automaton (section 2), and 2) for converting a regular expression into a state graph (sections 3 and 4). These algorithms are justified by theorems, and examples are given. The first section contains a brief introduction to state graphs and th... View full abstract»

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  • A New Class of Digital Division Methods

    Publication Year: 1958, Page(s):218 - 222
    Cited by:  Papers (162)  |  Patents (17)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (890 KB)

    This paper describes a class of division methods best suited for use in digital computers with facilities for floating point arithmetic. The division methods may be contrasted with conventional division procedures by considering the nature of each quotient digit as generated during the division process. In restoring division, each quotient digit has one of the values 0,1, . . . , r -1, for an arbi... View full abstract»

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  • Conditional-Sum Addition Logic

    Publication Year: 1960, Page(s):226 - 231
    Cited by:  Papers (243)  |  Patents (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (848 KB)

    Conditional-sum addition is a new mechanism for parallel, high-speed addition of digitally-represented numbers. Its design is based on the computation of ``conditional'' sums and carries that result from the assumption of all the possible distributions of carries for various groups of columns. A rapid-sequence mode of operation provides an addition rate that is invariant with the lengths of the su... View full abstract»

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  • Solving Integral Equations on a Repetitive Differential Analyzer

    Publication Year: 1960, Page(s):503 - 506
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1817 KB)

    Methods of practical solution of integral equations on electronic differential analyzers are not well developed. In those cases where such methods have been outlined, special and costly additional equipment is required. Results presented in this work show that practical solution of integral equations is possible using a repetitive differential analyzer of convenient design. View full abstract»

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  • An optimum character recognition system using decision functions

    Publication Year: 1957, Page(s):247 - 254
    Cited by:  Papers (121)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1285 KB)

    The character recognition problem, usually resulting from characters being corrupted by printing deterioration and/or inherent noise of the devices, is considered from the viewpoint of statistical decision theory. The optimization consists of minimizing the expected risk for a weight function which is preassigned to measure the consequences of system decisions As an alternative minimization of the... View full abstract»

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  • The Design of Diode-Transistor NOR Circuits

    Publication Year: 1960, Page(s):15 - 24
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2853 KB)

    Considerations leading to the adoption of diode-transistor NOR circuitry for a moderately fast data-processing system are outlined. The design of the basic circuit is treated in detail. Development of a unique set of compatible logic packages from the basic circuit is described. This set is unique in the sense that a single type of diode-transistor circuit is used to provide the great majority of ... View full abstract»

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  • The Residue Number System

    Publication Year: 1959, Page(s):140 - 147
    Cited by:  Papers (164)  |  Patents (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1286 KB)

    A novel number system called the residue number system is developed from the linear congruence viewpoint. The residue number system is of particular interest because the arithmetic operations of addition, subtraction and multiplication may be executed in the same period of time without the need for carry. The main difficulties of the residue code pertain to the determination of the relative magnit... View full abstract»

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  • Rules to Manipulate Regular Expressions of Finite Automata

    Publication Year: 1962, Page(s):574 - 575
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (403 KB)

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  • Skip Techniques for High-Speed Carry-Propagation in Binary Arithmetic Units

    Publication Year: 1961, Page(s):691 - 698
    Cited by:  Papers (79)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1343 KB)

    After a very brief summary of the various well-known methods of expediting carry-propagation in binary arithmetic units, the paper discusses and develops the ``anticipated-carry'' or ``carry-skip'' technique originally due in decimal form to Babbage, much used in mechanical calculators and lately revived for use in binary units. Various degrees of refinement are possible. It appears that for a giv... View full abstract»

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  • Threshold Realization of Arithmetic Circuits

    Publication Year: 1962, Page(s):287 - 288
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (317 KB)

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  • BIDEC - A Binary-to-Decimal or Decimal-to-Binary Converter

    Publication Year: 1958, Page(s):313 - 316
    Cited by:  Papers (10)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (819 KB)

    Simple, high-speed devices to convert binary, binary coded octal, or Gray code numbers to binary coded decimal numbers or vice versa is described. Circuitry required is four shift register stages per decimal digit plus one 30-diode network per decimal digit. In simple form the conversion requires two operations per binary bit but is theoretically capable of working at one operation per bit. View full abstract»

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  • An Optimum Character Recognition System Using Decision Functions

    Publication Year: 1958, Page(s): 180
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (220 KB)

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  • The Simulation of Cognitive Processes, II: An Annotated Bibliography

    Publication Year: 1962, Page(s):535 - 552
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5061 KB)

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  • Minimizing the Number of States in Incompletely Specified Sequential Switching Functions

    Publication Year: 1959, Page(s):356 - 367
    Cited by:  Papers (183)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2288 KB)

    Given a sequential switching function in the form of a flow table in which some of the entries are unspecified, the problem of reducing the number of rows in that flow table is extremely complex, and cannot, in general, be solved by any simple extension of the methods used for completely specified functions. An analysis of the problem is presented, and a partially enumerative solution is evolved. ... View full abstract»

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  • Esaki Diode High-Speed Logical Circuits

    Publication Year: 1960, Page(s):25 - 29
    Cited by:  Papers (92)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (821 KB)

    Logical circuits using Esaki diodes, and which are based on a principle similar to parametron (subharmonic oscillator element) circuits, are described. Two diodes are used in series to form a basic element called a twin, and a binary digit is represented by the polarity of the potential induced at the middle point of the twin, which is controlled by the majority of input signals applied to the mid... View full abstract»

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  • Real-Time Computation and Recursive Functions Not Real-Time Computable

    Publication Year: 1962, Page(s):753 - 760
    Cited by:  Papers (38)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1412 KB)

    As an attempt to investigate a general theory of real-time computability in digital computers, a subclass of Turing machines is formally introduced together with some classes of functions that are computable by them in real time. Then the existence is established of a class of recursive functions that are not computable in real time by use of a class of machines, no matter how general we make the ... View full abstract»

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  • A Truth Table Method for the Synthesis of Combinational Logic

    Publication Year: 1961, Page(s):604 - 615
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2046 KB)

    This paper describes a method for synthesizing a switching function directly from its: ruth table. A switching function is defined as any mapping of a set of binary input combinations onto 0 and 1. Hence, the procedures apply equally well to the don't care cases. The method rests on the concept alogically passive function (LPF). Roughly speaking, an LPF is a truth table which can be realized with ... View full abstract»

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  • An experiment in musical composition

    Publication Year: 1957, Page(s):175 - 182
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1706 KB)

    The high-order probabilities of element sequences can be determined from a sample of linear structures and can be used for synthesis of new structures. From theoretical considerations one can identify the qualitative conditions for satisfactory output. The theoretical concepts can be tested and quantitative parameters determined by experiment. Such an experiment has been performed by analyzing wri... View full abstract»

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  • Fast Carry Logic for Digital Computers

    Publication Year: 1955, Page(s):133 - 136
    Cited by:  Papers (48)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1357 KB)

    Existing large scale binary computers typically must allow for the maximum full length carry time in each addition. It has been shown that average carry sequences are significantly shorter than this maximum, on the average only five stages for a 40 digit addition. A method is described to realize the implied 8 to 1 time saving by deriving an actual ``carry completion'' signal. Experimental results... View full abstract»

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  • Unit-Distance Error-Checking Codes

    Publication Year: 1958, Page(s):179 - 180
    Cited by:  Papers (39)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (445 KB)

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  • A Transistor-Driven Magnetic-Core Memory

    Publication Year: 1957, Page(s):14 - 20
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2872 KB)

    A transistor-driven magnetic-core memory which has a capacity of 1024 18-bit words has been built and is being studied. Both the read and write operations employ the coincident-current technique. The memory-drive currents are developed by transistors and the desired memory location is selected by magnetic-core selection switches. Eighteen thousand, four hundred and thirty-two memory cores are used... View full abstract»

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  • Error Detecting and Correcting Binary Codes for Arithmetic Operations

    Publication Year: 1960, Page(s):333 - 337
    Cited by:  Papers (57)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (739 KB)

    The most important property of the codes derived in this paper is that two numbers, i and j, have coded forms, C(i) and C(j) that when added in a conventional binary adder, give a sum C(i)+C(j) that differs from C(i+j), the code for the sum, by (at most) an additive constant. This makes possible the detection and/or correction of errors committed by the arithmetic element of a computer. In additio... View full abstract»

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  • Analytical Design of Resistor-Coupled Transistor Logical Circuits

    Publication Year: 1958, Page(s):109 - 119
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1884 KB)

    The object of this paper is to analyze and to develop design procedures for a resistor-coupled transistor circuit used in the mechanization of logical operations. The basic circuit consists of one transistor and a number of resistors. This circuit performs the OR function followed by the NOT function or the AND function followed by the NOT function. With these compound functions mechanized it is p... View full abstract»

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  • A Generalized Resistor-Transistor Logic Circuit and Some Applications

    Publication Year: 1959, Page(s):8 - 12
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (779 KB)

    This paper discusses a generalized resistor-transistor logic circuit; i.e., the output produces a signal when any m out of the n inputs are ``on.'' Practical limitations such as using precision power supplies and components are discussed. However, for smaller values of n and m, circuits could be designed such that no special precision components and supplies would be required. Several practical ci... View full abstract»

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  • An Algorithm for Determining Minimal Representations of a Logic Function

    Publication Year: 1957, Page(s):103 - 108
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1054 KB)

    For each logic function, or Boolean algebraic expression, there corresponds an appropriate computer circuit. However, the minimization of the appearances of the Boolean variables does not necessarily lead to the most economical circuit. A general approach to the problem therefore requires the development of techniques for the simple and rapid generation of a variety of near-minimal forms. This pap... View full abstract»

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  • Decimal-Binary Conversions in CORDIC

    Publication Year: 1959, Page(s):335 - 339
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (842 KB)

    A special-purpose, binary computer called CORDIC (COordinate Rotation DIgital Computer) contains a unique arithmetic unit composed of three shift registers, three adder-subtractors, and suitable interconnections for efficiently performing calculations involving trigonometric functions. A technique is formulated for using the CORDIC arithmetic unit to convert between angles expressed in degrees and... View full abstract»

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  • Iterative Combinational Switching Networksߞ General Design Considerations

    Publication Year: 1958, Page(s):285 - 291
    Cited by:  Papers (21)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1244 KB)

    An iterative network is a combinational switching circuit which consists of a series of identical "cells" or sub-networks; for example, the stages of a parallel binary adder. A formal design method for iterative networks is presented. This is similar to the flow table technique for designing sequlential circuits. View full abstract»

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  • A Gray Code Counter

    Publication Year: 1957, Page(s): 120
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (162 KB)

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  • Computer Synthesis of Character-Recognition Systems

    Publication Year: 1961, Page(s):735 - 747
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2395 KB)

    A SAP (Symbolic Assembly Program) package has been developed for the IBM 704 computer to simulate the logical tree of circuitry associated with a character-recognition device. The program has two major inputs: a particular set of logic statements (of AND and OR type) on cards, for flexibility, and tape reels of binary images of ideal or real characters. The output is the ``score'' of the logic: ho... View full abstract»

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  • A New, Solid-State, Nonlinear Analog Component

    Publication Year: 1960, Page(s):496 - 503
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1981 KB)

    Since the inception of the electronic analog computer as a useful engineering tool, the need for practical methods of solving nonlinear problems has steadily increased. This paper describes a passive, nonlinear device which, when used with operational amplifiers, provides the means for obtaining a large class of functions. These are obtained to a degree of accuracy and reliability not previously p... View full abstract»

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  • The Human Computer in Flight Control

    Publication Year: 1957, Page(s):195 - 202
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1802 KB)

    It is the unique decision-making ability which makes the human operator particularly suited to accomplish flight control computation. His decisions range from the simplest repetitive determination of control actions, each intended to minimize the error, to complex problems of the sequential reprogramming of all the lower levels of decision which, in totality, comprise his information transduction ... View full abstract»

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  • Pulse Generator and High-Speed Memory Circuit

    Publication Year: 1956, Page(s):213 - 218
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1019 KB)

    Circuits for the recycling of pulses by means of a driving tube and an electromagnetic delay line have been developed, The necessary characteristic for the driving tube is shown and the effects of the delay line on the amplitude and width of pulses with respect to recycling operation are explained. Two modes of operation of these circuits are possible. One mode of operation allows any number of pu... View full abstract»

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  • The Reduction of Redundancy in Solving Prime Implicant Tables

    Publication Year: 1962, Page(s):473 - 482
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1642 KB)

    This paper is primarily concerned with finding, in the most efficient possible way, the set of all solutions to a cyclic prime implicant table. (A solution is a set of rows such that every column contains at least one marked entry in a row belonging to the set and such that no row can be deleted from the set without destroying this property.) Extensive use is made of the relationship between this ... View full abstract»

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  • Junction Transistor Switching Circuits for High-Speed Digital Computer Applications

    Publication Year: 1956, Page(s):192 - 196
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (855 KB)

    This paper describes junction transistor switching circuits capable of reliable operation at a clock rate of one megacycle. These circuits, consisting of a flip-flop, a gated pulse amplifier, and diode gates, consume a minimum of power and operate over a temperature range of -55° C to +85°C with complete transistor interchangeability. Applications of these circuits to binary counters, sh... View full abstract»

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  • A Note on High-Speed Digital Multiplication

    Publication Year: 1956, Page(s): 140
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (302 KB)

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  • Two's Complement Multiplication in Binary Parallel Digital Computers

    Publication Year: 1955, Page(s):118 - 119
    Cited by:  Papers (6)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (531 KB)

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  • Ternary Counters

    Publication Year: 1955, Page(s):144 - 149
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (945 KB)

    Counter stages having three stable states, and using no more components than standard binary counters, have been built by properly using the already present nonlinearity of grid current. Problems of stability, cascading, and decoding have been worked out. View full abstract»

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  • New Applications of an Electronic Function Generator

    Publication Year: 1958, Page(s):48 - 51
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (464 KB)

    In previous papers a new technique for performing in a single electronic computing unit all nonlinear mathematical operations in a differential analyzer was described. The field of application of this technique is extended to include the generation of functions of several variables. View full abstract»

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  • Nonlinear Transfer Functions with Thyrite

    Publication Year: 1958, Page(s):91 - 97
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (906 KB)

    Since the publication of a previous paper1 the uses of Thyrite2 in the synthesis of nonlinear transfer functions in analog computing have been greatly expanded. Moreover, new and considerably improved methods of Thyrite selection and matching have been developed. The present paper shows how rational exponents can be represented. Functions of the form y = kxn, with 1/δ ≤ ... View full abstract»

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  • Some Notes on Logical Binary Counters

    Publication Year: 1955, Page(s):67 - 69
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (525 KB)

    The properties of binary counters which utilize non-transient storage elements for the count information are presented. The four possible sets of logical connections between the two storage elements necessary for each stage are described. The binary numbers represented in the storage elements are shown to be the actual count in one set of elements and in the other set a Gray code representation of... View full abstract»

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  • Transistor Circuitry for Digital Computers

    Publication Year: 1955, Page(s):11 - 16
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1077 KB)

    Transistor circuitry is presented that enables the construction of a digital computer which will operate at a clock frequency of 200 kc or less. The circuitry employs readily available germanium or silicon junction transistors of the type used in audio-frequency circuit work. A new system of diode gating is also presented as a necessary part of the circuit philosophy. No vacuum tubes are required ... View full abstract»

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  • A Digital Computer for Use in an Operational Flight Trainer

    Publication Year: 1955, Page(s):55 - 63
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1799 KB)

    The requirements for a digital computer for use in an operational flight trainer are presented with emphasis being placed on the real-time aspects of the problem. The general purpose digital computer is shown to be inadequate for this purpose and a special purpose digital computer is described which meets the requirements. View full abstract»

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  • A Four-Quadrant Multiplier Using Triangular Waves, Diodes, Resistors, and Operational Amplifiers

    Publication Year: 1959, Page(s):222 - 227
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1109 KB)

    A simple scheme of switching triangular waves and measuring the average current through resistors into a low impedance summing point makes possible four-quadrant multiplication with four diodes, precisely adjusted resistors, and a means of measuring the current. A practical circuit utilizes one operational amplifier to obtain -(X+Y)/2 and a second such unit to measure the summing point current. Ad... View full abstract»

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  • A Feedback Method for Obtaining a Synchro Output Signal Proportional to Input Angle Θ for Large Θ

    Publication Year: 1960, Page(s):359 - 362
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (567 KB)

    If the ac signal at the "cosine" terminal of a sine-cosine resolver (or synchro transmitter connected to a transformer so as to perform the function of a sine-cosine resolver) is fed back to the rotor through an amplifier of suitable gain, the signal at the ``sine'' terminal can be made proportional to rotor rotation for angles up to 90/spl degrees/ or greater. A theoretical analysis of the relati... View full abstract»

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Aims & Scope

This Transactions ceased publication in 1962. The current retitled publication is 

IEEE Transactions on Computers.

Full Aims & Scope