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IEE Proceedings E - Computers and Digital Techniques

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  • VLSI design of inverse-free Berlekamp-Massey algorithm

    Publication Year: 1991, Page(s):295 - 298
    Cited by:  Papers (54)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (188 KB)

    The Berlekamp-Massey iterative algorithm for decoding BCH codes is modified to eliminate the calculation of inverses. This new algorithm is useful in the practical application of multiple-error-correcting BCH or RS codes. A VLSI architecture is developed for this algorithm. View full abstract»

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  • Remote password authentication with smart cards

    Publication Year: 1991, Page(s):165 - 168
    Cited by:  Papers (48)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (236 KB)

    A remote password authentication scheme based on the Chinese remainder theorem is proposed. The scheme can verify the remote password without verification tables. In the initial phase, the password generation centre generates and assigns a password corresponding to each user. The ideas of smart cards and the identity-based signature scheme introduced by Shamir (1984) are employed in this phase. Ea... View full abstract»

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  • Single-chip microcomputer based intelligent sensors for home automation network

    Publication Year: 1990, Page(s):359 - 365
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (464 KB)

    An intelligent sensor home automation network based on TMS7000 family of single-chip microcomputers is presented. This network could be applied to energy management, security or control of domestic equipment in individual houses. The intelligent sensors are connected to a central station by means of central heating pipes which play the role of energy supply and information transmission lines, henc... View full abstract»

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  • Industrial applications of computer vision since 1982

    Publication Year: 1988, Page(s):117 - 136
    Cited by:  Papers (12)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (2364 KB)

    During the past six years, the use of computer vision systems for industrial applications has become increasingly widespread. In the paper, the application of vision in this context is surveyed and reviewed, according to the principal current application areas of automated visual inspection and visually guided robotic manipulation. Additionally, recently published research and development work for... View full abstract»

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  • Parallel VLSI algorithm for stable inversion of dense matrices

    Publication Year: 1989, Page(s):575 - 580
    Cited by:  Papers (25)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (472 KB)

    A fast, efficient, parallel algorithm for stable matrix inversion based on Givens plane rotations is described. The algorithm is implemented on VLSI systolic architecture that is capable of inverting any n*n nonsingular dense matrix in 5n units of time, including I/O time. The array architecture consists of n2+n processing elements (PEs) arranged as a cascade of two triangular arrays of... View full abstract»

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  • Maximum entropy algorithm applied to image enhancement

    Publication Year: 1980, Page(s):170 - 172
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (683 KB)

    A model is suggested for assigning the prior probability of an image in Bayes' theorem which leads to a very general algorithm for image enhancement. Examples of sharpening blurred photographs show how the success of deconvolution depends on the signal/noise ratio in the degraded images. View full abstract»

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  • Testing check bits at no cost in RAMs with on-chip ECC

    Publication Year: 1993, Page(s):304 - 312
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (776 KB)

    The authors address the problem of testing the check bits in RAMs with on-chip ECC. A solution is proposed in which the check bits are tested in parallel with the testing of the information bits. The solution entails finding a class of parity-check matrices that have the property that all the check bits can be tested for pattern-sensitive faults while the information bits are being tested, without... View full abstract»

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  • CONIC: an integrated approach to distributed computer control systems

    Publication Year: 1983
    Cited by:  Papers (17)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1388 KB)

    Distributed computer control systems (DCCS) have a number of potential advantages over centralised systems, especially where the application is itself physically distributed. A computer station can be placed close to the plant being controlled, and a communications network used to enable the stations to communicate to co-ordinate their actions. However, the software must be carefully designed to e... View full abstract»

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  • Virtual memory for microcomputers

    Publication Year: 1985, Page(s):323 - 332
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1370 KB)

    The use and design of segmented virtual memories suitable for microcomputers is considered from the user interface through the system software to the hardware interface. The provision of a UNIX*-like interface within a segemented virtual machine is outlined. Performance measurements are presented of a paged, segmented system running real workloads. View full abstract»

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  • Hardware realisation of binary search algorithm

    Publication Year: 1980, Page(s):148 - 151
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (532 KB)

    It is shown how, by augumenting a microprocessor or mincomputer with a relatively small amount of iteratively driven logic, the operation of table lookup using a binary search algorithm can be speeded up by 1¿¿ to 2 orders of magnitude. The approach is very suitable for 1.s.i. implementation as a standard peripheral device for a microprocessor. View full abstract»

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  • Object-background segmentation using new definitions of entropy

    Publication Year: 1989, Page(s):284 - 295
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (980 KB)

    The definition of Shannon's entropy in the context of information theory is critically examined and some of its applications to image processing problems are reviewed. A new definition of classical entropy based on the exponential behaviour of information-gain is proposed along with its justification. Its properties also include those of Shannon's entropy. The concept is then extended to fuzzy set... View full abstract»

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  • The Megacell concept: an approach to painless custom design

    Publication Year: 1985, Page(s):91 - 98
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1650 KB)

    Megacell is a complete design package for the creation of complex VLSI chips. It allows system engineers to develop their own custom integrated circuits. The challenge of Megacell was to create a design system that would exploit fully the low-power and high-speed performance of a UK developed 2 ¿¿m CMOS technology, while producing the silicon utilisation efficiency typical of full custom design. T... View full abstract»

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  • Trends in the application of semiconductor technology

    Publication Year: 1985, Page(s):50 - 53
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (563 KB)

    The paper describes the dilemma of the merchant semiconductor company, where increased complexity of semiconductor devices results in increased development costs, while, in many cases, increased complexity means increased specialisation and therefore reduced volumes. The solution proposed is to transfer design to the equipment companies. This solution is only practical if the expertise of the chip... View full abstract»

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  • Parallel algorithm for shortest paths

    Publication Year: 1986, Page(s):87 - 93
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1182 KB)

    An algorithm for finding a shortest path between each pair of nodes of a positive arc weighted graph on a shared memory model of a single instruction-stream multiple data-stream computer is proposed. The time complexity of the algorithm is of O(log d . log n), where d and n denote the diameter and the number of nodes of the graph, respectively. At most, O(n3) processors are required to achieve thi... View full abstract»

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  • Reconfigurable computer architectures

    Publication Year: 1982, Page(s):156 - 164
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1598 KB)

    A survey of reconfigurable computer architectures is presented. This shows two distinct trends: data-flow architectures and dynamic architectures. If a broad classification of programs based on two kinds of parallelism in programs, i.e. instruction and data, is adopted, then a pooled-resource reconfigurable multiprocessor (PRRMP) system can be evolved. The salient features of such a system, includ... View full abstract»

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  • Low-level-device programming with a high-level language

    Publication Year: 1980, Page(s):37 - 44
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (979 KB)

    This tutorial paper describes how device hardware may be programmed directly from a Pascal-like high-level language. The familiar data types of Pascal are extended to include information which specifies a mapping onto device hardware, and concurrent programming constructs are introduced as a natural environment for low-level I/O programming. Examples of interrupt-driven I/O are presented, and exis... View full abstract»

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  • Rational sampling rate conversion structures with minimum delay requirements

    Publication Year: 1992, Page(s):477 - 485
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (452 KB)

    Recent developments on multirate system design show that a rational (L/M) sampling rate conversion system can be reconfigured into a three-dimensional polyphase structure. However, the delay requirements associated with each subfilter path in such a structure have not sufficiently been considered. The paper presents a detailed analysis of the delay requirements, and shows that a reduction by a fac... View full abstract»

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  • 2D systolic solution to discrete Fourier transform

    Publication Year: 1989, Page(s):211 - 216
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (484 KB)

    A number of systolic architectures have appeared over the past few years for performing the discrete Fourier transform (DFT) and fast Fourier transform (FFT) algorithms, using both linear and orthogonal processing networks. The paper shows how a rectangular array of N CORDIC (co-ordinate digital computer) processing elements can be used to carry out an efficient two-dimensional systolic implementa... View full abstract»

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  • Silicon-on-insulator technology

    Publication Year: 1986, Page(s):106 - 116
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1913 KB)

    The last few years have seen considerable progress in the development of techniques for producing silicon-on-insulator (SOI) substrates suitable for fabrication of high performance devices/circuits. Among the most promising of the new ideas are those based on buried dielectric formation by ion implantation (oxygen or nitrogen), recrystallisation of deposited polycrystalline silicon-on-insulator (u... View full abstract»

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  • Hough technique for 3D object recognition

    Publication Year: 1989, Page(s):565 - 568
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (340 KB)

    Advances in imaging techniques make it efficient to extract information such as the length and orientation of a straight edge in 3D space. An algorithm using the Hough technique is proposed for the recognition of objects which can be represented or characterised by a set of vertices and straight lines. Assuming the scale is known a priori, the orientation and translation of an object are determine... View full abstract»

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  • Parallel DFT computation on bit-serial systolic processor arrays

    Publication Year: 1993, Page(s):10 - 18
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (604 KB)

    The paper shows how novel one-dimensional and two-dimensional systolic processing architectures, comprising up to N coordinate rotation digital computer (CORDIC) processing elements (PEs), can be used to carry out hardware-efficient parallel implementations of the N-point discrete Fourier transform (DFT), offering highly attractive throughput rates in relation to the conventional N-processor linea... View full abstract»

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  • Markov models for a multiple processor system with a shared bus

    Publication Year: 1985, Page(s):316 - 322
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (858 KB)

    A finite population queueing model applicable to a class of real-time multiple processor systems with a shared bus is developed and analysed. It assumes Poisson arrivals and services, and its service discipline is FIFO, with the restriction that a customer cannot be served for the (k + l)st time unless all customers have been served k times. The performance of the system is studied by evaluating i... View full abstract»

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  • F.I.R. digital filters based on difference coefficients: design improvements and software implementation

    Publication Year: 1980, Page(s):253 - 258
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (785 KB)

    A difference-routing digital filter (d.r.d.f.) consists of a transversal filter cascaded with an undamped digital resonator. Complicated multiplication operations are avoided by restricting all coefficients to small integers. A new set of resonator structures, which in many cases offers substantial improvements over existing designs, is first described. The real-time implementation of the resultin... View full abstract»

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  • Hardware evaluation of mathematical functions

    Publication Year: 1981, Page(s):155 - 164
    Cited by:  Papers (9)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1182 KB)

    The paper presents a family of algorithms for evaluating the elementary mathematical functions including division, sine, cosine, tangent, arctangent, logarithm, exponential and square root. The algorithms are based on continued products and continued sums, and generate the sum on a 2-bit-at-a-time basis. The only operations required are shifting, adding, subtracting and recall of prestored constan... View full abstract»

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  • Comparison of an Ethernet-like communication system with the Cambridge ring

    Publication Year: 1982, Page(s):147 - 155
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1496 KB)

    This paper describes the simulation and comparison of two types of local-area network. One is a branching broadcasting system, based closely on the standard Ethernet, requiring contention-resolving hardware, and the second is the Cambridge digital communication ring, a point-to-point communication system using the empty-slot principle for deterministic multiplexing. View full abstract»

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  • Towards effective nonlinear cryptosystem design

    Publication Year: 1988, Page(s):325 - 335
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (756 KB)

    The paper describes the design of nonlinear Boolean functions. The first part reviews the case of Boolean functions of n variables. The second part addresses the problem of the generation of Boolean permutations to obtain the collection of nonlinear Boolean functions. View full abstract»

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  • Decoding the (24,12,8) Golay code

    Publication Year: 1990, Page(s):202 - 206
    Cited by:  Papers (28)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (344 KB)

    A simplified procedure, called the shift-search method, is developed to decode the three possible errors in a (23,12,7) Golay codeword. The algebraic decoding algorithm developed recently by Elia is compared with this algorithm. A computer simulation shows that both algorithms are modular, regular and naturally suitable for either VLSI or software implementation. Both of these algorithms decode ef... View full abstract»

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  • Design of multiplexer universal-logic-module networks using spectral techniques

    Publication Year: 1980, Page(s):31 - 36
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (696 KB)

    A technique is described for the optimal synthesis of n-variable combinational logic circuits with Multiplexer universal logic modules, which may readily be implemented without excessive computer storage requirements. The method requires knowledge of the Rademacher-Walsh spectrum, which is an alternative representation of the truthtable vector of the function being considered. It makes use of a pr... View full abstract»

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  • New fast fixed-delay sizing algorithm for high-performance CMOS combinational logic circuits and its applications

    Publication Year: 1992, Page(s):379 - 386
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (464 KB)

    A sizing methodology called the near-characteristic waveform-synthesising method (NCWSM) is proposed to determine the device sizes of CMOS combinational logic circuits under a fixed delay specification. By using accurate physical timing models and the NCWSM, a fixed-delay sizing algorithm is developed and implemented, which sizes circuits quickly and globally. It can handle CMOS inverters, multi-i... View full abstract»

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  • On the design of easily testable LFSR counters for frequency division

    Publication Year: 1987, Page(s):277 - 280
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (409 KB)

    The paper discusses the design of easily testable counters for use in frequency division circuits. The proposed approach, based on linear feedback shift registers, requires the minimum number of memory elements. The algorithms for counter synthesis and test-pattern generation are described in detail View full abstract»

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  • Processor failure recovery for a resource sharing algorithm

    Publication Year: 1986, Page(s):79 - 86
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (984 KB)

    With the increase in popularity of distributed computer systems, the reliability of the system as a whole is becoming more important. A recently published combined resource sharing algorithm showed how the atomic operations required for resource management in a closely coupled multiprocessor system could be provided. The paper describes a recovery system that may be incorporated within the earlier... View full abstract»

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  • Parallel image-processing system based on the TMS32010 digital signal processor

    Publication Year: 1987, Page(s):119 - 124
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (865 KB)

    A parallel image processor (PIP) consisting of eight Texas Instruments TMS32010 digital signal processors is described. The architecture is designed for image-processing applications and two common pattern-recognition algorithms, i.e. edge detection followed by thinning are implemented achieving a total processing time of less than one second for a 256 ¿¿ 256 pixel image. The advantages and limita... View full abstract»

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  • Designing a conversational speech interface

    Publication Year: 1986, Page(s):305 - 311
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (918 KB)

    The implementation of conversational speech interfaces based on the use of an intelligent frame-based dialogue controller is described. This approach, in conjunction with the automatic generation of syntactic constraints and a simple semantic template grammar parser, is shown to allow practical user-friendly voice-based information inquiry systems to be built using current connected word speech re... View full abstract»

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  • Multipeak histogram analysis in region splitting: a regularisation problem

    Publication Year: 1991, Page(s):285 - 288
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (208 KB)

    The paper describes an application of regularisation to the problem of estimating the cutoff threshold parameter for splitting the regions within an image by using its multimodal histogram. The analysis involves generating a multiple description of a histogram by smoothing it with cubic splines, locating peaks and valleys from it, and finally selecting the cutoff threshold by computing a score. View full abstract»

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  • Efficient techniques in the sizing and constrained optimisation of CMOS combinational logic circuits

    Publication Year: 1991, Page(s):154 - 164
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (720 KB)

    Two techniques are proposed which enhance the optimisation efficiency of CMOS combinational logic circuits. One uses transition times (rise and fall times) of each gate as variables of the optimisation process. The other technique uses the optimal characteristic waveform synthesising method (OCWSM) to obtain the initial guess for the optimisation process. The optimisation process, with these two t... View full abstract»

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  • Graphical method for the conversion of minterms to Reed-Muller coefficients and the minimisation of exclusive-OR switching functions

    Publication Year: 1987, Page(s):93 - 99
    Cited by:  Papers (7)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (809 KB)

    A graphical method extended from a folding technique developed by Wu et al. is used to convert the minterms of a switching function to the coefficients of its Reed-Muller polynomial with fixed polarity. The conversion starts from a Karnaugh map and results in a Reed-Muller coefficient map. An algorithm which attempts to find a minimal exclusive-OR realisation for the switching function in mixed po... View full abstract»

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  • Algorithm to detect reconvergent fanouts in logic circuits

    Publication Year: 1987, Page(s):105 - 111
    Cited by:  Papers (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (849 KB)

    Testability measures have been advocated by many authors as aids in the designing and testing of logic circuits. These have been shown to be inaccurate for circuits which contain reconvergent fanouts. An algorithm is presented which will detect all sources of reconvergence in a circuit by processing a normal textual circuit description. As well as identifying all the gates at which reconvergence o... View full abstract»

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  • Implementation issues of sigmoid function and its derivative for VLSI digital neural networks

    Publication Year: 1992, Page(s):207 - 214
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (492 KB)

    Proposes a number of different implementations for the first derivative of the sigmoid function. The implementation of the sigmoid function employs a powers-of-two piecewise linear approximation. The best implementation scheme for the derivative is suggested based on overall speed performance (circuit speed and training time) and hardware requirements. View full abstract»

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  • Mapping of Reed-Muller coefficients and the minimisation of exclusive OR-switching functions

    Publication Year: 1982, Page(s):15 - 20
    Cited by:  Papers (17)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (755 KB)

    A new geometric format, the bj coefficient map, is here introduced, the entries in which are the {0, l} coefficient values of the Reed-Muller Exclusive-OR expansions by which any given combinatorial function may be expressed. Although similar in format to the classic Karnaugh map, the bj map entries do not represent the function output in the same manner as do the minterm entries plotted on a Karn... View full abstract»

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  • Efficient algorithm for image enhancement

    Publication Year: 1983, Page(s):95 - 96
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (283 KB)

    The problem of smoothing, point, line and edge detection in image processing is considered. It has been shown that computation in each case can be speeded up considerably by looking at the redundancy. The methods are simple and can be implemented easily in software or hardware. View full abstract»

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  • Simulation of PM2I network by folded hypercube

    Publication Year: 1991, Page(s):397 - 400
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (268 KB)

    The folded hypercube (FHC) has been shown to be an attractive hypercube-based network with high performance. Owing to its rich interconnections, the FHC can simulate the functions of some other SIMD networks efficiently. In the paper, the simulation of the PM2I (Plus Minus 2I and also known as the barrel shifter) by the FHC is addressed. A model for SIMD machines is adopted to devise some simple s... View full abstract»

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  • Command language for interactive image analysis

    Publication Year: 1980, Page(s):203 - 218
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1087 KB)

    A simple command language for controlling an interactive image analyser is described. A set of about a hundred basic commands is listed. These may be performed singly, in groups, or they may be combined, given a name and executed as a macro. The language contains facilities for looping, branching and generating data for use by other programs. View full abstract»

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  • Systolic arrays: how to choose them

    Publication Year: 1992, Page(s):179 - 188
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (624 KB)

    Looks closely into the effect of objective function optimisation on the architecture of systolic arrays. Various objective functions such as area, speed, throughput, AT and AT2 have been considered. In each case, when the objective function is optimised, a different systolic array is produced. The authors present their approach systematically using the space-time techniques of mapping a... View full abstract»

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  • DMKS: system kernal for multimedia integration

    Publication Year: 1989, Page(s):150 - 155
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (575 KB)

    Presents the design of the distributed multimedia kernel system (DMKS) developed for supporting multimedia applications based on a distributed approach. It adopts the device independent GKS concepts and extends them to include images and text from databases using a reference method, so that it is not necessary for the application program to have direct contact with the actual contents. The task of... View full abstract»

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  • TOMP project

    Publication Year: 1989, Page(s):225 - 233
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (792 KB)

    The main objective of the TOMP (Torino multiprocessor) project was the development of a frame under which a wide variety of multiple processor systems could be sized up, designed, and built. The frame was not conceived for a specific purpose, the basic goal being to cover a wide area of applications, where the key parameters were the relevance of the distribution of the functions, and the computat... View full abstract»

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  • On designing robust testable CMOS combinational circuits

    Publication Year: 1989, Page(s):329 - 338
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (856 KB)

    The potential invalidation of two-pattern tests for detecting stuck-open faults in CMOS combinational circuits has been studied from a functional point of view. Two methods of testable realisations avoiding the problem are presented. A new type of two-level testable realisation is proposed in which both stuck-open and stuck-short faults can be detected. In both the methods, valid test patterns are... View full abstract»

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  • Correlation-function peak detector

    Publication Year: 1981, Page(s):74 - 78
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (587 KB)

    Accurate detection of the peak position of a correlation function requires a large number of correlation-function points to be determined. To achieve an acceptable dynamic performance, a parallel implementation of the function is required. In the paper techniques are described for achieving high-resolution peak detection with a limited amount of parallel circuitry. View full abstract»

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  • Simple two-stage method for the accurate location of Hough transform peaks

    Publication Year: 1992, Page(s):242 - 248
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (728 KB)

    The paper describes a method for the rapid, accurate location of Hough transform peaks. First, it is recognised that votes may be rather sparsely distributed in parameter space, so a reliable means of clustering them is vital. Although this may be achieved by multiresolution techniques, an important consideration is that peaks are generally noisy and may be multimodal, so care must be taken over a... View full abstract»

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  • Improved performance token ring network interface adapter

    Publication Year: 1990, Page(s):421 - 426
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (532 KB)

    Presents and discusses an improved performance token ring network interface adapter. The description includes that of the adapter architecture, the internal serial bus structure, and the dual latency data path bypass circuitry. It is shown that these enhancements lead to improvements in the performance measures of interest for real-time applications. Critical portions of the circuit were fabricate... View full abstract»

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  • Optimal tile partition for space region of integrated circuits geometry

    Publication Year: 1993, Page(s):145 - 153
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (548 KB)

    An optimal tile partition (OTP) is presented for partitioning the space region of a VLSI layout plane into rectangular space tiles. It modifies the corner stitching data structure to optimise the space tile partition. There is a serious restriction in the original corner stitching data structure, i.e. the solid rectangles cannot overlap each other, whereas the authors OTP allows overlapping. This ... View full abstract»

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