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Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on

Date 14-17 Dec. 2003

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  • Double-rail encoded self-timed adder with matched delays

    Page(s): 1172 - 1175 Vol.3
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    An efficient self-timed adder with low area overhead and efficient acknowledge slack time is proposed. The adder uses double-rail encoding of the carry signals as well as process-tracking matching delays to guarantee proper generation of the completion signal. View full abstract»

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  • Optically controlled 2.4GHz MMIC amplifier

    Page(s): 970 - 973 Vol.3
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    In this paper a 2.4GHz MMIC amplifier for mobile applications is used to demonstrate the significant control that can be achieved in the amplifier's performance using optical illumination. The results presented show a 15dB variation in the amplifier's S21 figure and a 6 to 10dB variation in the input and output return loss when the incident optical power is varied. View full abstract»

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  • A 900MHz low voltage low power highly linear mixer for direct-conversion receivers

    Page(s): 974 - 977 Vol.3
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    This paper presents a 900MHz low voltage, low power down-conversion mixer with high linearity for direct-conversion receivers. As a way to improve the third-order linearity, this paper proposes a very linear transconductance amplifier in which the size of the transistors is optimized to minimize the third-order intermodulation distortion (IMD3). A folded mixer topology is used in the designed mixer to enable the mixer to operate at low supply voltage. The design is based on a standard 0.25μm CMOS technology, and the simulation results show 15dBm of input IP3, 80dBm of input IP2, and -6.5dB of power conversion gain while dissipating a total current of 3mA from 1.25V supply. View full abstract»

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  • Design of a fully integrated high linearity dual-band CMOS LNA

    Page(s): 978 - 981 Vol.3
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    A fully-integrated dual-band LNA ( Low Noise Amplifier) with high linearity is presented in this thesis. Designed and implemented in 0.25 μm mixed-signal CMOS process, the LNA simultaneously delivered narrow-band gain and matching at 2.45GHz and 5.25GHz. The LNA exhibits input matching with S11 of -20.48dB at 2.45GHz and -16.6dB at 5.25GHz. And it achieves small-signal gain of 5.78dB and 3.24dB, noise figure 4.7dB and 5.69dB, and IIP3 7dBm and 17dBm. View full abstract»

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  • The design and implementation of data server for data broadcast service

    Page(s): 1176 - 1179 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1476 KB) |  | HTML iconHTML  

    This paper describes the design and implementation of the data server that provides viewers with data broadcast service to enhance the conventional broadcast service with only audio/video. There are asynchronous, synchronous and synchronized data services according to the timing association with main AN program, but only asynchronous data service is now prevailing in DTV environment. The asynchronous data service is too limited to broadcast the interactive data service such as quiz show, advertisement, polling and bidding. The proposed data server had been designed to encode asynchronous, synchronous and synchronized data elements for a variety of data broadcast services. View full abstract»

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  • A low-IF architecture for dual-standard GSM/UMTS fully integrated receivers

    Page(s): 1101 - 1104 Vol.3
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    This paper proposes a compact, dual-standard, low-IF receiver, that has been analyzed and designed at architectural level for GSM and UMTS standards. The design requirements that have been derived for the receiver building blocks indicate that most of them (excepting the image reject filters and the channel-select filters) can be implemented to operate in both modes. Our highly integrated solution includes also a ΣΔ modulator that can be reconfigured for each standard. View full abstract»

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  • Multimedia extensions for DLX processor

    Page(s): 1010 - 1013 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1436 KB) |  | HTML iconHTML  

    In recent years, the success of Internet and World Wide Web, and the growing feasibility of image and video compression techniques have pushed multimedia into mainstream computing. These requirements necessitate new and modified hardware architectures enabling realtime multimedia applications. Three methods have been proposed for enhancing multimedia architectures namely dedicated processors, media processors and multimedia extensions for general-purpose processors. Multimedia extended instruction set is an efficient solution for public and widely used computers, because it offers a solution with less expense and high flexibility. In this paper, we propose an enhanced multimedia extended instruction set for the DLX RISC processor. The enhancement is shown by implementing typical multimedia applications. Our synthesis and simulation results show an average speedup of 3.3 for these applications at a expense of 3% growth in chip area. View full abstract»

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  • High performance speed control of interior permanent magnet synchronous motors with maximum power factor operation

    Page(s): 1125 - 1128 Vol.3
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    In this paper, a high performance control applied to speed control of interior permanent magnet synchronous motors. The design strategy is performed with constraint on the power factor, i.e., the power factor is maximized. In order to enhance the performance of the control system, a decoupling current vector control strategy is developed to ensure high performance operation. Simulation results reveal the effectiveness of the proposed controller. View full abstract»

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  • A high-speed magnitude comparator with small transistor count

    Page(s): 1168 - 1171 Vol.3
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    The comparator is a very basic and useful arithmetic component of digital systems. An individual, compact, high-performance, good cost-benefit ratio comparator core plays an important role on almost all hardware sorters. The study proposes a fine cost-performance ratio comparator design. Based on modified 1's complement principle and conditional sum adder scheme, the proposed design has small transistor count and short propagation delay. Post-layout simulations based on TSMC 0.6μm 1P3M CMOS process has completed. It shown a 64-b static CMOS comparator of the proposed architecture only needs 1,556 transistors and 4.2ns. View full abstract»

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  • A new method to stabilize high frequency high gain CMOS LNA

    Page(s): 982 - 985 Vol.3
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    A new technique to improve stability of high frequency high gain CMOS Low Noise Amplifiers (LNA) has been introduced. A 0.18 μm CMOS LNA for WLAN 5.2 GHz is designed and its performance is compared to typical CMOS cascode LNA for the same frequency. New filter architecture at load has caused a sharp notch in "in-band" S12 of the LNA. This method significantly increases the stability of the LNA while benefits from the high forward gain (16.6 dB) and low noise figure (1.4 dB) of the cascode topology. New LNA shows input IP3 of 0.6dBm while consumes 9mA out of 1.8V supply voltage. View full abstract»

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  • Modelling and simulation of static converters with simult program (application: case of rectifiers)

    Page(s): 1109 - 1112 Vol.3
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    The survey is about simulation of static converters with simult program. To reach this goal, it is first necessary to model the system in the form of signal flow-graph. The simulation steps were briefly introduced. The basic concepts relating to signal flowgraph were also developed. Some examples of the process application are the single-phase rectifier and the single-phase bridge rectifier. This has allowed the development of flexible software for static converters simulation, which integrates the simult program. View full abstract»

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  • Average multicast delay for FEC/DIFFSERV over IP and MPLS homogeneous networks

    Page(s): 1180 - 1183 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1401 KB) |  | HTML iconHTML  

    In order to provide QoS in group communications for real time applications such as video conferencing, reliable multicasting is used. Miscellaneous efforts have been undertaken to provide reliability on top of IP multicast. In this paper, we present a new fair share policy (FSP) that utilizes Differentiated Services to solve the problems of QoS and congestion control when reliable FEC multicast is adopted. The results should provide insight into the comparisons between IP multicast in MPLS networks using FSP and plain IP multicasting using the same policy when DiffServ are adopted and when reliable FEC multicast is considered. View full abstract»

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  • The new form of electrothermal model of MA7805 positive voltage regulator

    Page(s): 1105 - 1108 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1443 KB) |  | HTML iconHTML  

    This paper presents the problem of modelling the linear 3-terminal positive-voltage regulator MA7805 (IC) with selfheating taken into account. In the construction of the ElectroThermal Macromodel (ETM) the modified electrical SPICE-library model of the considered device has been used. This macromodel has been implemented to SPICE with the use of the ABM option. The proposed macromodel was verified experimentally and a good agreement between the calculation and measurement results was obtained. View full abstract»

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  • Robust GPC using limited complexity polytopes

    Page(s): 1296 - 1299 Vol.3
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    This paper handles a duality problem between the Generalized Predictive Control (GPC) strategy and the identification of parameter membership set. The predictor is rewritten so that it is linear with respect to the parameters of member-ship set. The convexity of criterion to be optimised is satisfied. View full abstract»

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  • The electrothermal macromodel of the monolithic voltage regulator LT1073 for SPICE

    Page(s): 1113 - 1116 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1426 KB) |  | HTML iconHTML  

    In this paper the problem of modelling selfheating influence on the characteristics of monolithic switch-mode power supplies is considered. The LT1073 integrated circuit (IC) has been chosen for detailed investigations. Its new ElectroThermal Macromodel (ETM) joining the Electrical Model (EM) along with the thermally dependent parameters and the Lumped Thermal Model (LTM) generating the junction (inner) temperature of LT1073 is proposed. The correctness and usefulness of the new model has been revealed by means of comparison of measurements and simulations of BOOST converter including LT1073 device. View full abstract»

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  • Compensation of the influence of finite gain-bandwidth on continuous-time sigma-delta modulators

    Page(s): 950 - 953 Vol.3
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    This paper introduces a possible compensation for finite gain-bandwidth (GBW) induced errors in continuous-time Sigma-Delta modulators. Therefore a previously published model is used which reduces the effect of GBW to an integrator gain-error and feedback loop delays. Consequently, methods for the compensation of these errors are adopted with some modification. The results are confirmed analytically and by simulations and show a possible GBW reduction of about a decade compared to current designs. View full abstract»

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  • Necessary and sufficient conditions for asymptotic stability of a class of applied nonlinear dynamical systems

    Page(s): 1062 - 1065 Vol.3
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    This paper proves the necessary and sufficient conditions for asymptotic stability of a class of applied mechanical systems. View full abstract»

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  • Colour image watermarking in the complex wavelet domain

    Page(s): 1196 - 1199 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1473 KB) |  | HTML iconHTML  

    Digital image watermarking has become a very active research area. One key requirement in designing a watermarking system is that there should be no perceptible difference between the watermarked and original image, and the watermark should be difficult to remove or alter without damaging the host image. However, these two somewhat different requirements are usually closely related. This paper is concerned with an investigation of different methods to increase imperceptibility and robustness of colour watermarks embedded in colour host images using the Complex Wavelet Transform (CWT). The Complex Wavelet Transform was chosen because experimentation results from have shown the CWT to be more robust than other transforms under compression, additive noise, median and mean filtering attacks. Fusion based watermarking has been chosen since it provides a visual authentication of the watermark. View full abstract»

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  • Service management model for integrated 3/4G and wireless LANs

    Page(s): 1022 - 1025 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1462 KB) |  | HTML iconHTML  

    There are many challenges to transport multimedia traffic over wireless network, because of e.g. bandwidth fluctuation, user mobility and bandwidth resource scarcity. This paper presents management issues how quality of service can be guaranteed when the mobile users are roaming between different wireless networks (WLAN, GPRS, UMTS). View full abstract»

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  • Power-aware dominating set calculations in mobile ad hoc wireless networks with unidirectional links

    Page(s): 1272 - 1275 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1397 KB) |  | HTML iconHTML  

    A wireless network is composed of a set of autonomous mobile hosts. Each host has a transmission radius and energy level that are combined to determine its ability to transmit (receive) messages to (from) other peers in the network. Many algorithms have been proposed for dominating set calculations in Ad hoc wireless networks. In this paper we present an algorithm that could be applied to a network with unidirectional links taking power consumption, recharging, failures to recharge, and mobility into consideration. Since power consumption in nodes forming the dominating set is higher than in other nodes, our algorithm uses a selection scheme based on the energy level of each node and therefore changes the dominating set dynamically. This of course aims at extending the life span of a node, therefore extending the life span of the whole network. Our dominating set only consists of nodes that act as gateways for the network. This is done in order to minimize the selected dominating set and as a consequence minimize the consumed energy. View full abstract»

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  • Measurement of liquids dielectric property using monopole probes operating at microwave frequencies

    Page(s): 1204 - 1207 Vol.3
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    Determination of the dielectric properties of liquids has high practical potential in many industrial, medical, as well as environmental sectors. With the increasing demand for efficient measurement systems, the need arises for a reliable, inexpensive, hand-held, battery operated, and user-friendly system for liquids dielectric properties measurement. In this paper, a microwave nondestructive evaluation (NDE) system that is intended to meet these requirements is proposed. This system utilizes a monopole antenna to transmit microwave signals into the liquid and monitors the reflected waves in the feeding coaxial line. The functional dependence of the reflection coefficient on the dielectric property of the liquid surrounding the monopole will be employed in our measurement schema - i.e. we will be measuring the reflection coefficient and then solving the inverse problem. In general, this dependence is nonlinear in nature and requires sophisticated algorithm to be inverted. To this end, we will introduce a Fuzzy-Maximum-Likelihood (FML) hybrid algorithm to be applied in conjunction with multi-frequency measurements to solve the inverse problem. View full abstract»

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  • Using a genetic algorithm optimizer tool to generate good quality timetables

    Page(s): 1300 - 1303 Vol.3
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    This paper describes a Genetic Algorithm optimizer tool with adaptive parameter control designed to generate a university timetable. In this research we aim to show that by controlling the parameter settings of the genetic operators we can improve the quality of the timetable. This tool was tested on actual data and we present the experimental results. View full abstract»

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  • Design of IIR filters with simultaneous amplitude and group-delay characteristics using genetic algorithm

    Page(s): 1148 - 1151 Vol.3
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    This paper presents a new technique for the design of IIR digital filters with simultaneous amplitude and group-delay requirements. The filter stability is guaranteed by controlling the poles' positions and the filter delay. This algorithm is based on genetic algorithm where the genetic parameters such as population size, number of generations, and crossover probability are adopted for designing filters with power of two, integer or real coefficients. The fitness function is defined as the simple reciprocal of sum squared of the magnitude and delay errors. The proposed method has been tested for the design of filters with different amplitude and group-delay specifications. View full abstract»

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  • An adaptive multimedia approach to e-learning

    Page(s): 1224 - 1227 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1488 KB) |  | HTML iconHTML  

    This paper describes a framework for a flexible multimedia-based e-learning environment that adapts to the evolving learner's model. The proposed environment is based on the IEEE/IMS learning object metadata (LOM) standard and allows adaptation of courseware sequence, navigation and user-system interaction. The nature of adaptations provided by this environment is centered on the learner. The proposed system consist of three main components: an authoring tool to generate LOM-based learning objects; a learner modeler to track the learner's behavior, his learning strategies and learning modalities; and a path planner capable of constructing a learning route customized to each learner. This paper highlights the role of learning objects and their deployment using the learning path-planner. An implementation of such a system is described. This is based on an open architecture using CORBA middleware. View full abstract»

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  • An approach for the measurement of distance travelled by blind and visually impaired people

    Page(s): 1312 - 1315 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1395 KB) |  | HTML iconHTML  

    The research we are reporting here is part of our effort to develop a navigation system for the blind. Our long-term goal is to create a portable, self contained system that will allow visually impaired individuals to travel through familiar and unfamiliar environments without the assistance of guides. In order to overcome the imperfections of existing electronic travel aids for the blind, this paper describes then, the problem of distance measurement. The proposed system is based on the technique of using an accelerometer and double integrating its output with respect to time. This method suffers from drift problems caused by the double integration and offset of the accelerometer which are overcome by the footswitch. This footswitch is used to allow a PC through an interface card to provide frequent corrections of drift effects. From this study, more compatible navigation aids can be developed for blind pedestrians. View full abstract»

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  • A simple state-space technique for modelling nonlinear load generated harmonics

    Page(s): 1117 - 1120 Vol.3
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    In this paper, a simple technique for teaching undergraduate power system harmonics analysis is developed to model nonlinear load generated harmonics in a single-phase variable-speed DC machine drive (VSD). The proposed technique employs an equivalent circuit principle to model the effect of dynamic non-linear load generated harmonics. A time-domain computer simulation model based on the trapezoidal method of integration is used to calculate the load current and the source line distortion produced by a converter in VSD. View full abstract»

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  • A parallel structure of a continuous-time filter for band-pass sigma-delta A/D converters

    Page(s): 954 - 957 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1397 KB) |  | HTML iconHTML  

    In classical continuous-time band-pass sigma-delta (ΣΔ) modulators, the loop filter transfer function is a serial structure of biquadratic functions with high gains and high quality factors. Unfortunately, such a transfer function cannot be directly designed with passive components. We propose a parallel structure consisting in resonators and a low-order filter. The first branch is a cascade of high quality factors resonators that guarantee a high gain in band. The second branch is a smooth filter that guarantees the ΣΔ loop stability out of band. Filters characteristics are obtained thanks to an optimization method to match the reference filter as much as possible in the appropriate band. Each block can be easily designed. Moreover, simulations show that sensitivity to gain variations is improved. View full abstract»

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  • A multi-path high speed Viterbi decoder

    Page(s): 1160 - 1163 Vol.3
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    In this work, a multi-path Trace-Back Viterbi decoder architecture is proposed. It offers almost ideal error correction quality with relatively low overhead. Moreover, a technique that enhances the error correction quality of Register-Exchange decoders as well as a normalization technique that saves considerable area are introduced. The proposed techniques can be utilized for efficient realizations of high speed systolic as well as low speed sequential Viterbi decoder architectures. View full abstract»

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  • Comparison of different wavelet transforms for fusion based watermarking applications

    Page(s): 1188 - 1191 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1437 KB) |  | HTML iconHTML  

    In this paper, we have investigated and assessed different wavelet transforms for use in fusion based watermarking applications. Scalar (discrete) wavelet, multiwavelet, complex wavelet and wavelet packet transforms have been studied to answer the following question: Which transform provides a better watermarking robustness given a certain imperceptibility factor? Fusion based watermarking has been chosen since it provides a visual authentication of the watermark. Perceptual embedding has been omitted to provide a fair comparison since different transforms have yielded different locations for the embedding process. It has been found that the CWT outperforms the other transforms while the WPT gives the worst results. View full abstract»

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  • Fuzzy logic control of a pH neutralization process

    Page(s): 1066 - 1069 Vol.3
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    In this paper, fuzzy logic control of a pH neutralization process is attempted. The pH neutralization process is a classic example of a highly nonlinear system. For nonlinear systems, fuzzy logic control provides a better alternative to the classical proportional plus integral (PI) controller. Both the controllers namely the PI controller and fuzzy logic controller (FLC) are designed for a simulated pH neutralization process. It is shown that the FLC is able to control the pH neutralization process better. The simulation is performed in the MATLAB environment using Simulink and Fuzzy Logic Toolbox. View full abstract»

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  • An approach to offline Arabic character recognition using neural networks

    Page(s): 1328 - 1331 Vol.3
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    Character recognition system can contribute tremendously towards the advancement of automation process and can be useful in many other applications such as Data Entry, Check Verification etc. This paper presents a technique for the automatic recognition of Arabic Characters. The technique is based on Neural Pattern Recognition Approach. The main features of the system are preprocessing of the text, segmentation of the text to individual characters, Feature extraction using centralized moments technique and recognition using RBF Network. The system is implemented in Java Programming Language under Windows Environment. The System is designed for a single font multi size character set. View full abstract»

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  • Adaptive admission/congestion control policy for hybrid TDMA/MC-CDMA integrated networks with guaranteed QoS

    Page(s): 1014 - 1017 Vol.3
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    Future networks are expected to have the ability to accommodate variety of users, each with its own transmission characteristics and QoS requirements to be maintained. Compatible multiaccess system should provide the means to control (i.e. admission/congestion) the flow of traffic and at the same time maintain the QoS requirements. This paper investigates the performance of a novel measurement-based admission/congestion control policy over a hybrid TDMA/MC-CDMA platform. The practicality and several performance measures of the new system shall be analyzed analytically under a wide range of expected traffic characteristics (bit rate, transmission activities, etc.) for the future wireless networks. The adaptive admission/congestion control policy has effectively maintained the required QoS. It is worth to emphasize here that our proposed admission/congestion control polices apply preventive admission control as well as reactive congestion control. View full abstract»

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  • A fully integrated 2.45 GHz 0.25μm CMOS power amplifier

    Page(s): 1094 - 1097 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1427 KB) |  | HTML iconHTML  

    A fully integrated differential class-AB power amplifier has been designed in a 0.25um CMOS technology. It is intended for medium output power ranges such as Bluetooth class I, and has an operating frequency of 2.45GHz. By using two parallel output stages that can be switched on or off, a high efficiency can be achieved for both high and low output power levels. The simulated maximum output power is 22.7 dBm, while the maximum power-added efficiency is 22%. View full abstract»

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  • Power optimized packet buffering in a protocol processor

    Page(s): 1026 - 1029 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1432 KB) |  | HTML iconHTML  

    In the emerging research area of protocol processors (PP) there exist many hardware platform proposals. One example of such a platform solution has been proposed by the author in a series of papers, mainly focusing on datapath organization and optimization. The proposed platform is unique since the fast path process incoming packets before storage in the input buffer. This paper proposes that a FIFO buffer should be added to the input buffer to lower the power; consumption. The optimization process and the optimal input buffer architecture are dependent on a large number of parameters, e.g. network type and traffic, host system and physical implementation process. Simulating energy consumption characteristics, a number of architectural conclusions have been made. Especially an input packet buffer configuration is proposed which can he used in a wide variety of network applications and host systems. View full abstract»

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  • State of the art ultra-wideband technology for communication systems: a review

    Page(s): 1276 - 1279 Vol.3
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    Ultra-wideband technology is rapidly shaping up as a very challenging alternative for current indoor short distance wireless communication. An overview of the silent characteristics of UWB and its implications on future modem wireless communications systems is presented in this work. Future projections on UWB technology are also outlined. View full abstract»

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  • Enhanced genetic algorithm kernel applied to a circuit-level optimization E-design environment

    Page(s): 1046 - 1049 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1454 KB) |  | HTML iconHTML  

    This paper presents a circuit/system-level optimization E-Design environment based on an enhanced modified genetic algorithm kernel. The presented approach improves the standard genetic algorithm implementation by including automatic search space decomposition, premature convergence prevention procedures and distributed processing features. In order to cover a broad range of solutions in terms of circuit/system complexity within a realistic execution time both behavioral simulation, using equation-based descriptions, and electrical simulation, using Spice-like simulators, are considered. Moreover, an E-Design front-end allowing an incremental growth of the IC design database, an individual management of each project and the widespread training on the design flow procedures is being developed. Finally, the achieved increase on optimization efficiency, compared to a standard genetic algorithm implementation, as well as the general purpose of the described approach are illustrated by a multiobjective, multi-constraint optimization of some well known circuits. View full abstract»

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  • A novel multiobjective evolutionary algorithm for optimal reactive power dispatch problem

    Page(s): 1054 - 1057 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1428 KB) |  | HTML iconHTML  

    In this paper, a novel multiobjective evolutionary algorithm for optimal reactive power (VAR) dispatch problem is presented. The optimal VAR dispatch problem is formulated as a nonlinear constrained multiobjective optimization problem where the real power loss and the bus voltage deviations are to be minimized simultaneously. A new Strength Pareto Evolutionary Algorithm (SPEA) based approach is proposed to handle the problem as a true multiobjective optimization problem with competing and noncommensurable objectives. A hierarchical clustering algorithm is imposed to provide the decision maker with a representative and manageable Pareto-optimal set. The results demonstrate the capabilities of the proposed approach to generate true and well-distributed Pareto-optimal nondominated solutions in one single run. The results also show the superiority of the proposed approach and confirm its potential to solve the multiobjective VAR dispatch problem. View full abstract»

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  • A new mixed stable DEM algorithm for bandpass multibit delta sigma ADC

    Page(s): 962 - 965 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1432 KB) |  | HTML iconHTML  

    A multibit delta-sigma modulator (DSM) is an attractive way of realizing a high-accuracy, high-speed, and low power data converter. However, the overall resolution of delta-sigma modulators is limited by the internal digital-to-analog converter (DAC) nonlinearity that is normally caused by mismatching errors while realizing. Recently, some dynamic element matching (DEM) methods were proposed for reducing mismatch errors by spectral shaping of its naturally white spectrum, but almost all higher order DEM have serious problems of instability and hardware complexity. This paper presents a new more stable algorithm mixed of third and second order mismatch noise shaping. Simulation results show the considerably improving of inband noise shaping, stability and hardware complexity for a third order 17-level bandpass DSM. The proposed technique can also be used in lowpass DSM and extended number of quantization DAC level. View full abstract»

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  • The simple RS232 hub to interface microcontroller peripheral devices with the central processor

    Page(s): 1208 - 1211 Vol.3
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    A simple interface, which can link up to 32 peripheral devices with the central processor, has been presented in this paper. Peripheral devices can be extremely simple even without a quartz-stable clock. The interface was named RS232 hub. Hub enables that the peripheral devices linked to it simultaneously send and receive data. The peripheral devices are linked to hub with a two-wire line, over which gets power supply and communicates. View full abstract»

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  • Microwave performance of optically controlled MESFETs

    Page(s): 1304 - 1307 Vol.3
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    This paper presents the characterization of illuminated high-frequency active devices using a time domain physical simulation model. The model is based on Boltzmann's Transport Equation (BTE), which accurately accounts for carrier transport in microwave and millimeter wave devices with sub-micrometer gate lengths. Illumination effects are accommodated in the model to represent carrier density changes inside the illuminated device. The simulation results are compared to available experimental records for a typical MESFET for validation purposes. The calculated y-parameters of the device show the profound effect of illumination on the microwave characteristics. These findings make the model an important tool for the design of active devices under illumination control. View full abstract»

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  • The five-phase twisted-ring counter circuit

    Page(s): 1152 - 1155 Vol.3
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    The behavior of the Five-Phase Twisted-Ring Counter (5P-TRC) circuit is analyzed. The circuit produces five individual phased clock signals that exercise a phase difference equal to the half period of the clock. A tree-like structure is built by applying the phased outputs of the circuit to the clock inputs of five replicas of the circuit in order to extend its behavior. The EXOR5 gate is used to define a mirroring structure attached to the 5P-TRC structure such that a primitive/expanded counter configuration is formed. A fundamental concept being described by the transposition mechanism of the EXOR operator is incorporated to the above configuration such that the phase association of interconnecting signals is preserved. View full abstract»

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  • Implications of laser nonlinearity on the performance of integrated analog wireless/optical networks: modeling, simulation and measurements

    Page(s): 1220 - 1223 Vol.3
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    In this paper, we present a semiconductor laser model to accurately predict the dynamic operations and the nonlinear distortion in a directly modulated semiconductor lasers. We introduce a new implementation technique for the proposed model that provides a compelling incentive for the performance assessment and enhancement of the analog wireless/optical transceivers using Agilent Advanced Design System (ADS) CAD tool. A detailed comparative experimental and simulation study of the dynamic operation and the nonlinear distortion in laser diodes are used to verify the accuracy of the proposed model for analyzing the performance of the analog optical transmitters. The measured results, such as harmonic and intermodulation distortion levels, are in good agreement with the simulation results. View full abstract»

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  • Performance evaluation of a distributed telerobotic framework

    Page(s): 1284 - 1287 Vol.3
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    In this paper we present the performance evaluation of a Distributed Component based Telerobotic Framework that implements a real-time interaction between a telrobotic client and server. The objective is to optimize delays in multistreaming of force feedback, stereo data and master-slave commands. Different scenarios are considered and statistically analyzed to relate the effect of thread manipulation to time delays. Telerobotic components communicate with each other using .NET Remoting and SOAP (Simple Object Access Protocol) that automatically handle the network resources and data transfer. This approach significantly reduces the delays over a LAN as we are able to attain a rate of 17-18 stereo frames per second from camera(server) to remote client over the same LAN. To the best of our knowledge, this is the highest rate achieved over a 100 Mbps LAN. View full abstract»

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  • A clock jitter insensitive multibit DAC architecture for high-performance low-power continuous-time ΣΔ modulators

    Page(s): 958 - 961 Vol.3
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    The design of a clock-jitter insensitive multibit digital-to-analog converter (DAC) topology for high-performance low-power continuous-time ΣΔ modulators is presented. The 9 level DAC circuit uses a time-variant feedback pulse shape to reduce both the clock jitter influence as well as the slew rate and bandwidth requirements of the used amplifiers and therewith the overall power consumption of the modulator. Additional it will be shown that the proposed concept is suitable for very low supply voltages. The DAC architecture was exemplary implemented in a second-order 2MHz CT ΣΔ modulator for UMTS applications operating at a sample frequency of 50MHz. The modulator operates from a single 1.8V power supply and achieves a 11-bit dynamic range for the 2MHz passband. View full abstract»

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  • Router buffering and caching techniques for multisession reliable multicast

    Page(s): 1264 - 1267 Vol.3
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    In this paper, we consider a multi-session multicast network and the data caching technique at router for bss recovery. Several policies of router forwarding buffer allocation and router cache partition are introduced for use in the multi-session multicast network. The effect of these policies on the performance of reliable multicast is tested, compared, and analyzed. View full abstract»

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  • Automatic adaptation of user interfaces for computerized educational systems

    Page(s): 1232 - 1235 Vol.3
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    Intelligent interaction between a human user and the machine, as one the outcomes of the huge progress in the field of human-computer interaction, is leading to the development of adaptive user interfaces making communication decisions dynamically, at run-time. This goes along with simultaneous efforts relating to the inclusion of a higher level of intelligence in computer-supported learning and teaching systems, what has already led to the development of emulators of human tutors - intelligent tutoring systems, as well as their generators - authoring shells. Our research is focussed on adaptive interfaces for intelligent computerized educational systems like authoring shells. Issues concerning requirements, design, implementation as well as improvement of the automatic adaptation mechanism embedded in an authoring shell interface are elaborated in this paper. View full abstract»

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  • A new algorithm for three-phase to single-phase AC/AC matrix converters

    Page(s): 1121 - 1124 Vol.3
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    This paper presents a new algorithm for three-phase to single-phase AC/AC matrix converters. This method is based on the minimum error between the real and the forecasted output voltages. By this new method, any favorable output with variable frequency and amplitude may be produced. The most important characteristics of this new algorithm is that even under unbalanced and significantly distorted input voltage waveforms, the output waveforms turn out to be reasonably clean and balanced. Also the amplitude of the output voltage obtained by this method is up to √3Vi. Using this new control method, it is ensured that the switches do not short-circuit the voltage sources, and do not open-circuit the current sources. Another advantage is that the converter designed by this new method has very low loss. View full abstract»

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  • Multi-agent architecture for intelligent E-learning

    Page(s): 1228 - 1231 Vol.3
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    After the initial explosion of E-learning with tremendous hope, a more realistic era is starting where E-learning is assessed and new trends are followed. The paper presents a multi-agent architecture allowing the system not only to tutor and manage the user learning process but also to discover, by learning, the student model and evaluate his progress. For those purposes, agents count on different machine learning techniques such as functional-link neural networks, case-based reasoning and fuzzy logic. View full abstract»

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  • A static test compaction technique for combinational circuits based on independent fault clustering

    Page(s): 1316 - 1319 Vol.3
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    Testing system-on-chip involves applying huge amounts of test data, which is stored in the tester memory and then transferred to the circuit under test during test application. Therefore, practical techniques, such as test compression and compaction, are required to reduce the amount of test data in order to reduce both the total testing time and the memory requirements for the tester. In this paper, a new static compaction algorithm for combinational circuits is presented. The algorithm is referred to as independent fault clustering. It is based on a new concept called test vector decomposition. Experimental results for benchmark circuits demonstrate the effectiveness of the new static compaction algorithm. View full abstract»

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  • Automated brain tissue segmentation and MS lesion detection using fuzzy and evidential reasoning

    Page(s): 1070 - 1073 Vol.3
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1465 KB) |  | HTML iconHTML  

    This paper presents a fuzzy and evidential reasoning approach for segmenting main brain tissues: white matter (WM), grey matter (GM), and cerebrospinal fluid (CSF), as well as detecting multiple sclerosis lesions (MS) based on multi-modality MR images. The method performs intensity based tissue segmentation using a fuzzy Dempster-Shafer evidential reasoning data fusion scheme while MS lesions are detected by means of a fuzzy inferencing scheme. The approach is fully automated and unsupervised. Experiments have been carried out for segmenting 15 axial slices of multi-modality MR images obtained from the Simulated Brain Database (SBD). The average overall accuracy is 96.77% for segmenting tissues CSF, GM, and WM. The average sensitivity is 84.34%, and the average similarity index is 81.94% in MS detection in terms of ground truth images. View full abstract»

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