Issue 8 • Date Aug. 1995
Filter Results
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Synthesis of hazard-free multilevel logic under multiple-input changes from binary decision diagrams
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PDF (1096 KB)
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Pattern independent maximum current estimation in power and ground buses of CMOS VLSI circuits: Algorithms, signal correlations, and their resolution
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PDF (1404 KB)
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Transport effects and characteristic modes in the modeling and simulation of submicron devices
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PDF (624 KB)
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Functional timing analysis using ATPG
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PDF (604 KB)
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Template-based MOSFET device model
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PDF (836 KB)
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Efficient approximation of the time domain response of lossy coupled transmission line trees
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PDF (880 KB)
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Aims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu


