IEEE Electron Device Letters

Issue 9 • Sept. 2017

The purchase and pricing options are temporarily unavailable. Please try again later.

Filter Results

Displaying Results 1 - 25 of 50

Publication Year: 2017, Page(s):C1 - 1190
| PDF (197 KB)
• IEEE Electron Device Letters

Publication Year: 2017, Page(s): C2
| PDF (108 KB)
• Changes to the Editorial Board

Publication Year: 2017, Page(s): 1191
| PDF (123 KB) | HTML
• Reduced Junction Leakage by Hot Phosphorus Ion Implantation of NiGe-Contacted Germanium n+/p Shallow Junction

Publication Year: 2017, Page(s):1192 - 1195
| | PDF (847 KB) | HTML

Effects of hot phosphorus (P) implantation on the NiGe-contacted Ge n+/p junction are studied in this work. At an adequately high ion-implantation temperature (150°C), the P depth profiles of the hot-implanted samples are similar to that of the room-temperature implanted ones. Hot P implantation is demonstrated effectively in reducing ion implantation induced defect formation and suppressin... View full abstract»

• Band Offset Enhancement of a-Al2O3/Tensile-Ge for High Mobility Nanoscale pMOS Devices

Publication Year: 2017, Page(s):1196 - 1199
| | PDF (848 KB) | HTML

The band alignment properties of amorphous Al2O3 on strain-engineered biaxial tensile-strained epitaxial Ge, grown in situ by molecular beam epitaxy on InxGa1-xAs virtual substrates, are presented. X-ray photoelectron spectroscopy investigation demonstrated an increase in the valence band offset of the Al2O3/strained Ge system with ... View full abstract»

• Design and Simulation of a Novel Graded-Channel Heterojunction Tunnel FET With High ${I} _{scriptscriptstyletext {ON}}/{I} _{scriptscriptstyletext {OFF}}$ Ratio and Steep Swing

Publication Year: 2017, Page(s):1200 - 1203
| | PDF (1364 KB) | HTML

In this letter, a novel graded-channel heterojunction tunnel field-effect transistor (GCH-TFET) is proposed and studied by simulation. The novel TFET adopts a near broken-gap heterojunction at the source/channel interface to enhance the tunnel efficiency. Besides, it employs a graded component channel which works as an electron barrier to block up the leakage current at the OFF-state and can be re... View full abstract»

• Unsupervised Learning Using Charge-Trap Transistors

Publication Year: 2017, Page(s):1204 - 1207
| | PDF (852 KB) | HTML

Unsupervised learning is demonstrated using a device ubiquitously found in today's technology: a transistor with high-k -metal gate. Specifically, the charge-trapping phenomenon in the high-k gate dielectric is leveraged so that the device can be used as a non-volatile analog memory. Experimental data from 22-nm silicon-on-insulator devices reveal that a charge-trap transistor possesses promising ... View full abstract»

• Emulating Short-Term and Long-Term Plasticity of Bio-Synapse Based on Cu/a-Si/Pt Memristor

Publication Year: 2017, Page(s):1208 - 1211
| | PDF (1254 KB) | HTML

Short-term plasticity and long-term plasticity of bio-synapse are thought to underpin critical physiological functions in neural circuits. In this letter, we vividly emulated the short-term and long-term synaptic functions in a single Cu/a-Si/Pt memristor. By controlling the injection quantity of Cu cations into the a-Si layer, the device showed volatile and non-volatile resistive switching behavi... View full abstract»

• PCMO-Based RRAM and NPN Bipolar Selector as Synapse for Energy Efficient STDP

Publication Year: 2017, Page(s):1212 - 1215
| | PDF (1049 KB) | HTML

Resistance random access memories (RRAMs) are widely explored to show spike time dependent plasticity (STDP) as a learning rule to show biological synaptic behavior, as these devices possess analog conductance change. To implement STDP, preand post-neuronal waveforms are superposed. Only the peak voltage changes the conductance of memory. But due to the remaining part of the waveform (which don't ... View full abstract»

• Experimental Observation of Negative Susceptance in HfO2-Based RRAM Devices

Publication Year: 2017, Page(s):1216 - 1219
| | PDF (639 KB) | HTML

Negative susceptance is experimentally measured in the low resistance state of TiN/Ti/HfO2/W resistive RAM memories. A meminductive-like behavior appears along with the memristive effects. A detailed study of small-signal parameters measured at 0 V after applying positive and negative voltage pulses is presented. A simple model for the conductive filaments consisting in a resistance in ... View full abstract»

• Linking Conductive Filament Properties and Evolution to Synaptic Behavior of RRAM Devices for Neuromorphic Applications

Publication Year: 2017, Page(s):1220 - 1223
| | PDF (1524 KB) | HTML

We perform a comparative study of HfO2 and Ta2O5 resistive switching memory (RRAM) devices for their possible application as electronic synapses. By means of electrical characterization and simulations, we link their electrical behavior (digital or analog switching) to the properties and evolution of the conductive filament (CF). More specifically, we identify that... View full abstract»

• Device Instability of ReRAM and a Novel Reference Cell Design for Wide Temperature Range Operation

Publication Year: 2017, Page(s):1224 - 1227
| | PDF (1150 KB) | HTML

This letter addresses two difficult challenges for transition metal oxide resistive random access memories (ReRAMs)-sensitivity to operation temperature and random fluctuation of resistance value. A careful study of a WOx ReRAM array reveals that these devices are unstable and their read currents fluctuate with time due to random telegraph noise and structure relaxation. Consequently, e... View full abstract»

• Input Voltage Mapping Optimized for Resistive Memory-Based Deep Neural Network Hardware

Publication Year: 2017, Page(s):1228 - 1231
| | PDF (701 KB) | HTML

Artificial neural network (ANN) computations based on graphics processing units (GPUs) consume high power. Resistive random-access memory (RRAM) has been gaining attention as a promising technology for implementing power-efficient ANNs, replacing GPU. However, nonlinear I-V characteristics of RRAM devices have been limiting its use for ANN implementation. In this letter, we propose a method and a ... View full abstract»

• Uniformity and Retention Improvement of TaOx-Based Conductive Bridge Random Access Memory by CuSiN Interfacial Layer Engineering

Publication Year: 2017, Page(s):1232 - 1235
| | PDF (710 KB) | HTML

Uniformity and retention are crucial aspects for application of conductive bridge random access memory. In this letter, a self-aligned CuSiN interfacial layer was inserted into Cu/TaOx/Ru device to obtain a Cu/CuSiN/TaOx/Ru structure. Compared with the Cu/TaOx/Ru device, the Cu/CuSiN/TaOx/Ru device shows much improved uniformity of resistance and program... View full abstract»

• Natural Local Self-Boosting Effect in 3D NAND Flash Memory

Publication Year: 2017, Page(s):1236 - 1239
| | PDF (843 KB) | HTML

This letter examined the natural local self-boosting effect of an inhibited channel in three-dimensional (3D) NAND flash memory. The inhibited channel in the 3D NAND flash structure can be in the floating state easily, because its channel is not connected directly to its substrate. Despite the application of the global self-boosted program-inhibit scheme, the selected wordline cell is localized au... View full abstract»

• Log-Normal Statistics in Filamentary RRAM Devices and Related Systems

Publication Year: 2017, Page(s):1240 - 1243
| | PDF (510 KB) | HTML

We present a phenomenological theory of the log-normal statistics commonly observed in filamentary resistive memory and related devices. Based on the central limit theorem that statistics are shown to emerge regardless of the underlying material properties when the processes are dominated by thermal activation or tunneling. That takes place in particular for the read-out resistances in the high-re... View full abstract»

• Low-Temperature Characterization of Cu–Cu:Silica-Based Programmable Metallization Cell

Publication Year: 2017, Page(s):1244 - 1247
| | PDF (631 KB) | HTML

In this letter, low-temperature characterization of Cu-Cu:silica programmable metallization cells (PMC) is presented. Our results show that the PMC device is functional even at 4 K and that the low resistance state is essentially unaffected by temperature whereas the high resistance state increases with decreasing temperature. A direct tunneling model is applied to explain the temperature independ... View full abstract»

• Humidity-Dependent Synaptic Plasticity for Proton Gated Oxide Synaptic Transistor

Publication Year: 2017, Page(s):1248 - 1251
| | PDF (760 KB) | HTML

Indium-tin-oxide synaptic transistors using proton conducting nanogranular phosphorosilicate glass as gate dielectric are fabricated. Humidity-dependent proton gating behaviors are observed. Moreover, synaptic plasticities are mimicked on the proton gated oxide synaptic transistors. Interestingly, enhanced synaptic facilitation is observed at higher relative humidity originated from the strengthen... View full abstract»

• Oxygen Interstitial Creation in a-IGZO Thin-Film Transistors Under Positive Gate-Bias Stress

Publication Year: 2017, Page(s):1252 - 1255
| | PDF (657 KB) | HTML

The electrical recovery behaviors of the amorphous InGaZnO thin-film transistors (a-IGZO TFTs) after positive gate-bias stress (PBS) are investigated. The TFTs show an evident sub-threshold swing (SS) degradation after the PBS removal when the channel layer is deposited at relatively high oxygen flow rates, although they exhibit a parallel positive shift in the transfer characteristics during the ... View full abstract»

• High-Performance Stacked Double-Layer N-Channel Poly-Si Nanosheet Multigate Thin-Film Transistors

Publication Year: 2017, Page(s):1256 - 1258
| | PDF (2073 KB) | HTML

A high-performance stacked double-layer N-channel poly-Si nanosheet (NS) multigate thin-film transistor (DLNS-TFT) is demonstrated successfully. The proposed device has low cost, is easy to fabricate, and is compatible with Si MOSFET, active-matrix organic light-emitting diode, and active-matrix liquid-crystal display fabrication. This DLNS-TFT reveals high driving current (> 105 A/u... View full abstract»

• Low-Temperature Solution-Based In2O3 Channel Formation for Thin-Film Transistors Using a Visible Laser-Assisted Combustion Process

Publication Year: 2017, Page(s):1259 - 1262
| | PDF (603 KB) | HTML

This letter reports the low-temperature solution-based fabrication of indium oxide (In2O3) thin-film transistors (TFTs) using a visible laser-assisted urea combustion process. An In2O3 precursor solution containing a small amount of urea absorbed the photon energy from a blue laser and started the combustion of urea to form a crystallized In2O... View full abstract»

• Areal Geometric Effects of a ZnO Charge-Trap Layer on Memory Transistor Operations for Embedded-Memory Circuit Applications

Publication Year: 2017, Page(s):1263 - 1265
| | PDF (600 KB) | HTML

The areal geometric effects of a ZnO charge-trap layer (CTL) on the device characteristics of a charge-trap memory thin-film transistor were investigated for embedded-memory circuit applications. While the device with a larger overlapped region between the CTL and active channel exhibited a larger memory window and faster program speed, in order to guarantee long-term memory retention even under h... View full abstract»

• Two-Color niBin Type II Superlattice Infrared Photodetector With External Quantum Efficiency Larger Than 100%

Publication Year: 2017, Page(s):1266 - 1269
| | PDF (487 KB) | HTML

We report on a two-color niBin type II InAs/GaSb superlattice (SL) infrared photodetector. The two-color detection is realized by changing the applied bias polarity. At room temperature (RT), the 50% cutoff wavelength is 3.62 μm for one band and is 4.91 μm for the other at different bias voltage. The measured quantum efficiency (QE) of one band at the peak response is 114% at RT. Thi... View full abstract»

• Dual-Gate Phototransistor With Perovskite Quantum Dots-PMMA Photosensing Nanocomposite Insulator

Publication Year: 2017, Page(s):1270 - 1273
| | PDF (1063 KB) | HTML

Dual-gate InGaZnO thin-film-transistors were fabricated to demonstrate their feasibility as phototransistors by fully exploiting the perovskite quantum dots (QDs) with superior quantum yield. Here, we show that by coupling the top-gate photo sensing polymethyl methacrylate (PMMA)/CsPbBr3 QDs hybrid insulator with the classic SiO2 bottom-gate insulator, the phototransistor can... View full abstract»

• Comparison on the Synchronization of Two Parallel GaAs Photoconductive Semiconductor Switches Excited by Laser Diodes

Publication Year: 2017, Page(s):1274 - 1277
| | PDF (954 KB) | HTML

In this letter, the synchronization of GaAs photoconductive semiconductor switches in two electrically driven configurations for laser diodes excitation is investigated. Comparisons on the synchronization are carried out by varying the bias electric field and optical excitation energy. The optimum synchronization of 296 ps is achieved at 1.2 kV with optical excitation energy of 1.9 μJ. The ... View full abstract»

Aims & Scope

IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron devices.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Tsu-Jae King Liu
tking@eecs.berkeley.edu