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IEEE Micro

Issue 1 • Feb. 1995

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Displaying Results 1 - 9 of 9
  • The memory-integrated network interface

    Publication Year: 1995, Page(s):11 - 19
    Cited by:  Papers (24)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (917 KB)

    Our zero-copy ATM Memory-Integrated Network interface targets 1-Gbps bandwidth with 1.2-μs latency for applications that need to send or receive data at very frequent intervals. Applications can send or receive packets without operating system support, initiate packet transmission with one memory write, and determine packet arrival. At the same time the operating system can use MINI for co... View full abstract»

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  • Vertical processing systems: a survey

    Publication Year: 1995, Page(s):65 - 75
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (716 KB)

    Work with associative memories and associative-array processing has culminated in the development of fine-grained single-instruction, multiple-data computing systems, called vertical processing systems, that employ bit-slice sequential processing. After reviewing the engineering characteristics of various commercial and research models such as the DAP, MPP, and CM, this survey proposes a combined ... View full abstract»

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  • A case for NOW (Networks of Workstations)

    Publication Year: 1995, Page(s):54 - 64
    Cited by:  Papers (327)  |  Patents (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (992 KB)

    Networks of workstations are poised to become the primary computing infrastructure for science and engineering. NOWs may dramatically improve virtual memory and file system performance; achieve cheap, highly available, and scalable file storage: and provide multiple CPUs for parallel computing. Hurdles that remain include efficient communication hardware and software, global coordination of multip... View full abstract»

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  • Low-latency communication over ATM networks using active messages

    Publication Year: 1995, Page(s):46 - 53
    Cited by:  Papers (20)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (684 KB)

    Today's communication architectures for parallel machines reduce communication overheads and latencies by over an order of magnitude. However, carrying over these techniques to workstation clusters connected by an ATM network presents major design challenges. We discuss the differences in communication characteristics between workstation clusters built from standard hardware and software component... View full abstract»

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  • TNet: a reliable system area network

    Publication Year: 1995, Page(s):37 - 45
    Cited by:  Papers (58)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (716 KB)

    A major departure from traditional I/O systems, TNet is a new system area network designed to support current and future needs for reliable, efficient communications among processors and peripherals. It is an extensible hardware-software layer that allows very large configurations by logically and physically isolating processor buses from I/O buses. TNet features wormhole routing, packet-switched ... View full abstract»

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  • Virtual-memory-mapped network interfaces

    Publication Year: 1995, Page(s):21 - 28
    Cited by:  Papers (39)  |  Patents (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (648 KB)

    In today's multicomputers, software overhead dominates the message-passing latency cost. We designed two multicomputer network interfaces that significantly reduce this overhead. Both support virtual-memory-mapped communication, allowing user processes to communicate without expensive buffer management and without making system calls across the protection boundary separating user processes from th... View full abstract»

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  • Micro Standards: preparing for global participation

    Publication Year: 1995, Page(s):76 - 77
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (164 KB)

    The global marketplace demands quicker, cheaper standards development. The preparations by the IEEE standards writing community to ready itself for global participation makes for an exciting and timely topic. Nowhere on this globe is there a single standards-developing body, I believe, that is not reviewing its international relationships. No matter what our country of origin, we all must realize ... View full abstract»

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  • Hauling manufacturers into the ITC [US International Trade commission]

    Publication Year: 1995, Page(s):6 - 7, 80
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    Are US industries sitting ducks for foreign manufacturers' claims of patent infringement on US-made products? Mention the US International Trade Commission (ITC) to most US electronics manufacturers and they'll think of a federal agency that sues Japanese and other offshore manufacturers for patent infringement and bars their products from being imported into the US. Mention the ITC to most foreig... View full abstract»

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  • Myrinet: a gigabit-per-second local area network

    Publication Year: 1995, Page(s):29 - 36
    Cited by:  Papers (768)  |  Patents (59)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (712 KB)

    The Myrinet local area network employs the same technology used for packet communication and switching within massively parallel processors. In realizing this distributed MPP network, we developed specialized communication channels, cut-through switches, host interfaces, and software. To our knowledge, Myrinet demonstrates the highest performance per unit cost of any current LAN View full abstract»

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Erik R. Altman
School of Electrical and Computer Engineering
IBM T.J. Watson Research Center