# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 25 of 31

Publication Year: 2017, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—II:Express Briefs publication information

Publication Year: 2017, Page(s): C2
| PDF (73 KB)
• Analog and Mixed Mode Circuits and Systems
• ### Analysis of a Class-E Power Amplifier With Shunt Filter for Any Duty Ratio

Publication Year: 2017, Page(s):857 - 861
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The class-E power amplifier with shunt filter, which is also known as the class-E power amplifier with shunt capacitance and shunt filter, is proposed in this brief for any duty ratio. The basic circuit waveforms and design equations are derived and the design parameters of the circuit elements for some selected duty ratios are numerically solved. Subsequently, the characteristics of the class-E p... View full abstract»

• ### Symmetric Three-Way Doherty Power Amplifier for High Efficiency and Linearity

Publication Year: 2017, Page(s):862 - 866
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This brief presents a three-way Doherty power amplifier (DPA) with a symmetric structure in terms of the output power capacities between the carrier and peaking amplifiers for high efficiency and linearity. Based on the analysis for the efficiency peak at the output power back-off, a symmetric structure was adopted to have higher overall efficiency for the modulated signal. Through the optimized b... View full abstract»

• ### A Biquadratic Cell Based on the Flipped-Source-Follower Circuit

Publication Year: 2017, Page(s):867 - 871
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This brief presents a novel biquadratic cell (biquad) based on the flipped-source-follower (FSF) circuit. The main idea is to exploit the FSF circuit as a basic building block for a low-pass second-order filter, taking advantage of its well-known strengths, like low-output impedance, low-noise, large in-band linearity, and low power. Thanks to the very essential FSF circuit, the resulting biquad i... View full abstract»

• ### A Technique for Enhancing Varactor’s Quality Factor in Millimeter-Wave Frequencies

Publication Year: 2017, Page(s):872 - 876
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Varactors are key devices in the design of voltage-controlled oscillators (VCOs), as their quality factor (Q-factor) at the millimeter-wave frequency range limits the overall LC tank Q-factor. This brief presents a new circuit-level structure, called Q-enhanced varactor (QEV), that is composed of two metal-insulator-metal capacitors (MIMCAPs) and a varactor. Depending on Q-factors and the values o... View full abstract»

• ### A Low-Voltage Folded-Switching Mixer Using Area-Efficient CCG Transconductor

Publication Year: 2017, Page(s):877 - 881
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This brief presents a low-voltage folded-switching mixer in 65-nm CMOS process. A modified complimentary common gate pair is utilized as the input transconductance stage, where a transformer is subtly applied for chip size reduction. Benefitted from the current reuse, the pMOS transistor not only works for radio frequency (RF) signal amplification, but also acts as the current bleeding path. This ... View full abstract»

• ### Dual AC Boosting Compensation Scheme for Multistage Amplifiers

Publication Year: 2017, Page(s):882 - 886
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In this brief, a dual AC boosting compensation (DACBC) scheme is presented for multistage amplifiers with low power and a large capacitive load. Dual AC boosting paths are introduced to move the zero from the right-half-plane to the left-half-plane as compared with conventional AC boosting compensation (ACBC) scheme, which helps to improve the phase margin and gain bandwidth (GBW) product of the a... View full abstract»

• ### A PFM-Based Digital Pixel With an Off-Pixel Residue Measurement for Small Pitch FPAs

Publication Year: 2017, Page(s):887 - 891
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Digital pixels based on pulse frequency modulation employ counting techniques to achieve a very high charge-handling capability compared to their analog counterparts. Moreover, extended counting methods that make use of leftover charge (residue) on the integration capacitor help to improve the noise performance of these pixels. However, focal plane arrays with small pixel pitch are constrained in ... View full abstract»

• ### An All-MOSFET Voltage Reference With −50-dB PSR at 80 MHz for Low-Power SoC Design

Publication Year: 2017, Page(s):892 - 896
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This brief presents a voltage reference (VR) for modern low-power system-on-chip applications, in which a high-frequency supply ripple can degrade system performance. With a compact MOSFET low-pass filter, which was developed along with a feedback technique for a wide-bandwidth power supply rejection (PSR), the VR achieves PSR better than 50 dB for frequencies of up to 80 MHz, which was not achiev... View full abstract»

• ### An Energy-Efficient Mobile Memory I/O Interface Using Simultaneous Bidirectional Multilevel Dual-Band Signaling

Publication Year: 2017, Page(s):897 - 901
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An energy-efficient and high-speed mobile memory interface using a novel multilevel dual-band (MDB) signaling is demonstrated. The proposed MDB memory interface that incorporates pulse amplitude modulation (PAM) and RF-band signaling enables simultaneous bidirectional data links through a shared single-ended off-chip transmission line. The PAM and RF-band carries 9.2 and 4.2 Gb/s/pin, respectively... View full abstract»

• ### Low-Power Channel Select Filters for DVB-H Receivers

Publication Year: 2017, Page(s):902 - 906
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Design and implementation of CMOS channel select filters for digital video broadcasting-handheld integrated direct-conversion receivers are presented. The filters are designed to fulfill selectivity requirements with optimized power consumption. The proposed filters are based on the current amplifier and the transresistance amplifier offering alternatives for current-mode and voltage-mode signal p... View full abstract»

• Circuits and Systems for Communications
• ### Carrier Index Differential Chaos Shift Keying Modulation

Publication Year: 2017, Page(s):907 - 911
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A new carrier index differential chaos shift keying (DCSK) modulation method combining index modulation (IM) with multicarrier DCSK (MC-DCSK) is proposed. Two schemes employing two different index selectors and detectors to implement IM and demodulation are introduced. The new designed index selectors are one-to-one mappings between the index symbols and the carrier activation patterns, which can ... View full abstract»

• ### Aliasing-Compensated Polar PWM Transmitter

Publication Year: 2017, Page(s):912 - 916
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This brief presents a novel pulse-width modulation (PWM) transmitter architecture that compensates for aliasing distortion by combining PWM and outphasing. The proposed transmitter can use either switch-mode power amplifiers (PAs) or linear PAs at peak power, ensuring maximum efficiency. The transmitter shows better linearity, improved spectral performance, and increased dynamic range compared to ... View full abstract»

• ### High-Selectivity Tunable Balanced Bandpass Filter With Constant Absolute Bandwidth

Publication Year: 2017, Page(s):917 - 921
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This brief presents a new and effective approach for designing a high-selectivity tunable balanced bandpass filter (BPF) with constant absolute bandwidth (ABW). The filter is composed of two open-loop resonators with a pair of symmetrically loaded varactor diodes to obtain tunable responses. The major design concept relies on choosing the particular position on the resonator for loading the varact... View full abstract»

• ### A 35-dBm OIP3 CMOS Constant Bandwidth PGA With Extended Input Range and Improved Common-Mode Rejection

Publication Year: 2017, Page(s):922 - 926
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An improved CMOS second generation current conveyor with adaptive control circuit (ACC) is proposed, and is used to build a highly linear transconductance-transimpedance programmable gain amplifier (PGA). This PGA is fabricated in a 0.18-μm CMOS technology and draws a 0.58-mA current from a supply of 1.8 V. It achieves a 0-14-dB-gain range within a roughly constant bandwidth of 30 MHz when ... View full abstract»

• ### A Power and Area Efficient Architecture of a PRBS Generator With Multiple Outputs

Publication Year: 2017, Page(s):927 - 931
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This brief presents a technique for achieving a power and area efficient high-speed pseudo-random binary sequence generator (PRBSG) with multiple decorrelated outputs. This architecture uses modules consisting of a novel half-rate PRBSG and a speed doubler block (SDB). The SDB can be cascaded to achieve any desired higher speed multioutput PRBSG in the module. A systematic procedure for designing ... View full abstract»

• Computer Aided Design and Electronic Design Automation
• ### Verifying Rollett’s Proviso on Active Devices Under Arbitrary Passive Embeddings

Publication Year: 2017, Page(s):932 - 936
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Some results implicit in Ohtomo's original paper are reappraised and built upon to help high-frequency circuit designers avoid common misconceptions. An analysis of the small-signal stability of an intrinsic device is presented, based on a closed-form evaluation of the network determinant in admittance representation and on the relevant Nyquist plot. Since the intrinsic is studied as a three-port,... View full abstract»

• Power Systems and Electronic Circuits
• ### Stochastic Resonance in Simple Electrical Circuits Driven by Quadratic Gaussian Noise

Publication Year: 2017, Page(s):937 - 941
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In this brief, we report exact analytical and numerical evidence of the occurrence of the stochastic resonance (SR) phenomenon in simple electrical circuits driven by a quadratic Gaussian colored noise and by a Gaussian white noise. As an example, we have used an RL configuration. However, it is clear that the phenomenon occurs in any other configuration governed by the same type of evolution equa... View full abstract»

• ### High-Efficiency Wireless Power Transfer System for Electric Vehicle Applications

Publication Year: 2017, Page(s):942 - 946
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In this brief, a high-efficiency wireless power transfer (WPT) system for electric vehicle charging application is studied and implemented. Series-series resonant topology with RF feedback design is adopted as the WPT dc-dc stage due to the advantages of circuit simplicity, easy analysis, and control. A 500-W laboratory prototype is built and tested to verify the feasibility of the proposed design... View full abstract»

• Control Theory and Systems
• ### Global Finite-Time Stabilization of Planar Linear Systems With Actuator Saturation

Publication Year: 2017, Page(s):947 - 951
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This brief addresses the problem of global finite-time stabilization of planar linear systems subject to actuator saturation. A simple saturated proportional-derivative controller is proposed. Lyapunov stability theory and geometric homogeneity technique are employed to show global finite-time stability. The appealing features of the proposed control include the very simple structure and intuitive... View full abstract»

• Power Systems and Electronic Circuits
• ### A SIDIDO DC–DC Converter With Dual-Mode and Programmable-Capacitor-Array MPPT Control for Thermoelectric Energy Harvesting

Publication Year: 2017, Page(s):952 - 956
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A single-inductor dual-input-dual-output dc-dc converter with dual-mode and programmable-capacitor-array (PCA) maximum power point tracking (MPPT) control for thermoelectric energy harvesting is presented. With the proposed dual-mode control, the system can deliver a wide output power range from 180 μW to 21.6 mW. PCA-MPPT technique is proposed to harvest maximal power from thermoelectric g... View full abstract»

• Control Theory and Systems
• ### A Novel Approach to Reliable Control of Piecewise Affine Systems With Actuator Faults

Publication Year: 2017, Page(s):957 - 961
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This brief is devoted to the reliable piecewise affine (PWA) H∞ static output feedback control problem for PWA systems with actuator faults. The actuator faults are characterized by a Markov process. Specifically, by adopting a state-input augmentation technique, the original closed-loop system is first reformulated into a descriptor PWA system. On the basis of a piecewise-Markov... View full abstract»

• Digital Circuits and Systems and VLSI
• ### An Efficient Reverse Converter for the Three-Moduli Set ( $2^{n+1}-1, 2^{n}, 2^{n}-1$ )

Publication Year: 2017, Page(s):962 - 966
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The well-known three-moduli set (2n+1, 2n, 2n -1), where n is a positive integer, has received considerable attention over the last three decades. Many researchers have proposed residue-to-binary (reverse) converters for this moduli set. However, the problem of designing a reverse converter for the moduli set (2n+1 -1, 2n, 2n-1) did... View full abstract»

• ### Accurate Hardware-Efficient Logarithm Circuit

Publication Year: 2017, Page(s):967 - 971
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This brief presents a hardware-efficient logarithm circuit design based on a novel discontinuous piecewise linear approximation method. Hardware synthesis results targeted for a commercial application specific integrated circuit cell library and field-programmable gate array show the practicality of the proposed design. A new figure of merit that combines error, area, time, and power is introduced... View full abstract»

## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org