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Consumer Electronics, IEEE Transactions on

Issue 3 • Date Aug 1988

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Displaying Results 1 - 25 of 64
  • New multi-language computer controlled teletext decoders for 525 and 625 line systems

    Page(s): 780 - 787
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (568 KB)  

    A range of multilanguage teletext decoders are described that can cover much larger geographical areas than before. These are known as enhanced computer-controlled teletext (ECCT), and several variants are available for different geographical areas. A character read-only memory (ROM) with 192 high-resolution characters is included on-chip, together with a more flexible ROM addressing mechanism to take full advantage of the multilanguage capability. Some areas require more than one language to appear on the screen simultaneously, other areas have different technical requirements, for example, 625- or 525-line transmission. The design of the teletext decoder to accommodate these requirements is discussed, together with the associated transmission aspects. View full abstract»

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  • IC for automatic detection of a positive or negative vision modulation, picture carrier detection and video signal identification

    Page(s): 380 - 386
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (500 KB)  

    The design and construction of an integrated circuit that automatically detects the modulation sense (positive or negative) of received TV signals is described. The integrated circuit works with a multistandard intermediate frequency (IF) video demodulator and offers other functions such as an analog AFC (automotive frequency control) output; blocks tuning pulses delivered during up- or down-frequency searches when a picture carrier is detected in a range of +or-500 KHz to the (IF) picture carrier; and provides a video identification circuit for sound muting facilities. This circuit is intended to operate as part of multistandard TV IF equipment. View full abstract»

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  • An NTSC compatible wide screen television system with evolutionary extendibility

    Page(s): 460 - 468
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (764 KB)  

    A review is presented of the role of the inverse Nyquist filter in quadrature amplitude modulation (QAM) technology and an outline of studio and network issues of this system is given. For two of the problems concerned, i.e., (a) crosstalk caused by ghosting and (b) interference from conventional TV receivers, the authors propose a two-dimensional waveform equalizer, with processing in the time and frequency domain at a transmitter. The encoding and decoding for this wide-screen television system, and the evolutionary extendibility of QAM technology toward further improvement of image and sound quality in a compatible fashion are also discussed. View full abstract»

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  • Teletext equalizer LSI

    Page(s): 793 - 800
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (556 KB)  

    A large-scale integration (LSI) digital teletext equalizer chip is described that consists of a 13-tap adaptive equalizer and a data regeneration circuit. It achieves high-level performance such as wide equalization range (-0.5-1.5 mu s), short convergence time (1-3 s), good eye height improvement ratio, and high stability. The device greatly improves the teletext receivers performance and extends the service area to such locations where strong ghosts damage the teletext signal. This chip can be easily installed on a teletext decoder board because it does not need any external controller and is functionally independent from the other teletext data processing circuits. The chip can be used with the 525 line/60 Hz NTSC TV system and the 625 line/50 Hz PAL TV system. View full abstract»

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  • A practical IDTV system improving picture quality for nonstandard TV signals

    Page(s): 387 - 396
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (820 KB)  

    A practical improved-definition TV (IDTV) system is described that performs video component signal processing, automatic non-NTSC signal discrimination, and adaptively choosing between burst-locked and highly stable line-locked clocking. The system design is presented along with sample images highlighting its performance. View full abstract»

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  • A digital signal processor for digital audio use

    Page(s): 671 - 676
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    The authors describe the D2SP digital signal processor which is designed with a dual processor architecture, and is especially effective for stereo audio signal processing. The D2SP has two independent processor units, the left processor and right processor. The D2SP contains an audio data interface, external dynamic random-access memory (DRAM) interface, microcomputer interface, and a sequence controller. The single chip D2SP is capable of performing audio signal processing needed for graphic equalizers, surround, and sound power spectrum calculation. The dual processor mainly consists of a 24-bit multiplier with a 108-ns cycle time and is assembled on a single chip fabricated from 1.2- mu m CMOS technology. The total number of integrated transistors is approximately 300 K. Applications, such as use as a seven-band graphic equalizer, seven-band power spectrum calculator, and surround sound processing, are briefly discussed. View full abstract»

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  • A 16-bit multiflow concurrent processor for VTR control

    Page(s): 580 - 587
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (789 KB)  

    A processor architecture is presented that uses a multiconcurrent processing loop consisting of multiple central processing units and processing instructions in a master-slave type relationship. Using this architecture, a 16-bit CMOS concurrent processor and software were developed for controlling a videotape recorder (VTR). This single-chip system provides concurrent actuation of various motors and system control of the VTR. The processor IC is 5.6 mm by 6.8 mm, containing about 160000 digital and 1900 analog elements. It is configured as a 76-pin DIP (dual in-line package) with a typical power consumption of 120 mW. View full abstract»

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  • Single-chip BTSC multi-channel TV sound decoder

    Page(s): 620 - 624
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (441 KB)  

    A description is given of the design of a bipolar analog integrated circuit (IC) which contains the most important filters and all the stages for decoding the multichannel TV sound baseband signals according to the Broadcasting Television System Committee (BTSC) system specification. The IC decodes the composite baseband signal derived from a broadband 4.5 MHz FM demodulator. The baseband signal enters on the composite input, is level-adjusted and applied simultaneously to second audio program (SAP) and MPX decoders. In accordance with the listener's choice, either the demodulated dbx-encoded left-right (L-R) signal or the SAP signal can be switched to the internal dbx decoder. View full abstract»

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  • Personal computer-music system-song transcription and its application

    Page(s): 819 - 823
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB)  

    A description is given of an easy-to-use computer music system using a personal computer, which can transcribe a song into a music score and generate accompaniment to match the melody. The system consists of a 16 bit personal computer, an A/D (analog to digital) converter, a digital signal processor, a microphone, and a music synthesizer. The sounds of a song being sung or hummed are analyzed for pitch and strength. Then, the melody of the song is extracted using the computer's preprogrammed musical knowledge. After the transcription is completed, a chord progression is determined automatically and three-part accompaniment is generated on the rhythm pattern selected interactively. The melody and generated accompaniment are played together by musical synthesizer. View full abstract»

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  • A new camera-type color image scanner with a high speed scanning mechanism

    Page(s): 497 - 505
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (630 KB)  

    A description is given of a camera-type color image scanner with a fast scanning mechanism and novel image signal processing technology. Emphasis is on the characteristics of the linear actuator that provides random access to any position within 400 ms at 7 mu m accuracy to scan the designated region of the document quickly and the processing system that uses the subsampling circuit to designate and input a required region of the original document. View full abstract»

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  • A 0.5 MHz-0.9 MHz single-chip NMOS PLL LSI for frequency synthesizer

    Page(s): 660 - 666
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (527 KB)  

    A phase-locked loop (PLL) large-scale integration (LSI) chip operating in the broadcast frequency band from MF to UHF has been developed using an N-channel enhanced double diffusion (ED) MOS process technology with 0.8- mu m effective channel length. The operation of the PLL has been verified for frequencies from 0.2 MHz to 1200 MHz for a power-supply voltage of 5 V and an input signal amplitude of 100 mV RMS. The authors describe the N-channel ED MOS process technology that enables direct division of high-frequency signals up to the UHF band, and the high-speed circuit technology, functions, and special features of the circuit. View full abstract»

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  • BTSC TV multichannel sound decoder including digital expander

    Page(s): 634 - 641
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (497 KB)  

    A description is given of a system consisting of 2 ICs which digitally process most of the functions carried out by the main FM demodulator in a Broadcasting Television System Committee (BTSC) standard TV transmission. Emphasis is on the digital implementation of the expander circuit using a single instruction computer (SIC) digital signal processor (DSP) IC. The systems are essentially the same as in an analog expander, except for an equalizing bandpass and a gain alignment stage at the inputs of both the sum and the difference channel. View full abstract»

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  • Standard baseband (audio/video) interface IC

    Page(s): 801 - 806
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (430 KB)  

    The Television Receiver Committee of the EIA proposed a baseband interface standard, IS-15 for improving the compatibility between TV receivers and cable TV (CATV) decoder systems. The advantage of using this standard is the ability to integrate tuning, intermediate frequency, and remote control systems for both TV and CATV applications. As a result, the RF converter can be eliminated and descrambling can be achieved in the baseband. A description is given of an interface IC which can meet the EIA IS-15 standard. The interface IC is used between the picture intermediate frequency/sound intermediate frequency chip and a 20-pin connector. Its function is to process the baseband video signals, audio signals, and control signals which are based on the IS-15 standard. Use of this IC reduces the number of components and cost of producing cable-TV-compatible TV sets. View full abstract»

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  • A field store system with single 1-Mbit field memory

    Page(s): 397 - 401
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    A field store system that stores 6-b NTSC video signals sampled at three times the scanning frequency (3 fsc) was developed using a single 1-Mb field memory is reported. The system uses four ICs: the single field memory, a controller, an analog-to-digital converter, and a digital-to-analog converter. The analog composite video signal is converted to 6-b digital with fsc sampling by the analog-to-digital converter (ADC). Because the configuration used for the field memory is 4-b-wide*256 K words, a 6-4 converter converts 4-bit data read from the field memory to 6-b data for the digital-to-analog converter (DAC). The 6-b DAC converts the signal back to analog. The write/read access rate for the memory is 1.5 times faster than the ADC and DAC conversion rate. Special picture effects such as still, strobe, and search can be realized even from a video disk recorded in the constant linear velocity mode. View full abstract»

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  • Conformance test concept for the Home Bus System

    Page(s): 700 - 704
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (391 KB)  

    Conformance testing for the Home Bus System (HBS) was studied with regard to the extent of its appropriateness based on the Open System Interconnection (OSI) model. The objectives of the conformance test were: to inspect hardware and software to avoid interference with each other, and to ensure quality for the consumer. The authors consider each evaluation test item, classified into transmission system evaluation and terminal system evaluation that is related to either transmission media of channels. The former relate to transmission system characteristics composed of impedance, VSWR, lossless and wave transmission characteristics in regard to both the system and its elements. The first half (OSI Layer 1, 2) of the conformance test procedure has been determined and performed with good results. View full abstract»

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  • Customization of a DSP integrated circuit for a consumer product

    Page(s): 677 - 685
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (628 KB)  

    The design of a toy doll's speech recognition and response circuitry is summarized. The digital signal processing (DSP) system used as the core of this audio processing circuitry is discussed. Hardware used and the basic DSP architecture for the audio processing are reviewed. Two systems considered (DSP with codec and custom DSP chip) are briefly outlined. The speech processing, synthesis, and recognition technologies needed for this toy are detailed. Several DSP algorithms for use with this system are reviewed. View full abstract»

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  • Development of a VTR video signal processing IC

    Page(s): 434 - 442
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (650 KB)  

    A description is given of a video signal processing two-chip set for VHS-format video cassette recorders (VCRs) that is suitable for use with HQ (high-quality) VCR systems. The set consists of a luminance IC having 30 pins and a chrominance IC in a 24-pin package. The design of each subsystem comprising the chrominance and luminance circuitry is discussed. View full abstract»

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  • A new TV receiver

    Page(s): 807 - 813
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (580 KB)  

    A TV chassis is described which uses a digitally controlled bus and nine large-scale integration chips (six bipolar, three CMOS) that allow easy factory calibration or alteration of the receiver's characteristics. View full abstract»

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  • High performance VTR based on the S-VHS format

    Page(s): 560 - 565
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (500 KB)  

    A brief overview is presented of the S-VHS videotape recorder (VTR) format. This format features horizontal resolution of about 420 lines, surpassing the performance of previously available household VTRs. FM frequency allocation for the S-VHS format is 5.4 MHz at the synchronizing signal peak to 7.0 MHz at the white peak; the carrier frequency is 2.6 MHz at the white peak level. The frequency deviation has been expanded from the 1.0 MHz of conventional VHS to 1.6 MHz. The authors discuss the resulting picture-quality improvement due to the higher carrier frequency used (2.6 MHz) along with the circuitry and the separate Y/C (luminance and chrominance) inputs and outputs used with this format. View full abstract»

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  • Improving TV picture quality with linear-median type operations

    Page(s): 373 - 379
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (845 KB)  

    The FMH filter concept for video signal processing which combines the features of linear and median filters is introduced. In FMH (FIR median hybrid) filters, the overall output is the median calculated over the outputs of FIR subfilters, and the central input sample, the number of values to be sorted, is independent of the filter size; only the size of the FIR subfilters is altered. The noise reduction properties of FMH filters are similar to those of median filters. Applications within the field of digital enhanced TV, EDTV, and HDTV are presented with emphasis on noise suppression and image coding. View full abstract»

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  • Low cost monochrome solid state camera for consumer applications

    Page(s): 493 - 496
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (373 KB)  

    A simple monochrome charge-coupled device (CCD) camera was designed using a standard solid-state image sensor. For applications which do not need very high resolution a special signal-processing circuit is proposed that utilizes only the low-frequency components of the CCD-sensor's output signal. This allows the use of sensors with reduced picture quality on ones with minor defects. A camera that uses this special combining network and an additional lowpass filter was designed and tested. Sensors with defects, which can not be used in standard applications, were tested. The tests demonstrated, that the influence of minor defects is low enough to fulfil the requirements of many consumer applications. View full abstract»

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  • Experiments on enhanced TV system compatible with NTSC

    Page(s): 452 - 459
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (815 KB)  

    An overview is given of the Nippon Television Network (NTV) proposal for an enhanced-definition TV (EDTV) system for Japan. The proposed system is compatible with the current NTSC standard. Possible enhancements considered include better horizontal and vertical luminance resolution, chrominance resolution, rejection of cross-color and cross-luminance interference, better signal-to-noise ratio, and improved sharpness. View full abstract»

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  • New video signal-processing LSIs for 8 mm VCRs

    Page(s): 543 - 551
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (611 KB)  

    A fully integrated bipolar large-scale integration (LSI) signal processing system is described. The system is composed of a single-chip Y/C signal processor, a multifunction charge-coupled device (CCD) comb filter a head amplifier with active equalizers, and a PAL signal processor. About 8800 elements are integrated in the single-chip Y/C signal processor which takes the place of 5 ICs in a conventional video cassette recorder (VCR) system. The design and characteristics of the subsystems are each briefly discussed. View full abstract»

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  • Recording paper handling apparatus for a high definition video full color printer

    Page(s): 530 - 535
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (440 KB)  

    A full-color video printer was developed that provides good picture quality, and uses sublimate dye thermal transfer printing technology. The prints have 8-dots/mm-high resolution with a high gradation of 64 different levels. As the size of the paper used is increased, the diameter of the drum must also be enlarged, increasing the volume and the cost of the equipment. To solve this problem, a small platen roller mechanism that handles the recording paper by friction was developed. The authors described the methods used to reduce the roller's positioning error and increase the picture quality. View full abstract»

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  • A complete set of key components for compact disc interactive applications

    Page(s): 835 - 837
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (390 KB)  

    CMOS integrated circuit designs for interactive video disk applications are reported. The system considered consists of three main parts: data processing, video processing and the sound and disk processing parts. Each integrated-circuit component is discussed. The chip set is designed for low-cost interactive stations, both for professional domain (workstations) and consumer applications, like the compact-disk interactive (CDI) system. View full abstract»

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Aims & Scope

The primary purpose for publishing the Transactions of the Consumer Electronics Society is to present to the membership and the engineering community in general, papers on new technology oriented to Consumer Electronics.

 

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Meet Our Editors

Editor-in-Chief
R. Simon Sherratt
School Director for Teaching and Learning, School of Systems Engineering
The University of Reading
Reading, Berkshire  RG6 6AY  RG6 6AY  U.K.
r.s.sherratt@reading.ac.uk; sherratt@ieee.org
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