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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Issue 12 • Date Dec 1994

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Displaying Results 1 - 25 of 27
  • Class E resonant rectifier with a series capacitor

    Page(s): 885 - 890
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    An analysis and experimental results are given for a Class E resonant low dv/dt rectifier with a series resonant capacitor. The circuit contains two resonant components: a capacitor and an inductor. It is driven by a sinusoidal voltage source whose amplitude must be controlled to obtain a constant-voltage output. The rectifier exhibits a peculiar behavior because its equivalent input reactance changes discontinuously from inductive to capacitive when the load varies from infinity to zero. Design equations are derived using Fourier series techniques. The theory is compared with experimental results obtained for the rectifier operating at 1 MHz ac input and 5 V dc output View full abstract»

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  • On the stability of a segment of polynomials

    Page(s): 898 - 901
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    Given two stable polynomials of the same degree, we derive a set of necessary and sufficient conditions, in the frequency domain, under which the line segment joining the two given polynomials is stable View full abstract»

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  • VLSI array synthesis for polynomial GCD computation and application to finite field division

    Page(s): 891 - 897
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    Many practical algorithms have dynamic (or data-dependent) dependency structure in their computation, which is not desirable for VLSI hardware implementation. Polynomial GCD computation by Euclid's algorithm is a typical example of dynamic dependency. In this paper, we use an algorithmic transformation technique to derive static (or data-independent) dependencies for Euclid's GCD algorithm. The resulting algorithm is mapped to a linear systolic array which is area-efficient and achieves maximum throughput with pipelining. It has m0+n 0+1 processing elements, where m0 and n0 are degrees of two polynomials. We have applied the technique to the extended GCD algorithm and developed a systolic finite field divider, which can be efficiently used in decoding a variety of error correcting codes View full abstract»

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  • Even-degree lower-sideband polylithic crystal filters

    Page(s): 777 - 781
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    This paper describes a method of designing even-degree lower-sideband polylithic crystal filters which have stop-band characteristic similar to even-degree elliptic-function filters. The asymmetrical filter is obtained by adding a bridge capacitor across each of the dual-resonator monolithic crystal filter elements of a symmetrical Chebyshev function polylithic crystal filters View full abstract»

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  • The use of parasitic nonlinear capacitors in class E amplifiers

    Page(s): 941 - 944
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    The most common class E amplifier configuration uses a single transistor with a shunt capacitor and a series resonant output filter. Until now a linear shunt capacitance has been assumed. However, to achieve operation at 900 MHz and above, it is of interest to rely solely upon the nonlinear parasitic collector-substrate capacitance of the transistor. An analytical theory for operation at 50% duty cycle and nonlinear capacitance is presented in this correspondence, and the effects on the power capability of the amplifier are discussed View full abstract»

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  • Implementation of Chua's circuit with a cubic nonlinearity

    Page(s): 934 - 941
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    This paper reports an implementation of Chua's circuit with a smooth nonlinearity, described by a cubic polynomial. Some bifurcation phenomena and chaotic attractors observed experimentally from the laboratory model and simulated by computer for the model are also presented. Comparing both the observations and simulations, the results are satisfactory View full abstract»

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  • A four-dimensional plus hysteresis chaos generator

    Page(s): 782 - 789
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    This paper discusses a four-dimensional plus hysteresis autonomous chaotic circuit. The circuit dynamics are described by two symmetric four-dimensional linear equations connected to each other by hysteresis switchings. We transform the equation into Jordan form and derive theoretical formulas of its three-dimensional return map, its Jacobian matrix and its Jacobian. These formulas can be developed easily to general dimensional cases and are used to evaluate Lyapunov exponents. Also we have discovered a torus doubling route to chaos and then to hyperchaos. Some of the return map attractors are confirmed by laboratory experiments. A rough two parameters bifurcation diagram is also given View full abstract»

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  • Stable and efficient neural network modeling of discrete-time multichannel signals

    Page(s): 829 - 840
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    This paper presents a neural-network-based recursive modeling scheme that constructs a nonlinear dynamical model for a discrete-time multichannel signal. Using the so-called radial-basis-function (RBF) neural network as a generic nonlinear model structure and the ideas developed in the classical adaptive control theory, we have been able to derive a stable and efficient weight updating algorithm that guarantees the convergence for both the prediction error and the weight error. A griding method based on the spatial Fourier analysis has been modified and applied for setting up the RBF neural, net structure. Simulation analysis is also carried out to highlight the practical considerations in using the scheme View full abstract»

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  • Current feedback amplifier based sinusoidal oscillators

    Page(s): 906 - 908
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    This paper illustrates the use of a new class of amplifiers known as current feedback amplifiers as the active devices in sinusoidal oscillators. From theoretical analysis, supported by experiments, it is concluded that they offer improved performance regarding their opamp-based counterparts in terms of frequency accuracy, dynamic range, distortion level, and frequency span. At the same time they seem to be more flexible for the inclusion of automatic gain control schemes View full abstract»

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  • An algorithm for training multilayer perceptrons for data classification and function interpolation

    Page(s): 866 - 875
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    This paper addresses the issue of employing a parametric class of nonlinear models to describe nonlinear systems. This model class consists of a subclass of artificial neural networks, multilayer perceptrons. Specifically, we discuss the application of a “globally” convergent optimization scheme to the training of the multilayer perceptron. The algorithm discussed is termed the conjugate gradients-trust regions algorithm (CGTR) and combines the merits of two well known “global” algorithms-the conjugate gradients and the trust region algorithms. In this paper we investigate the potential of the multilayer perceptron, trained using the CGTR algorithm, towards function approximation in two diverse scenarios: i) signal classification in a multiuser communication system, and ii) approximating the inverse kinematics of a robotic manipulator. Until recently, the most widely used training algorithm has been the backpropagation algorithm, which is based on the linearly convergent steepest descent algorithm. It is seen that the multilayer perceptron trained with the CGTR algorithm is able to approximate the desired functions to a greater accuracy than when trained using backpropagation. Specifically, in the case of the multiuser communication problem, we obtain lower probabilities of error in demodulating a given user's signal; and in the robotics problem, we observe lower root mean square errors in approximating the inverse kinematics function View full abstract»

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  • On fundamental bifurcations from a hysteresis hyperchaos generator

    Page(s): 876 - 884
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    In this paper we discuss a four-dimensional autonomous circuit which includes one hysteresis element. This circuit is governed by two symmetric three dimensional linear equations which are connected to each other by hysteresis switchings. Then we can derive the two-dimensional return map and show the following novel results: 1) Fundamental bifurcation diagram from periodic attractor to hyperchaos. It includes coexistence of torus and periodic attractor; 2) two-parameters bifurcation diagram. It exhibits some regularities for the onset of some periodic attractors and tori; 3) laboratory measurements of the return map attractors; 4) a sufficient condition for the existence of attractors View full abstract»

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  • Approximate identity neural networks for analog synthesis of nonlinear dynamical systems

    Page(s): 841 - 858
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    Analog computation seems to be not highly versatile when compared with its digital counterpart. This is mainly due to the fact that, with the exception of the linear case, no sufficiently general methods exist at present for the processing of electrical signals using analog systems, nonlinear dynamical systems of the kind described by ordinary differential equations are quite general since they embody a large class of problems. Thus, synthesis of such systems plays a central role in this context. The aim of this paper is to present an approach to the analog synthesis, based on the approximate identity neural networks (a class of neural networks recently proposed). The method is fairly general since it can be applied to a large category of nonlinear systems. Some examples of dynamical systems developed using conventional analog circuitry show the feasibility of the approach and the usefulness for the experimental evidence of many interesting effects such as subharmonic oscillations and chaotic behavior View full abstract»

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  • Coupled noise analysis for adjacent vias in multilayered digital circuits

    Page(s): 796 - 804
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    The electromagnetic coupling between two adjacent vias in a multilayered integrated circuit is analyzed by means of equivalent magnetic frill array models incorporated with the even- and odd-mode approach. Closed-form expressions for the coupled noise on the passive via are derived. The coupling responses in the frequency domain and crosstalk waveforms in the time domain for some multilayered via structures are calculated based on these formulas. A 4-layer experimental model is constructed and measurements are taken for the transmission, reflection, and coupling responses. The measurements show good agreement with the calculated results over a frequency range of up to 18 GHz View full abstract»

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  • DC small signal symbolic analysis of large analog integrated circuits

    Page(s): 817 - 828
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    This paper presents a new methodology and its implementation (AnalogSifter) for DC small signal fully symbolic analysis of large analog integrated circuits. Our new sifting approach consists of six algorithms designed to relax the circuit size limitation of previously known methods. We show fully symbolic analysis results for much larger circuits than have ever been reported. Very compact symbolic expressions for the DC small signal voltage gains of the 741 and 725 operational amplifiers were obtained in less than 40 CPU seconds on a SUN SPARCstation 2, and the simplified results were numerically within 12% of the exact values. The output is expressed in terms of products of sums which can give the user insight into the behavior of the circuit. The overall time complexity is superquadratic with respect to the number of nodes. The implementation can output simplified symbolic expressions for any desired DC small signal transfer function, including input resistances, output resistances, as well as current and voltage gains. It also provides simplified symbolic expressions for noise analysis, sensitivity analysis, and power supply rejection ratio View full abstract»

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  • An analysis of mode-locked arrays of automatic level control oscillators

    Page(s): 859 - 865
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    The locking region for beat frequency entrained, or mode-locked arrays of discrete microwave oscillators, is exceedingly small, which presents great difficulty in array design. This paper shows that introducing a time-delayed gain control loop can enhance the entrainment region and that this region is maximized for a coupling phase of 90 degrees. For this value of coupling phase the location, size, shape, and orientation of the stable mode locking region is derived for arrays of arbitrary size. A study of the dependence of the stable mode locking region on the number of array elements shows that the region becomes highly eccentric as the number increases, thus making array tuning difficult and causing high sensitivity to particular oscillator tuning errors. The analysis is confirmed with a low frequency realization of a three-element array View full abstract»

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  • A singular value decomposition approach to detect chaos in nonlinear circuits and dynamic systems

    Page(s): 908 - 912
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    In this paper the analogy between Lyapunov exponents and the singular values of the covariance matrix is introduced and two new conjectures are stated. On this basis a new numerical procedure to classify the steady-state behavior of nonlinear dynamic systems from noisy time series data is presented. In order to show the suitability of the proposed approach, several applications to time series data gathered from measurements on experimental circuits are reported View full abstract»

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  • A new circuit for maximum value determination

    Page(s): 929 - 930
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    A new circuit for the determination of the maximum of n binary numbers is presented. The proposed circuit consists of fewer gates when compared to a circuit recently reported. A simple method of testing the proposed circuit is also presented View full abstract»

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  • Electronic component model minimization based on log simulated annealing

    Page(s): 790 - 795
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    A new systematic methodology is proposed in order to extract a simplified yet accurate equivalent schematic from S parameter measurements of electronic devices throughout a given frequency range. In this approach the two following successive processes are iteratively performed: a model parameter extraction and a model topology simplification. Thus the extraction problem must be solved automatically and iteratively without any foresight of magnitude orders for the model parameters. To prevent the process from being trapped into any local optimum, an optimization algorithm that combines the principles of simulated annealing and a specific logarithmic exploration has been developed. This algorithm, called “log simulated annealing” (LSA), allows handling of continuously valued variables within arbitrary large exploration domains. Furthermore, the method described in this paper requires a tight coupling between optimization and simulation. Therefore it was tested using a specifically developed linear circuit simulator View full abstract»

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  • A class of recursive interconnection networks: architectural characteristics and hardware cost

    Page(s): 805 - 816
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    We propose and analyze a new class of interconnection networks, RCC, for interconnecting the processors of a general purpose parallel computer system. The RCC is constructed incrementally through the recursive application of a complete graph compound. The RCC integrate positive features of both complete networks and a given basic network. This paper presents the principles of constructing RCC and analyzes its architectural characteristics, its message routing capability, and its hardware cost. A specific instance of this class, RCC-CUBE, is shown to have desirable network properties such as small diameter, small degree, high density, high bandwidth, and high fault tolerance and is shown that they compare favorably to those of the hypercube, the 2-D, mesh, and the folded hypercube. Moreover, RCC-CUBE is shown to emulate the hypercube in constant time under any message distribution. The hardware cost and physical time performance are estimated under some packaging constraints for RCC-CUBE and compared to those of the hypercube, the folded hypercube, and the 2-D mesh demonstrating an overall cost effectiveness for RCC-CUBE. Hence, the RCC-CUBE appears to be a good candidate for next generation massively parallel computer systems View full abstract»

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  • Reducing computations in SPICE with node-reduced multiterminal representations of semiconductor devices

    Page(s): 902 - 905
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    Multiterminal representation (MTR) of a subsystem constitutes the central concept in the analysis of a large-scale physical system through its subsystems. A new nodal reduction technique is developed to further reduce the number of nodes in a nodal-admittance MTR. The results of the implementation of MTR's in the circuit simulator SPICE show that the nodal-reduced MTR achieves an improvement in processing time while maintaining the same simulation accuracy View full abstract»

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  • Explicit piecewise-linear models

    Page(s): 931 - 933
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    A proper explicit model of piecewise-linear (PWL) functions is a problem under current investigation in the research area of nonlinear systems. In this correspondence this problem is considered from a fundamental scheme. Based on this scheme, two explicit models are derived for all continuous PWL functions. The proposed models are suitable for a network implementation and can be used in applications, e.g., neural networks or nonlinear signal processing View full abstract»

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  • Fast conversion techniques for binary-residue number systems

    Page(s): 927 - 929
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    An easy and efficient procedure for converting a binary number into a residue number on moduli 2n-1, 2n, 2 n+1 is presented. The procedure presented reveals an inversion technique. The paper also includes a systematic method to compare the magnitudes of two residue numbers on the above moduli. The conversion procedure does not depend on Chinese remainder theorem View full abstract»

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  • Insensitive current mode realization of third-order Butterworth characteristics using current conveyors

    Page(s): 925 - 927
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    An active-RC realization scheme of a third-order Butterworth function in the current mode, using the second-generation current conveyor (CC II) active elements and with all equal-valued passive components, is proposed. With nonideal CC II's, some of the coefficients of the function are altered owing to the finite port current and voltage tracking errors of the device. The network parameters are practically insensitive to the device errors View full abstract»

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  • High input impedance insensitive second-order filters implemented from current conveyors

    Page(s): 918 - 921
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    Two high input impedance second-order filters with active and passive sensitivities inferior or equal to the unit are described. Both of them use two second generation current conveyors, with positive current transfer (CCII+) and four passive components. The first circuit achieves a low-pass or high-pass transfer according to the kind of passive components used. The second circuit achieves a band-pass transfer. SPICE simulation results using translinear current conveyors are given and discussed. They confirm the validity of the analysis and they point out the high performances of these filters. Experimental results obtained with the AD844 AN transimpedance operational amplifier show the advantage of these implementations compared to conventional ones View full abstract»

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  • Bidirectional current-controlled PTAT current source

    Page(s): 922 - 925
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    In this paper a new current-source proportional to absolute temperature (PTAT) is introduced. It is adjustable and does not require any starting current. The circuit is obtained from a mixed translinear loop of only four transistors. A first generation current conveyor is added in order to obtain a floating output current. Its sign and its slope can both be modified from the value of the control current I1 . SPICE simulation results are given, They indicate that the circuit compares favorably with conventional PTAT current sources. Experimental results, which prove to be in agreement with the theory, are also given View full abstract»

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