# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 25 of 27

Publication Year: 2017, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—II:Express Briefs publication information

Publication Year: 2017, Page(s): C2
| PDF (92 KB)
• Analog and Mixed Mode Circuits and Systems
• ### A Fully Integrated Multistage Cross-Coupled Voltage Multiplier With No Reversion Power Loss in a Standard CMOS Process

Publication Year: 2017, Page(s):737 - 741
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This brief presents a fully integrated cross-coupled voltage multiplier for boosting dc-to-dc converter applications. The proposed design applies a new structure of cross-coupled voltage doubler (CCVD) and a clock scheme that eliminates all of the reversion power loss and increases the power efficiency (PE). In addition, this design is scalable to multiple-stage voltage doubler (voltage multiplier... View full abstract»

• ### Bandpass Class-F Power Amplifier Based on Multifunction Hybrid Cavity–Microstrip Filter

Publication Year: 2017, Page(s):742 - 746
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This brief presents a filter-integrated high-efficiency class-F power amplifier (PA). The hybrid cavity-microstrip filtering circuit is employed not only to realize output impedance matching and the third-harmonic manipulation but also to provide high-selectivity bandpass responses. To fulfill the requirements of high-efficiency class-F PAs, cavity resonators and microstrip feeding structures are ... View full abstract»

• ### Delta–Sigma Encoder for Low-Power Wireless Bio-Sensors Using Ultrawideband Impulse Radio

Publication Year: 2017, Page(s):747 - 751
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This brief presents a systematic method to reduce the power consumption of a wireless sensor node for sensing biomedical signals. The design combines the delta-sigma modulator (DSM), the ultrawideband impulse radio (UWB-IR), and the proposed xnor-delay-based encoder/decoder, which replaces the decimation filter. The encoder and decoder for both the first- and second-order DSMs are presented. The c... View full abstract»

• ### A 58-ppm/°C 40-nW BGR at Supply From 0.5 V for Energy Harvesting IoT Devices

Publication Year: 2017, Page(s):752 - 756
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This brief presents a 40-nW 0.5-V supply voltage and 0.24-V output reference for an energy harvester. The emitter-base voltage of a PNP transistor is divided by the presented switch capacitor circuit to obtain the low output reference. The resistorless proportional-to-absolute-temperature circuit and the low-voltage high-power-supply-rejection-ratio current source are used to improve the accuracy ... View full abstract»

• ### On Frequency Detection Capability of Full-Rate Linear and Binary Phase Detectors

Publication Year: 2017, Page(s):757 - 761
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Until now, it has been known that the full-rate linear and binary phase detectors (PDs) cannot detect the frequency difference between the received data and the recovered clock in clock and data recovery (CDR) loops. In this brief, we study the frequency characteristics of the full-rate linear and binary PDs and show that, unlike the binary PD, the linear PD has not only phase detection capability... View full abstract»

• ### A Precision Pseudo Resistor Bias Scheme for the Design of Very Large Time Constant Filters

Publication Year: 2017, Page(s):762 - 766
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In this brief, a novel pseudo resistor bias scheme capable of achieving improved performances against process parameter variations is presented. The use of a matched structure allows for achieving a simulated statistical variation σ/μ one order of magnitude better than conventional bias schemes proposed in the literature. The entire circuit was designed to be able to emulate a tunabl... View full abstract»

• ### Memristive Model for Synaptic Circuits

Publication Year: 2017, Page(s):767 - 771
Cited by:  Papers (1)
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As a promising alternative for next-generation memory, memristors provide several useful features such as high density, nonvolatility, low power, and good scalability as compared with conventional CMOS-based memories. In this brief, a voltage-controlled threshold memristive model is proposed, which is based on experimental data of memristive devices. Moreover, the model is more suitable for the de... View full abstract»

• Circuits and Systems for Communications
• ### On Die Bit Error Rate Estimator for NAND Flash Memory

Publication Year: 2017, Page(s):772 - 776
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In this brief, we propose a simple bit error rate (BER) estimator utilizing the parity check constraints of a low-density parity-check code-based error correction coding (ECC) scheme. The proposed estimator can be efficiently implemented on flash memory die with a very small area cost. We articulate applications in which flash memory controllers can take advantage of having the BER estimate before... View full abstract»

• ### Modeling the Impact of Phase Noise on the Performance of Crystal-Free Radios

Publication Year: 2017, Page(s):777 - 781
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We propose a crystal-free radio receiver exploiting a free-running oscillator as a local oscillator (LO) while simultaneously satisfying the 1% packet error rate (PER) specification of the IEEE 802.15.4 standard. This results in significant power savings for wireless communication in millimeter-scale microsystems targeting Internet of Things applications. A discrete time simulation method is prese... View full abstract»

• ### Immediate Neighborhood Temperature Adaptive Routing for Dynamically Throttled 3-D Networks-on-Chip

Publication Year: 2017, Page(s):782 - 786
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In this brief, we present the immediate neighborhood temperature (INT) routing algorithm, which balances thermal profiles across dynamically throttled 3-D networks-on-chip by adaptively routing interconnect traffic based on runtime temperature monitoring. INT avoids the overheads of system-wide temperature monitoring by relying on the heat transfer characteristics of 3-D integrated circuits that e... View full abstract»

• Computer Aided Design and Electronic Design Automation
• ### Accurate Estimation of CMOS Power Consumption Considering Glitches by Using Waveform Lookup

Publication Year: 2017, Page(s):787 - 791
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Gate-level power estimation methodologies are often considered as a sign-off level reference for digital circuit design. Nevertheless, when gate delays and related effects like glitches are taken into account, commercial state-of-the-art gate-level power estimators show surprisingly large estimation errors. Following an analysis of factors causing these inaccuracies, a novel gate-level power estim... View full abstract»

• Power Systems and Electronic Circuits
• ### Load Disaggregation Based on Aided Linear Integer Programming

Publication Year: 2017, Page(s):792 - 796
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Load disaggregation based on aided linear integer programming (ALIP) is proposed. We start with a conventional linear integer programming (IP)-based disaggregation and enhance it in several ways. The enhancements include additional constraints, correction based on a state diagram, median filtering, and linear-programming-based refinement. With the aid of these enhancements, the performance of IP-b... View full abstract»

• ### A 7-MHz Integrated Peak-Current-Mode Buck Regulator With a Charge-Recycling Technique

Publication Year: 2017, Page(s):797 - 801
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A 7-MHz integrated peak-current-mode buck regulator with a charge-recycling technique and a fast response current-sensing circuit is proposed. The proposed charge-recycling technique contributes to the improvement of the light load efficiency by up to 1.7% for the proposed buck regulator. Moreover, the proposed buck regulator achieves a fast response time of less than 10 ns with a fast response cu... View full abstract»

• Control Theory and Systems
• ### $H_\infty$ Relay Tracking Control of Multiagent Systems With the Assistance of a Voronoi Diagram

Publication Year: 2017, Page(s):802 - 806
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This brief is devoted to investigating the H∞ relay tracking control problem of a group of agents in a monitoring region. In order to solve such a problem, we partition the monitoring region into several “tracking zones” based on a Voronoi diagram. Then, we propose a novel impulsive model to describe this relay tracking problem, and define the H∞ p... View full abstract»

• ### Digital Event-Based Control for Nonlinear Systems Without the Limit of ISS

Publication Year: 2017, Page(s):807 - 811
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In this brief, the problem of event-triggered control (ETC) for nonlinear systems is considered. By using the perturbation theorem, event-triggering mechanisms (ETMs), not based on the framework of input to state stable, are proposed for a class of nonlinear systems with suitable exponentially converging threshold signals. Under mild conditions, the Zeno behavior of the ETC systems is excluded. Mo... View full abstract»

• Digital Circuits and Systems and VLSI
• ### $2\times\text{VDD}$ 40-nm CMOS Output Buffer With Slew Rate Self-Adjustment Using Leakage Compensation

Publication Year: 2017, Page(s):812 - 816
| | PDF (1412 KB)

A 2 × VDD output buffer for 40-nm complementary metal-oxide-semiconductor technology nodes is proposed in this investigation featured with a slew rate (SR) auto-adjusted by process, voltage, temperature, and leakage (PVTL) detection and, particularly, the leakage compensation mechanism. The output driving current is boosted by turning on extra charging paths and discharging paths when the S... View full abstract»

• ### A Reduced-Bias Approach With a Lightweight Hard-Multiple Generator to Design a Radix-8 Modulo $2^{n} + 1$ Multiplier

Publication Year: 2017, Page(s):817 - 821
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The modulo 2n + 1 multiplier is the bottleneck of a wide range of applications from residue number system arithmetic to cryptography. Recently, with demand for low-power and energy-efficient designs, the radix-8 Booth recoding has been considered to derive modulo 2n + 1 multipliers. This brief presents two novel methods to increase the performance and improve the efficiency o... View full abstract»

• ### On Diagnosing the Aging Level of Automotive Semiconductor Devices

Publication Year: 2017, Page(s):822 - 826
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Semiconductor aging is a serious threat to the reliability of a system. We address the aging level of semiconductor components by describing the degree of semiconductor aging under certain operating conditions, including voltage, frequency, temperature, and usage rate. Aging level information can be used to follow the real aging rate of a device, predict the remaining life, and control the device ... View full abstract»

• ### Physically Unclonable Function Using an Initial Waveform of Ring Oscillators

Publication Year: 2017, Page(s):827 - 831
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A silicon physically unclonable function (PUF) is considered to be one of the key security system solutions for local devices in an era in which the Internet is pervasive. Among many proposals, a PUF using ring oscillators (RO-PUF) has the advantage of easy application to a field-programmable gate array (FPGA). In the conventional RO-PUF, the frequency difference between two ROs is used as one bit... View full abstract»

• Nonlinear Circuits and Systems
• ### Digital Multiplierless Realization of a Calcium-Based Plasticity Model

Publication Year: 2017, Page(s):832 - 836
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Calcium is a highly widespread and versatile intracellular ion that can control a wide range of temporal dynamics in the brain such as synaptic plasticity. This brief presents a novel and efficient digital circuit for implementing a calcium-based plasticity model aimed at reproducing relevant biological dynamics. Accordingly, we investigate the feasibility of the proposed model in a minimal neural... View full abstract»

• ### Continuous Class-B/J Power Amplifier Using a Nonlinear Embedding Technique

Publication Year: 2017, Page(s):837 - 841
Cited by:  Papers (1)
| | PDF (1150 KB)

This brief explores the design space for realizable solution of a broadband class-B/J continuous mode of power amplifier (PA). The PA is initially designed at the current-source reference plane with the correct voltage and current waveforms. The intrinsic impedances are then projected to the package reference plane using the model-based nonlinear-embedding technique. An insight is provided into en... View full abstract»

• Signal Processing
• ### A Variable Step-Size Normalized Subband Adaptive Filter With a Step-Size Scaler Against Impulsive Measurement Noise

Publication Year: 2017, Page(s):842 - 846
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This brief introduces a variable step-size (VSS) normalized subband adaptive filter (NSAF) using a step-size scaler to improve the robustness against impulsive measurement noise. When impulsive measurement noise appears, the step size of the proposed VSS NSAF is scaled down by the step-size scaler, which is suitable for application in the NSAF. This removes a possibility of updating weight estimat... View full abstract»

• ### Real-Time Mitigation of Short-Range Leakage in Automotive FMCW Radar Transceivers

Publication Year: 2017, Page(s):847 - 851
| | PDF (723 KB) | HTML

Frequency-modulated continuous wave radar systems suffer from permanent leakage of the transmit signal into the receive path. Besides leakage within the radar device itself, an unwanted object placed in front of the antennas causes so-called short-range (SR) leakage. In an automotive application, for instance, it originates from signal reflections of the car's own bumper. Particularly the residual... View full abstract»

## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org