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# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 25 of 31

Publication Year: 2017, Page(s):C1 - C4
| PDF (47 KB)
• ### IEEE Transactions on Circuits and Systems—II:Express Briefs publication information

Publication Year: 2017, Page(s): C2
| PDF (65 KB)
• Analog and Mixed Mode Circuits and Systems
• ### High-Efficiency Millimeter-Wave Energy-Harvesting Systems With Milliwatt-Level Output Power

Publication Year: 2017, Page(s):605 - 609
| | PDF (1251 KB) | HTML

The output power level and the power conversion efficiency (PCE) rate of the energy-harvesting systems are vital factors in realizing effective millimeter-wave wireless power transfer solutions that can power battery-less and charge coil-free smart everyday objects. Two 60-GHz energy harvesters that use a tuned complementary cross-coupled oscillator-like rectifying circuitry in 40-nm digital CMOS ... View full abstract»

• ### PPV Modeling of Memristor-Based Oscillators and Application to ONN Pattern Recognition

Publication Year: 2017, Page(s):610 - 614
Cited by:  Papers (1)
| | PDF (925 KB) | HTML

An efficient perturbation projection vector (PPV) modeling for a memristor-based oscillator is proposed and then applied to the simulation of the oscillatory neural network (ONN) for pattern recognition. Compared with the existing model, which is very time consuming, this novel modeling method features a fast and accurate simulation of a large-scale network with many oscillators. The proposed mode... View full abstract»

• ### A Self-Resonant Two-Coil Wireless Power Transfer System Using Open Bifilar Coils

Publication Year: 2017, Page(s):615 - 619
| | PDF (544 KB) | HTML

Usually, self-resonant coils are restricted to use on the intermediary circuits of multiple-coil wireless power transfer (WPT) systems. This is because a source sees a parallel resonance when connected to a typical coil at self-resonance, and parallel associations in the primary and secondary sides of a two-coil system are not as practical as the respective series associations. However, many appli... View full abstract»

• ### High-Resolution Time-Interleaved Eight-Channel ADC for Li-Ion Battery Stacks

Publication Year: 2017, Page(s):620 - 624
| | PDF (1610 KB) | HTML

An analog-to-digital converter (ADC) for monitoring the voltages of a stack of eight Li-ion batteries is presented. The converted voltage range for each battery is 3-4.2 V with a maximum nominal input voltage of 33.6 V. High-voltage (HV) switches and a single HV capacitor make up the HV track and hold. The remaining part of the circuit operates at a nominal 5-V supply. An interleaved extended-rang... View full abstract»

• ### An Adaptive Blind Frequency-Response Mismatches Calibration Method for Four-Channel TIADCs Based on Channel Swapping

Publication Year: 2017, Page(s):625 - 629
| | PDF (2901 KB)

This brief proposes a novel adaptive blind calibration method to compensate for the frequency-response mismatches in four-channel time-interleaved analog-to-digital converters. By representing the frequency responses as a polynomial series in jω, the mismatch parameters are estimated exploiting the filter-X least-mean square algorithm and the channel swapping technique. Mismatch-induced err... View full abstract»

• ### A Novel Wideband Compact Microstrip Coupled-Line Ring Hybrid for Arbitrarily High Power-Division Ratios

Publication Year: 2017, Page(s):630 - 634
| | PDF (1580 KB) | HTML

This brief introduces a novel, compact, and wideband coupled-line ring hybrid configuration that allows for the easy realization of arbitrarily high power-division ratios featuring significant miniaturization and wider bandwidths compared with other commonly utilized implementations. The circumference of a proof-of-concept 12-dB power-division ratio prototype is 209.3° long, which occupies ... View full abstract»

• ### Low-Power ${G}_{{m}}{-}C$ Filter Employing Current-Reuse Differential Difference Amplifiers

Publication Year: 2017, Page(s):635 - 639
Cited by:  Papers (1)
| | PDF (673 KB) | HTML

This paper deals with the design of low-power high-performance continuous-time filters. The proposed operational transconductance amplifier architecture employs current-reuse differential difference amplifiers in order to produce more power-efficient Gm-C filter solutions. To demonstrate this, a sixth-order low-pass Butterworth filter was designed in a 0.18-μm CMOS, achieving a 6... View full abstract»

• ### A 34-pJ/bit Area-Efficient ASK Demodulator Based on Switching-Mode Signal Shaping

Publication Year: 2017, Page(s):640 - 644
| | PDF (1652 KB) | HTML

This brief presents a new amplitude shift-keying (ASK) demodulator for biomedical implants based on waveform shaping on detected envelope signals. The proposed demodulator incorporates a novel switching-mode signal shaper, which can operate with much lower power consumption. The design does not require any comparator or Schmitt trigger and operates with a very low number of elements; thus, the sil... View full abstract»

• ### A 0.035-pJ/bit/dB 20-Gb/s Adaptive Linear Equalizer With an Adaptation Time of 2.68 $\mu\text{s}$

Publication Year: 2017, Page(s):645 - 649
| | PDF (1521 KB) | HTML

A 20-Gb/s adaptive linear equalizer with a coefficient fast-converging method is presented. By using the asynchronous sampling technique, the power dissipation of the circuits, realizing the adaptation method, can be reduced. However, the equalization coefficients require a considerable amount of time to be determined. To shorten the asynchronous sampling time, the high-frequency gain of the linea... View full abstract»

• ### A 250-Mb/s to 6-Gb/s Referenceless Clock and Data Recovery Circuit With Clock Frequency Multiplier

Publication Year: 2017, Page(s):650 - 654
| | PDF (2361 KB) | HTML

This brief describes the design and implementation of a 250-Mb/s to 6-Gb/s single-loop referenceless clock and data recovery circuit. The clock frequency multiplier and the referenceless frequency acquisition circuit are used to cover a wide-range data rate. The clock frequency multiplier is proposed to generate the 6-GHz clock with low jitter. In addition, the voltage-controlled oscillator operat... View full abstract»

• ### A 0.015-mm$^{\text{2}}$ Inductorless 32-GHz Clock Generator With Wide Frequency-Tuning Range in 28-nm CMOS Technology

Publication Year: 2017, Page(s):655 - 659
Cited by:  Papers (1)
| | PDF (2676 KB) | HTML

This brief illustrates the design of an inductorless high-speed clock generator. Compared to inductance-capacitance (LC) oscillators, ring oscillators are used in order to achieve a wide frequency-tuning range with a small chip area. By employing a cascaded phase-locked loop (PLL) architecture, the phase noise of the oscillator can be effectively suppressed. The first PLL is implemented with high-... View full abstract»

• Circuits and Systems for Communications
• ### Space–Time Trellis-Coded OFDM Systems in Frequency-Selective Mobile Fading Channels

Publication Year: 2017, Page(s):660 - 664
| | PDF (816 KB) | HTML

Space-time trellis code (STTC) techniques provide both coding gain and diversity gain to orthogonal frequency-division multiplexing (OFDM) systems without reducing bandwidth efficiency. However, factors such as residual carrier frequency offset due to Doppler shift destroy the orthogonality among subcarriers, which results in intercarrier interference (ICI) in mobile fading channels and bit error ... View full abstract»

• ### On the Dual-Frequency Impedance/Admittance Characteristic of Multisection Commensurate Transmission Line

Publication Year: 2017, Page(s):665 - 669
| | PDF (1011 KB) | HTML

In this brief, first an interesting dual-frequency feature of a section commensurate transmission line (TL) is reported. The property concerns the impedance (or admittance) looking into a multisection TL terminated with real impedance. A rigorous mathematical analysis is provided to prove the existence of the property. Second, as an application, a novel multisection dual-frequency impedance transf... View full abstract»

• Computer Aided Design and Electronic Design Automation
• ### Maximum Energy Efficiency Tracking Circuits for Converter-Less Energy Harvesting Sensor Nodes

Publication Year: 2017, Page(s):670 - 674
Cited by:  Papers (1)
| | PDF (787 KB) | HTML

Converter-less supply architecture is promising for energy harvesting sensor nodes, due to their high conversion efficiency, low cost, and easy integration. However, lack of a dc-dc converter precludes the electronic load operating under the voltage for optimal energy efficiency, since the output voltage of the energy harvester is set as the maximum power point tracking (MPPT) voltage. To mitigate... View full abstract»

• Control Theory and Systems
• ### Global Stabilization of Multiple Oscillator Systems by Delayed and Bounded Feedback

Publication Year: 2017, Page(s):675 - 679
| | PDF (242 KB) | HTML

The problem of global stabilization for the multiple oscillator systems by bounded and delayed controls is considered. Based on a special canonical form of the considered system, a nonlinear control law consisting of nested saturation functions is proposed to achieve global stabilization. The new special canonical form used in this brief contains not only time delay in the input but also time dela... View full abstract»

• ### A New Frequency-Limited Interval Gramians-Based Model Order Reduction Technique

Publication Year: 2017, Page(s):680 - 684
Cited by:  Papers (1)
| | PDF (536 KB) | HTML

Model order reduction (MOR) is a process of finding a lower approximation of the original system. In many practical applications, only a certain frequency interval is of interest. This motivates limited frequency interval model reduction wherein a reduced model is found whose output fits with that of the original system within the desired frequency interval. A frequency-limited balancing-based MOR... View full abstract»

• ### Finding the Most Influential Nodes in Pinning Controllability of Complex Networks

Publication Year: 2017, Page(s):685 - 689
Cited by:  Papers (1)
| | PDF (492 KB) | HTML

Identifying the best drivers (i.e., the nodes to apply the control signals in a large complex network), which gives the fastest synchronization to the reference state, is a challenge in pinning control of a network. There is not yet a method that exactly predicts a set of best drivers. In this brief, we introduce a novel method that gives first-order approximation for the importance of nodes in pi... View full abstract»

• ### Enhancing Pinning Controllability of Complex Networks Through Link Rewiring

Publication Year: 2017, Page(s):690 - 694
Cited by:  Papers (1)
| | PDF (973 KB) | HTML

In this brief, we propose a method to optimize the topology of networks to enhance their pinning controllability while the locations of the drivers and their associated feedback gains are fixed. Inspired by the master stability function approach, pinning controllability is measured by the eigenratio of the augmented Laplacian matrix. A perturbation mechanism is used to approximate the influence of... View full abstract»

• Digital Circuits and Systems and VLSI
• ### Energy and Delay Tradeoffs of Soft-Error Masking for 16-nm FinFET Logic Paths: Survey and Impact of Process Variation in the Near-Threshold Region

Publication Year: 2017, Page(s):695 - 699
| | PDF (1059 KB) | HTML

A near-threshold voltage (NTV) operation provides a recognized approach to low-power circuit design due to its balancing of minor performance degradation relative to its significant power savings. However, the scaling voltage and the technology process give rise to increased susceptibility to radiation-induced soft errors for systems operating at NTV. In this brief, we develop new results for the ... View full abstract»

• ### A 10T-4MTJ Nonvolatile Ternary CAM Cell for Reliable Search Operation and a Compact Area

Publication Year: 2017, Page(s):700 - 704
Cited by:  Papers (1)
| | PDF (526 KB) | HTML

Ternary content addressable memory (TCAM) is widely used in high-speed searching applications. Recently, zero standby power has been in high demand for battery-powered devices such as mobile phones, Internet of Things, and wearable devices. Thus, several nonvolatile TCAM (NV-TCAM) cells have been researched to realize zero standby power. However, they suffer from low reliability in search operatio... View full abstract»

• ### Toward an Efficient Multiview Display Processing Architecture for 3DTV

Publication Year: 2017, Page(s):705 - 709
| | PDF (1260 KB) | HTML

In this brief, we present an efficient architecture for multiview 3-D television (3DTV) processing. The architecture, which is designed for 4/8/9/16-compatible multiview 1080p and 4K displays, includes a frame memory controller, a parallel video scaling engine, and a subpixel rearrangement module for slanted lenticular displays. First, we observe and leverage computation locality in the viewpoint ... View full abstract»

• ### Energy-Efficient Adaptive Match-Line Controller for Large-Scale Associative Storage

Publication Year: 2017, Page(s):710 - 714
| | PDF (1676 KB) | HTML

Ternary content-addressable memory (TCAM) is a hardware search engine that is used to speed up searching through prestored contents rather than addresses. A supplementary don't care (X) state suits TCAM for many network applications but requires a large design area and consumes high power. This brief reports a state-of-the-art architecture of TCAM, which reduces the search (compare) energy dissipa... View full abstract»

• Nonlinear Circuits and Systems
• ### An Integrated Circuit Design for a Dynamics-Based Reconfigurable Logic Block

Publication Year: 2017, Page(s):715 - 719
Cited by:  Papers (4)
| | PDF (724 KB) | HTML

In this brief, a nonlinear integrated circuit to harvest different types of digital computation from complex dynamics is designed and fabricated. This circuit can be dynamically reconfigured to implement different two-input, one-output digital functions. The main advantage of the circuit is the ability to implement different digital functions in each clock cycle without halting for reconfiguration... View full abstract»

## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org