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IEEE Transactions on Circuits and Systems II: Express Briefs

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Displaying Results 1 - 25 of 27
• Table of Contents

Publication Year: 2017, Page(s):C1 - C4
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• IEEE Transactions on Circuits and Systems—II:Express Briefs publication information

Publication Year: 2017, Page(s): C2
| PDF (65 KB)
• Analog and Mixed Mode Circuits and Systems
• Graphical Representation of the Power Transfer Efficiency of Lumped-Element Circuits Based on Hyperbolic Geometry

Publication Year: 2017, Page(s):485 - 489
| | PDF (683 KB) | HTML

By adding a passive element to a power source, an inevitable power attenuation caused by the dissipative loss occurs. It is important for some applications to reduce this undesirable attenuation. A representative example of one of these kinds of applications is impedance matching, for which we transform the source's impedance to a different preferable one with passive elements, and the attenuation... View full abstract»

• A 51.3-MHz 21.8-ppm/°C CMOS Relaxation Oscillator With Temperature Compensation

Publication Year: 2017, Page(s):490 - 494
Cited by:  Papers (1)
| | PDF (1651 KB) | HTML

A 51.3-MHz 18-μW 21.8-ppm/°C relaxation oscillator is presented in 90-nm CMOS. The proposed oscillator employs an integrated error feedback and composite resistors to minimize its sensitivity to temperature variations. For a temperature range from -20 °C to 100 °C, the fabricated circuit demonstrates a frequency variation less than ±0.13%, leading to an average f... View full abstract»

• Transformer-Feedback Dual-Band Neutralization Technique

Publication Year: 2017, Page(s):495 - 499
| | PDF (894 KB) | HTML

A dual-band neutralization technique based on the transformer feedback between the drain and the gate of a transistor is presented. The drain and gate bias lines of the transistor are realized as multiorder LC networks. Transformer coupling between the inductors of the two networks can be used to concurrently neutralize the gate-drain capacitance of the transistor at multiple frequencies. Moreover... View full abstract»

• An Unbounded Frequency Detection Mechanism for Continuous-Rate CDR Circuits

Publication Year: 2017, Page(s):500 - 504
| | PDF (1487 KB) | HTML

A continuous-rate clock and data recovery (CDR) circuit with unbounded frequency detection mechanism is proposed herein. The unbounded frequency detection mechanism combines the digital quadricorrelator frequency detection and subharmonic tone frequency detection techniques. By adopting the unbounded frequency detector, this reference-less CDR circuit has no locking range limitation and provides a... View full abstract»

• Highly Tunable Triangular Wave UWB Baseband Pulse Generator With Amplitude Stabilization in 40-nm CMOS

Publication Year: 2017, Page(s):505 - 509
| | PDF (632 KB) | HTML

This brief introduces a highly configurable ultrawideband triangular wave baseband pulse generator designed in 40-nm complementary metal-oxide-semiconductor technology. The baseband pulse width is adjustable between 660 ps and 3.8 ns. An extra amplitude compensation loop is implemented to prevent amplitude changes when the pulse width varies. The amplitude variations are limited to 13% compared wi... View full abstract»

• Laser Diode Current Driver With $(1-t/T)^{-1}$ Time Dependence in 0.35- $mutext{m}$ BiCMOS Technology for Quantum Random Number Generators

Publication Year: 2017, Page(s):510 - 514
| | PDF (1007 KB) | HTML

A laser diode current driver with (1-t/T)-1 time dependence in 0.35-μm BiCMOS technology is presented in this brief. It is intended for application in optical quantum random number generators. The current driver is based on the balanced type of a bipolar junction transistor translinear loop with a sawtooth current as one of its inputs. The controllability of the frequency, shape,... View full abstract»

• Self-Biased Differential Rectifier With Enhanced Dynamic Range for Wireless Powering

Publication Year: 2017, Page(s):515 - 519
| | PDF (2315 KB) | HTML

A self-biased cross-coupled differential rectifier is proposed with enhanced power-conversion efficiency (PCE) over an extended range of input power. A prototype is designed for ultrahigh-frequency (UHF) 433-MHz radio-frequency power-harvesting applications and is implemented using a 0.18-μm CMOS technology. The proposed rectifier architecture is compared with the conventional cross-coupled... View full abstract»

• Circuits and Systems for Communications
• Microwave Voltage-Controlled Oscillator With Harmonic-Suppressed Stepped-Impedance-Resonator Filter

Publication Year: 2017, Page(s):520 - 524
| | PDF (997 KB) | HTML

This brief proposes a new low-phase-noise microwave voltage-controlled oscillator (VCO) with a harmonic-suppressed stepped-impedance-resonator (SIR) filter. Since the filter is synthesized by multiple resonators, it can provide a high-quality factor to improve the phase-noise performance. In addition, the harmonic-suppressed property of the filter adopted in this brief can alleviate the noise cont... View full abstract»

• Adaptive RFID Impedance Matching Based on Phase Difference for Oil Well Applications

Publication Year: 2017, Page(s):525 - 529
| | PDF (1015 KB) | HTML

Severe impedance mismatch problems due to the various environmental issues in downhole can greatly degrade the reliability of the radio-frequency identification (RFID) control system. In this brief, a new adaptive RFID impedance-matching system for oil well applications is presented, in which the measured real-time phase difference is employed to track the impedance mismatch information, while a v... View full abstract»

• Design Space–Time Trellis-Coded Intercarrier Interference Parallel Cancelation Architectures for OFDM Systems

Publication Year: 2017, Page(s):530 - 534
| | PDF (1231 KB) | HTML

Space-time (ST) coding combined with orthogonal frequency-division multiplexing (OFDM) is a robust transmission system. However, ST-OFDM system performance may degrade because of the intercarrier interference (ICI) in frequency-selective fading channels. To mitigate the ICI, a parallel cancelation (PC) algorithm is employed and combined with a 2 × 1 ST code to form an STPC-OFDM system. Furt... View full abstract»

• Novel Folded-KES Architecture for High-Speed and Area-Efficient BCH Decoders

Publication Year: 2017, Page(s):535 - 539
| | PDF (1757 KB) | HTML

In this brief, we present a novel folding technique for high-speed and low-cost Bose-Chaudhuri-Hocquenghem (BCH) decoders. In the conventional BCH decoder, the critical path lies on the Galois-field (GF) multiplier of the key equation solver, where the speedup of the critical path is very difficult due to a significant area increase. In the proposed work, the regularly structured GF multiplier is ... View full abstract»

• Computer Aided Design and Electronic Design Automation
• PMCC: Fast and Accurate System-Level Power Modeling for Processors on Heterogeneous SoC

Publication Year: 2017, Page(s):540 - 544
| | PDF (1140 KB) | HTML

Accurate estimation of power at the system level is essential for system-on-chip (SoC) architects. The integration of heterogeneous processors like CPUs and emerging coarse-grained reconfigurable architectures (CGRAs) in SoCs significantly complicates the power-estimation process. This brief presents an accurate and efficient system-level power modeling framework, power modeling with a customized ... View full abstract»

• Power Systems and Electronic Circuits
• A High-Efficiency Split–Merge Charge Pump for Solar Energy Harvesting

Publication Year: 2017, Page(s):545 - 549
Cited by:  Papers (1)
| | PDF (1475 KB) | HTML

An energy-efficient charge pump (CP) for solar energy harvesting is presented. A multistep split-merge charge transfer operation is introduced to replace the traditional one-step charge transfer process. Theoretically, this method increases the amount of charge transferred by up to 26% while reducing the Joule heat power loss by up to 7%. A five-stage complementary split-merge CP was designed and ... View full abstract»

• Analysis of Zeros in a Boost DC–DC Converter: State Diagram Approach

Publication Year: 2017, Page(s):550 - 554
| | PDF (787 KB) | HTML

This brief presents the analysis of zeros present in boost dc-dc converters that are operating in continuous inductor current mode. It proposes the utilization of the concept of multiple forward pathways from input to output to analyze the origin of the resulting zeros and determine their locations. This brief provides insight into the various zeros present in the boost converter through a state d... View full abstract»

• Control Theory and Systems
• Design of Reduced-Order Positive Linear Functional Observers for Positive Time-Delay Systems

Publication Year: 2017, Page(s):555 - 559
Cited by:  Papers (2)
| | PDF (206 KB) | HTML

This brief considers a new problem of designing reduced-order positive linear functional observers for positive time-delay systems. The order of the designed functional observers is equal to the dimension of the functional state vector to be estimated. The designed functional observers are always nonnegative at any time and they converge asymptotically to the true functional state vector. Moreover... View full abstract»

• Near Optimal Control Based on the Tensor-Product Technique

Publication Year: 2017, Page(s):560 - 564
Cited by:  Papers (1)
| | PDF (681 KB) | HTML

This brief investigates the near optimal control problem and targets at the rigid body attitude dynamic system that are characterized by its typical nonlinearity. In order to apply the linear matrix inequality-based optimization, a second-order linear-parameter-varying model is specifically derived from the attitude system by means of the tensor-product transformation. Furthermore, an adaptive att... View full abstract»

• Digital Circuits and Systems and VLSI
• Unipolar Differential Logic for Large-Scale Integration of Flexible aIGZO Circuits

Publication Year: 2017, Page(s):565 - 569
Cited by:  Papers (1)
| | PDF (831 KB) | HTML

A new unipolar differential logic (UDL) for the large-scale integration of amorphous In-Ga-Zn-O (aIGZO) digital circuits is proposed. Only single-threshold single-gate and aIGZO thin-film transistors are required. The proposed UDL logic gates are very insensitive to transistor parameter variations (i.e., threshold voltage, mobility, off-current, and subthreshold slope), which are inherently due to... View full abstract»

• Variation-Tolerant Sensing Circuit for Ultralow-Voltage Operation of Spin-Torque Transfer Magnetic RAM

Publication Year: 2017, Page(s):570 - 574
| | PDF (821 KB) | HTML

Although promising as a future memory solution, the spin-torque transfer magnetic RAM has critical drawbacks due to the small operation margin in low supply voltage and large area of the sensing circuit. To overcome these disadvantages, we propose a novel sensing circuit that utilizes the data-dependent body-bias scheme with a single reference cell. Through Monte Carlo simulations using 45-nm proc... View full abstract»

• Digital Circuits and Systems and VLSI
• Design of Efficient BCD Adders in Quantum-Dot Cellular Automata

Publication Year: 2017, Page(s):575 - 579
Cited by:  Papers (1)
| | PDF (771 KB) | HTML

Among the emerging technologies recently proposed as alternatives to the classic CMOS, quantum-dot cellular automata (QCA) is one of the most promising solutions to design ultralow-power and very high speed digital circuits. Efficient QCA-based implementations have been demonstrated for several binary and decimal arithmetic circuits, but significant improvements are still possible if the logic gat... View full abstract»

• An Efficient Eligible Error Locator Polynomial Searching Algorithm and Hardware Architecture for One-Pass Chase Decoding of BCH Codes

Publication Year: 2017, Page(s):580 - 584
| | PDF (515 KB) | HTML

In numerous memory and communication systems, Bose-Chaudhuri-Hocquenghem (BCH) codes are widely employed to enhance reliability. A one-pass Chase soft-decision decoding algorithm for BCH codes was previously proposed to achieve significant performance improvement over traditional hard-decision decoding while not increasing too much computational complexity. The bottleneck in conventional one-pass ... View full abstract»

• Low-Cost Architecture of Modified Daubechies Lifting Wavelets Using Integer Polynomial Mapping

Publication Year: 2017, Page(s):585 - 589
| | PDF (1284 KB) | HTML

This brief proposes a modified version of the popular lifting algorithm of Daubechies-4 (D4) and Daubechies-6 (D6) wavelets and its efficient implementation using integer polynomial mapping (IPM). At first, an improved polyphase matrix for D4 is presented that eliminates one filter coefficient completely without losing any accuracy. Then, IPM is applied to encode the remaining irrational coefficie... View full abstract»

• Nonlinear Circuits and Systems
• Complex-Network-Inspired Design of Traffic Generation Patterns in Communication Networks

Publication Year: 2017, Page(s):590 - 594
| | PDF (674 KB) | HTML

In this brief, we consider a generic type of communication network consisting of two kinds of nodes, i.e., hosts and routers, and only the hosts can generate and receive packets. In this kind of network, the traffic performance is closely related to the traffic generation pattern, which strongly depends on the hosts' locations. We employ a simulated annealing algorithm to find a near-optimal confi... View full abstract»

• Signal Processing
• Toward Local Stability Analysis of Externally Interfered Digital Filters Under Overflow Nonlinearity

Publication Year: 2017, Page(s):595 - 599
Cited by:  Papers (1)
| | PDF (375 KB) | HTML

This brief focuses on the local stability analysis of 1-D digital filters that are subject to the saturation overflow nonlinearity and external interference by exploiting local saturation arithmetic. A novel stability criterion that analyzes the local asymptotic stability of a digital filter under zero external interference is investigated. Furthermore, an extension to attain a local H∞... View full abstract»

Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org