IEEE Transactions on Circuits and Systems II: Express Briefs

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Displaying Results 1 - 25 of 31

Publication Year: 2017, Page(s):C1 - C4
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• IEEE Transactions on Circuits and Systems—II:Express Briefs publication information

Publication Year: 2017, Page(s): C2
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• Methodologies for Evaluating and Measuring Capacitance Mismatch in CMOS Integrated Circuits

Publication Year: 2017, Page(s):101 - 105
Cited by:  Papers (1)
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In this brief, two figures of merit and a switched-capacitor filter are used to estimate and measure, respectively, the mismatch between fully integrated capacitors. The theoretical estimations are compared with the experimental results obtained for different layouts fabricated in a test chip using a 0.35-μm CMOS technology. View full abstract»

• A 250- $\mu\text{W}$ 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications

Publication Year: 2017, Page(s):106 - 110
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This brief presents a fast-lock 2.4-GHz fractional-N phase-locked loop (PLL) for ultralow-power applications. To minimize the power consumed by all the other circuits except for the main oscillator, we propose a master-slave PLL structure in which a low-frequency master PLL is followed by a slave injection-locked oscillator operating at high frequency. A frequency-error compensation circuit is als... View full abstract»

• Metastablility in SAR ADCs

Publication Year: 2017, Page(s):111 - 115
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The fundamental limitation of Nyquist analog-to-digital converter (ADC) architectures toward high speed is metastability. It refers to the inability of a latched comparator to produce a valid decision in a certain available time. This issue is usually severe in high-speed successive approximation register (SAR) ADCs due to their serial conversion scheme, which includes the regeneration and the res... View full abstract»

• A 14-Bit 30-MS/s 38-mW SAR ADC Using Noise Filter Gear Shifting

Publication Year: 2017, Page(s):116 - 120
Cited by:  Papers (1)
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We present a successive approximation register analog-to-digital converter (ADC) that employs a comparator with time-varying noise performance, realized by changing the integration time of a Gm-C preamplifier. This approach allows us to relax precision and enhance speed during noncritical decisions, leading to an aggregate speed-up of 22% compared to a conventional design. The ADC opera... View full abstract»

• Analog and Mixed Mode Circuits and Systems
• Adaptive Techniques to Mitigate Oscillator Pulling in Radio Transmitters

Publication Year: 2017, Page(s):121 - 125
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This brief presents novel methods to resolve the long persisting oscillator pulling effect for the two most important radio transmitter categories, namely, the polar and Cartesian transmitters. In practice, oscillator injection arises from the coupling of the power-amplifier output signal. In particular, for nonconstant envelope modulation schemes, e.g., enhanced data rates for GSM evolution (GSM-... View full abstract»

• Improving Load Range of Dual-Band Impedance Matching Networks Using Load-Healing Concept

Publication Year: 2017, Page(s):126 - 130
Cited by:  Papers (4)
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A novel and very simple scheme to mend conventional dual-band impedance matching networks is presented. It involves the employment of a load-modifying element (load-healer) so as to extend the range of frequency-dependent complex load that could be matched. Two simple load-healers incorporated in the conventional T-network are used to illustrate the concept. The proposed scheme can be successfully... View full abstract»

• A Highly Compact 2.4-GHz Passive 6-bit Phase Shifter With Ambidextrous Quadrant Selector

Publication Year: 2017, Page(s):131 - 135
Cited by:  Papers (1)
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An extremely compact architecture for a passive 6-bit digital phase shifter is presented. The phase shifter has a range of 360° with 5.6° resolution at 2.4 GHz. The architecture is composed of an ambidextrous quadrant selector in series with a digital finetuned phase shifter that makes use of high-ratio symmetrical digitally variable capacitors loading a lumped element transmission l... View full abstract»

• A Novel Architecture for Elementary-Check-Node Processing in Nonbinary LDPC Decoders

Publication Year: 2017, Page(s):136 - 140
Cited by:  Papers (2)
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This brief presents an efficient architecture design for elementary-check-node processing in nonbinary low-density parity-check decoders based on the extended min-sum algorithm. This architecture relies on a simplified version of the bubble check algorithm and is implemented by the means of first-in-first-out. The adoption of this new design at the check node level results in a high-rate low-cost ... View full abstract»

• FSRFT—Fast Simplified Real Frequency Technique via Selective Target Data Approach for Broadband Double Matching

Publication Year: 2017, Page(s):141 - 145
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This brief introduces a broadband double-matching (DM) solver called fast simplified real frequency technique (FSRFT). FSRFT is essentially a greatly accelerated variant of the well-known classical simplified real frequency technique (SRFT). The basic idea that turns the classical SRFT into a “fast” SRFT relies on two main approaches: the selective target data approach (STDA) and the... View full abstract»

• Robust Sliding Mode Control: An Event-Triggering Approach

Publication Year: 2017, Page(s):146 - 150
Cited by:  Papers (3)
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Event-triggered sliding mode control (SMC) achieves robust performance in the presence of external disturbances. However, this triggering scheme for SMC does not have a global property even for linear time-invariant systems. Here, “global” means that the triggering scheme ensures the stability of the system globally in the state space. Therefore, in this brief, a global event-trigger... View full abstract»

• Fast Fixed-Time Nonsingular Terminal Sliding Mode Control and Its Application to Chaos Suppression in Power System

Publication Year: 2017, Page(s):151 - 155
Cited by:  Papers (11)
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This brief presents a novel control scheme to achieve fast fixed-time system stabilization. Based on fixed-time stability theory, a novel fixed-time stable system is presented. Using the proposed fixed-time stable system, a fast fixed-time nonsingular terminal sliding mode control method is derived. Our control scheme achieves system stabilization within bounded time independent of the initial con... View full abstract»

• Linear Optimal Estimation for Discrete-Time Measurement Delay Systems With Multichannel Multiplicative Noise

Publication Year: 2017, Page(s):156 - 160
Cited by:  Papers (7)
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This brief investigates the estimation problem for multiplicative noise systems with measurement delay. Multiplicative noise is usually assumed to be a scalar in existing literature works. We consider multichannel multiplicative noise represented by a diagonal matrix in this brief. First, based on the reorganized innovation approach, the finite-horizon filter is derived in terms of two Riccati dif... View full abstract»

• A Fast and Compact Charger for an Li-Ion Battery Using Successive Built-In Resistance Detection

Publication Year: 2017, Page(s):161 - 165
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In this brief, a successive built-in resistance (BIR) detection, which operates in the constant average current mode, is proposed to achieve fast charging of a lithium-ion (Li-ion) battery by accurately compensating for the voltage across the BIR. In addition, a low-dropout regulator-based structure is adopted to implement a compact-sized battery charger without using any extra external components... View full abstract»

• A Wide Input Range Dual-Path CMOS Rectifier for RF Energy Harvesting

Publication Year: 2017, Page(s):166 - 170
Cited by:  Papers (6)
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This brief presents a dual-path CMOS rectifier with adaptive control for ultrahigh-frequency (UHF) RF energy harvesters. The input power range with high power conversion efficiency (high PCE) of the rectifier is extended by the proposed architecture, which includes a low-power path and a high-power path. The dual-path rectifier with an adaptive control circuit is fabricated in a 65-nm CMOS process... View full abstract»

• MAD Gates—Memristor Logic Design Using Driver Circuitry

Publication Year: 2017, Page(s):171 - 175
Cited by:  Papers (3)
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Memristors have recently begun to be explored in arithmetic applications. However, all prior designs for memristor-based gates have had shortcomings in terms of scalability, applicability, completeness, and performance. In this brief, a new low-power gate design, i.e., memristors-as-drivers gates, is proposed, which overcomes each of these issues by combining sense circuitry with the IMPLY operati... View full abstract»

• Design of Low-Power High-Performance 2–4 and 4–16 Mixed-Logic Line Decoders

Publication Year: 2017, Page(s):176 - 180
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This brief introduces a mixed-logic design method for line decoders, combining transmission gate logic, pass transistor dual-value logic, and static complementary metal-oxide semiconductor (CMOS). Two novel topologies are presented for the 2-4 decoder: a 14-transistor topology aiming on minimizing transistor count and power dissipation and a 15-transistor topology aiming on high power-delay perfor... View full abstract»

• Implementation of a High-Precision and Wide-Range Time-to-Digital Converter With Three-Level Conversion Scheme

Publication Year: 2017, Page(s):181 - 185
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This brief presents a time-to-digital converter (TDC) with a three-level conversion scheme based on a dual delay-locked loop (DLL) structure. The linear-feedback-shift-register counter is implemented for measurement range extension, and a differential delay cell is adopted for time resolution improvement. Furthermore, the DLL is applied to improve the stability of the multiphase clock frequency. T... View full abstract»

• Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory

Publication Year: 2017, Page(s):186 - 190
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Magnetoresistive random access memory (MRAM) suffers from low magnetoresistance ratio and serious variations in both low-resistance state (RP) and high-resistance state (RAP). The resulting narrow resistance window between RP and RAP makes it difficult to acquire a sufficient sense margin for accurate read operation. In this brief, a novel read circuit f... View full abstract»

• Energy-Efficient Adaptive Computing With Multifunctional Memory

Publication Year: 2017, Page(s):191 - 195
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Digital memory arrays, which serve as an integral part of modern computing systems, are traditionally used for information storage. However, recent reports show that memory can be used on demand as a reconfigurable computing resource, drastically improving energy efficiency for many applications. In this case, memory usage is limited to storing function responses as multi-input multi-output lookup... View full abstract»

• Nonlinear Circuits and Systems
• Stability Analysis of the Coupled Synchronous Reluctance Motor Drives

Publication Year: 2017, Page(s):196 - 200
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The oscillation-quenching phenomena in coupled synchronous reluctance motor (SynRM) drives are analyzed. The basins of attraction of a single SynRM drive are studied. The multistability of the coupled system is analytically and numerically studied. Due to the coexistence of multiple stable attractors, the coupled system can be stabilized at different equilibrium points under different initial cond... View full abstract»

• Attraction Region Seeking for Power Grids

Publication Year: 2017, Page(s):201 - 205
Cited by:  Papers (4)
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Motivated by growing interest in the smart grid technology and architecture, this brief explores an attraction region for the asymptotical locked phase agreement and frequency synchronization in power networks with a symmetrically connected interaction topology. By placing attention on the complicated system dynamics and network structure, two cases consisting of uniform and nonuniform ratios of t... View full abstract»

• $SigmaDelta$ Effects and Charge Locking in Capacitive MEMS Under Dielectric Charge Control

Publication Year: 2017, Page(s):206 - 210
Cited by:  Papers (1)
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This work investigates, analytically and experimentally, the effects induced by the use of a first-order sigma-delta (ΣΔ) feedback loop as a control method of dielectric charging for capacitive microelectromechanical systems (MEMS). This technique allows setting of a desired level of net charge in the dielectric of a MEMS device by continuously alternating the polarity of the actuati... View full abstract»

• Receding-Horizon $l_{2}{-}l_{\infty}$ FIR Filter With Embedded Deadbeat Property

Publication Year: 2017, Page(s):211 - 215
Cited by:  Papers (6)
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This brief proposes a new finite-impulse response (FIR) receding-horizon filter for discrete-time linear systems in state space. A solution has l2-l∞ performance with the embedded deadbeat property and is called the FIR l2-l∞ filter (FIRllF). Based on the linear matrix inequality (LMI) and linear matrix equality (LME) formulations, a suffic... View full abstract»

Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org