# IEEE Transactions on Components, Packaging and Manufacturing Technology

## Filter Results

Displaying Results 1 - 25 of 27
• ### Front Cover

Publication Year: 2017, Page(s): C1
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• ### IEEE Transactions on Components, Packaging and Manufacturing Technology publication information

Publication Year: 2017, Page(s): C2
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Publication Year: 2017, Page(s):1 - 2
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• ### Sintered-Silver Bonding of High-Temperature Piezoelectric Ceramic Sensors

Publication Year: 2017, Page(s):3 - 9
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Silver sintering is used to bond five components together in order to form a piezoelectric sensor. A description is provided of the preparation of these components, and of the manufacturing steps, which are carried out at a low temperature (280 °C). The resulting sensor assemblies are then characterized: Cross-sectional views show that the silver layer has a very dense structure, with less ... View full abstract»

• ### Novel Silver Solid-State Bonding Designs Between Two Copper Structures

Publication Year: 2017, Page(s):10 - 18
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Both copper (Cu) and silver (Ag) have been studied extensively for electrical conductor applications. To expand the applications, two bonding designs were implemented in this paper. For the first design, a 50-μm Ag layer was annealed at 400 °C to increase Ag grain size, thereby making it more ductile. For the second design, a 5-μm Ag layer with cavities was created to release ... View full abstract»

• ### Solid-State-Diffusion Bonding for Wafer-Level Fine-Pitch Cu/Sn/Cu Interconnect in 3-D Integration

Publication Year: 2017, Page(s):19 - 26
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Low-temperature Cu/Sn/Cu solid-state-diffusion (SSD) bonding has been investigated in this paper. Twenty-micrometer fine-pitch bumps with daisy-chain and Kelvin structures were fabricated by high-efficiency and low-cost electroplating process. Before bonding, the bump surface was treated with Ar(5% H2) plasma. Wafer-level bonding was performed with a pressure of 6.7 MPa at 200 °C for 60 min... View full abstract»

• ### Contact Resistance of Microbumps in a Typical Through-Silicon-Via Structure

Publication Year: 2017, Page(s):27 - 32
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The contact resistance of microbumps in a plastic ball grid array packaging with a through-silicon-via (TSV) structure was characterized. Accordingly, a self-designed TSV daisy-chain circuit was proposed to facilitate the formulation of the measurement paths, and the test samples were made by using a commercialized packaging process to simulate real product behaviors. Using the proposed single mod... View full abstract»

• ### 3-D TSV Six-Die Stacking and Reliability Assessment of 20- $mu$ m-Pitch Bumps on Large-Scale Dies

Publication Year: 2017, Page(s):33 - 38
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3-D integration typically involves multiple chips stacking with large numbers of interconnections within each chip. There are several fundamental technology challenges that need to be addressed in order to realize 3-D integration, such as Cu through-silicon via (TSV) expansion, transistor degradation or open failures on Cu contamination, microbump stress, and so on. The reliability issues on TSV a... View full abstract»

• ### Volterra Series-Based Time-Domain Macromodeling of Nonlinear Circuits

Publication Year: 2017, Page(s):39 - 49
Cited by:  Papers (1)
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Volterra series (VS) representation is a powerful mathematical model for nonlinear circuits. However, the difficulties in determining higher order Volterra kernels limited its broader applications. In this paper, a systematic approach that enables a convenient extraction of Volterra kernels from X-parameters is presented. A concise and general representation of the output response due to arbitrary... View full abstract»

• ### Si-Based Hybrid Microcooler With Multiple Drainage Microtrenches for High Heat Flux Cooling

Publication Year: 2017, Page(s):50 - 57
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Microfluid cooling solution is one of the most effective techniques for thermal management of high heat fluxes. A jet-based Si microcooler with multiple drainage microtrenches (MDMTs) has been developed for microelectronic thermal management. Integrated with MDMT in hybrid microcooler, the negative cross-flow effect between nearby nozzles is eliminated, and thus fully developed jet impingement can... View full abstract»

• ### Fast Nonlinear Dynamic Compact Thermal Modeling With Multiple Heat Sources in Ultra-Thin Chip Stacking Technology

Publication Year: 2017, Page(s):58 - 69
Cited by:  Papers (1)
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This paper presents a model-order reduction technique to extract nonlinear dynamic compact thermal models (DCTMs) with multiple (>1) heat sources. The approach leads to nonlinear DCTMs of small state-space dimensions that allow accurately reconstructing the whole temperature and heat flux fields induced by arbitrary power waveforms in complex structures composed of many materials with thermal c... View full abstract»

• ### A Fully 3-D Printed Waveguide and Its Application as Microfluidically Controlled Waveguide Switch

Publication Year: 2017, Page(s):70 - 80
Cited by:  Papers (2)
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This paper reports the design, fabrication, and characterization of a fully 3-D printed waveguide (WG) and a microfluidically controlled WG switch, operating at K-band. The WG body is printed using a benchtop 3-D printer with thermoplastic substrate acrylonitrile butadiene styrene, and the conductive layer is incorporated using the same printer by automated deposition of conductive silver ink. The... View full abstract»

• ### Waveguide-Stripline Series–Corporate Hybrid Feed Technique for Dual-Polarized Antenna Array Applications

Publication Year: 2017, Page(s):81 - 87
Cited by:  Papers (2)
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This paper proposes a waveguide-stripline series-corporate hybrid feed technique to ease the feed-network design for dual-polarized antenna arrays. The hybrid feed network consists of a stripline series feed network and a waveguide-stripline corporate feed network, incorporating both of their advantages in one application. Furthermore, the design can efficiently simplify the manufacturing and pack... View full abstract»

• ### A Novel Multilayer Electromagnetic Bandgap Structure Composed of Square Rings as Microwave Guiding Structures

Publication Year: 2017, Page(s):88 - 97
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This paper presents a novel electromagnetic bandgap (EBG) structure composed of stacked U-shaped 3-D lattice of metallic open square rings and its potential application to selected waveguide configurations. Five key geometrical parameters are shown to impact the bandgap and modal structure of the EBG. Using this insight, we demonstrate two different configurations for line defect that realize guid... View full abstract»

• ### Single-Filter Structure With Tunable Operating Frequency in Noncontiguous Bands

Publication Year: 2017, Page(s):98 - 105
Cited by:  Papers (3)
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In this paper, we present a frequency-tunable substrate-integrated waveguide bandpass filter of which the operating frequency band can be switched between S-band and X-band. One of unique features of the presented filter is that a single-filter structure can replace a filter bank composed of an S-band filter, an X-band filter, and two switches at input and output ports for selecting one of two fil... View full abstract»

• ### Design of SIW-Based Multi-Aperture Couplers Using Ray Tracing Method

Publication Year: 2017, Page(s):106 - 113
Cited by:  Papers (1)
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In this paper, a simplified ray tracing method is used to approximately predict the coupling characteristics of H-plane multi-aperture substrate integrated waveguide (SIW) couplers. The output powers of the output ports are calculated with the reflection and the transmission coefficients at the coupling windows. The ray tracing method provides a simple and efficient way to determine the initial va... View full abstract»

• ### A Hybrid Integrated High-Gain Antenna With an On-Chip Radiator Backed by Off-Chip Ground for System-on-Chip Applications

Publication Year: 2017, Page(s):114 - 122
Cited by:  Papers (2)
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This paper presents the design of a V-band hybrid integrated high-gain antenna. This antenna is designed to meet the system-on-chip applications in a quad flat no-lead (QFN) package. The antenna consists of an on-chip loop radiator, a dielectric resonator (DR), and an off-chip ground plane. The on-chip radiator is fabricated to excite the DR using the standard 0.18-μm CMOS technology with a... View full abstract»

• ### A Universal Reference Line-Based Differential Phase Shifter Structure With Simple Design Formulas

Publication Year: 2017, Page(s):123 - 130
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The conventional differential phase shifter configurations usually require different reference lines to provide constant phase shifts over a certain bandwidth. This results in high design complexity, especially for the multiway and poly-phase applications. To solve this problem effectively, a new differential phase shifter configuration based on the parallel stubs loaded transmission line is propo... View full abstract»

• ### An Integrated Approach for Via Metallization in Microwave Substrates

Publication Year: 2017, Page(s):131 - 137
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Microwave substrates such as glass-reinforced polytetrafluoroethylene (PTFE) are well known for high-speed signal applications due to their inherent properties of low dielectric loss and stable dielectric constant over wide range of frequencies. However, these materials are not as easy as a regular glass epoxy laminate to the process owing to their high chemical inertness, making it difficult to a... View full abstract»

• ### Through Silicon Via (TSV) Defect Modeling, Measurement, and Analysis

Publication Year: 2017, Page(s):138 - 152
Cited by:  Papers (3)
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Through silicon via (TSV)-based 3-D integrated circuit has introduced the solution to limitlessly growing demand on high system bandwidth, low power consumption, and small form factor of electronic devices. As the system design aims for higher performance, the physical dimensions of the channels are continuously decreasing. With TSV diameter of less than 10 μm and pitch of several tens of m... View full abstract»

• ### The Bonding Forming Simulation and Reliability Research of the Flip-Chip Stacked Gold Stud Bump

Publication Year: 2017, Page(s):153 - 161
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The finite element model of the bonding forming for 3-D flip-chip stacked gold stud bumps was set up, and the bonding process of stacked gold stud bump was simulated by controlling the bonding conditions of pressure, power, and time. Then, the height and diameter of stacked gold stud bumps with 16 groups of different bonding parameter level combinations designed by the orthogonal experiment method... View full abstract»

• ### Blank page

Publication Year: 2017, Page(s): B162
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• ### Introducing IEEE Collabratec

Publication Year: 2017, Page(s): 163
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• ### IEEE Open Access Publishing

Publication Year: 2017, Page(s): 164
| |PDF (1464 KB)
• ### Member Get-A-Member (MGM) Program

Publication Year: 2017, Page(s): 165
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## Aims & Scope

IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging.

Full Aims & Scope

Managing Editor
Ravi Mahajan
Intel