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Design & Test of Computers, IEEE

Issue 4 • Date Winter 1994

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Displaying Results 1 - 7 of 7
  • Strategies for competing in today's market

    Publication Year: 1994 , Page(s): 4 - 5
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (263 KB)  

    Focuses on the forces driving the evolution of the EDA industry to its current state. The author gives reasons why certain issues, such as pricing, have risen to the forefront, and also presents the core organizational structure and necessary strategic adaptations required by EDA vendors to compete in today's market.<> View full abstract»

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  • Low-power electronics

    Publication Year: 1994 , Page(s): 8 - 13
    Cited by:  Papers (9)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (529 KB)  

    Plans for a government sponsored research program call for the development of a new electronics technology base for hand-size information systems. This base will enable the design and implementation of semiconductor technologies that consume two orders of magnitude less power than conventional technology would have allowed. The strategy follows two coupled tracks, one developing advanced materials... View full abstract»

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  • PowerPC 603, a microprocessor for portable computers

    Publication Year: 1994 , Page(s): 14 - 23
    Cited by:  Papers (17)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1004 KB)  

    The PowerPC 603 incorporates a variety of features to reduce power dissipation: dynamic idle-time shutdown of separate execution units, low-power cache design, and power considerations for standard cells, data-path elements, and clocking. System-level features include three software-programmable static power management modes and a hardware-programmable phase-lock loop. Operating at 80 MHz, the 603... View full abstract»

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  • Saving power in the control path of embedded processors

    Publication Year: 1994 , Page(s): 24 - 31
    Cited by:  Papers (90)  |  Patents (6)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (639 KB)  

    CMOS circuits consume power during the charging and discharging of capacitances. Reducing switching activity then, saves power in embedded processors. The authors' two-pronged attack uses Gray code addressing and cold scheduling to eliminate bit switches.<> View full abstract»

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  • Saving power by synthesizing gated clocks for sequential circuits

    Publication Year: 1994 , Page(s): 32 - 41
    Cited by:  Papers (74)  |  Patents (14)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (941 KB)  

    Portable devices demand low power consumption to prolong battery life. Gating the clock is one strategy for saving power. The authors' technique identifies self-loops in an FSM and uses the function described by the self-loops to gate the clock. Applying these techniques to standard benchmarks achieved an average 25% less power dissipation at a cost of only 5% more area.<> View full abstract»

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  • Introduction to high-level synthesis

    Publication Year: 1994 , Page(s): 44 - 54
    Cited by:  Papers (55)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (1031 KB)  

    The basic problem of high-level synthesis is the mapping of a behavioral description of a digital system into an RTL design consisting of a data path and a control unit. The authors introduce the FSMD model, which forms the basis for synthesis. They discuss the main considerations in a high-level synthesis environment: the input description language, the internal representation, and the main synth... View full abstract»

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  • Developing micropipeline wavefront arbiters

    Publication Year: 1994 , Page(s): 55 - 64
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (900 KB)  

    The author based asynchronous circuit realizations of symmetric crossbar arbiters on the paradigm of intercepting moving wavefronts in a two-dimensional micropipeline-like structure. The LockC component, a hybrid of a Muller C element and a Q flop, supports both the movement of wavefronts in the array and the ability to intercept wavefronts asynchronously. These arbiters may find use in multiproce... View full abstract»

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This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

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Editor-in-Chief
Krishnendu Chakrabarty