IEEE Journal on Emerging and Selected Topics in Circuits and Systems

Issue 1 • March 2016

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Displaying Results 1 - 18 of 18
  • Table of Contents

    Publication Year: 2016, Page(s): C1
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  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems publication information

    Publication Year: 2016, Page(s): C2
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  • Guest Editorial Emerging Topics in Multiple-Valued Logic and Its Applications

    Publication Year: 2016, Page(s):1 - 4
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  • A survey and tutorial on contemporary aspects of multiple-valued logic and its application to microelectronic circuits

    Publication Year: 2016, Page(s):5 - 12
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (789 KB) | HTML iconHTML

    Multiple-valued logic has a history that goes back to the 1920s. Its flagship symposium was established in 1971. Despite multiple-valued logic's long history, there have been many recent advances, with several important contributions to microelectronic circuits and systems. This tutorial introduction to the area of multiple-valued logic and survey of recent advances focuses on those contemporary a... View full abstract»

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  • Hardware Implementation of Associative Memories Based on Multiple-Valued Sparse Clustered Networks

    Publication Year: 2016, Page(s):13 - 24
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1662 KB) | HTML iconHTML

    This paper presents algorithms and hardware implementations of associative memories based on multiple-valued sparse clustered networks (MV-SCNs). SCNs are recently-introduced binary-weighted associative memories that significantly improve the storage and retrieval capabilities over the prior state-of-the art. However, deleting or updating the messages stored in binary-weighted connections result i... View full abstract»

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  • Multiple-Valued Signaling for High-Speed Serial Links Using Tomlinson-Harashima Precoding

    Publication Year: 2016, Page(s):25 - 33
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2999 KB) | HTML iconHTML

    The data rate of VLSI interconnections has been increasing following the demand for the high-speed operation of semiconductors, such as in CPUs. At high-speed data rates, achieving accurate communication without bit errors is difficult because of intersymbol interference (ISI). This paper presents high-speed data communication techniques for VLSI systems using Tomlinson-Harashima precoding (THP). ... View full abstract»

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  • A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System

    Publication Year: 2016, Page(s):34 - 43
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1462 KB) | HTML iconHTML

    A fixed-point squaring algorithm is formulated and implemented based on an approach that allows any number of bits to be computed in each iterative step. The primary contribution this new approach offers is the ability for a designer to change the area × latency product through the choice of a different radix or number of bits per subword to be processed in each iterative step. When the num... View full abstract»

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  • Aspects of Reversible and Quantum Computing in a $p$ -Valued Domain

    Publication Year: 2016, Page(s):44 - 52
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1550 KB) | HTML iconHTML

    This paper presents basic aspects of non-binary reversible and quantum computing in a p-valued environment, since there are no physical reasons for quantum computing to be necessarily binary. A “quantum technology” is not yet available, but different alternatives at the level of laboratory experiments are promising. A theoretical background is needed to face the challenge of designin... View full abstract»

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  • Quantum Actin Automata and Three-Valued Logics

    Publication Year: 2016, Page(s):53 - 61
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1666 KB) | HTML iconHTML

    Actin is a filament-forming protein responsible for communication, information processing and decision making in eukariotic cells. To show how computation can be implemented on actin filaments we model actin as a helix of two 1-D quantum automata arrays. The model advances our previous work by exploiting the quantum aspects of the automaton (superposition). We use selected functions of automaton s... View full abstract»

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  • A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using $N$-Gate Lookahead

    Publication Year: 2016, Page(s):62 - 72
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1502 KB)

    With recent interest in reversible and quantum computation, research in synthesis of reversible and quantum circuits has increased in momentum. With additional requirements of neighborhood interactions among qubits (with two basis states) being a necessity in some physical realizations, several works on obtaining nearest neighbor quantum gate realization by inserting SWAP gates have been reported.... View full abstract»

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  • LUT Cascades Based on Edge-Valued Multi-Valued Decision Diagrams: Application to Packet Classification

    Publication Year: 2016, Page(s):73 - 86
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3585 KB) | HTML iconHTML

    This paper presents a packet classifier using multiple LUT cascades for edge-valued multi-valued decision diagrams (EVMDDs (k)). Since the proposed one uses both DSP blocks and on-chip memories, it can efficiently use the available FPGA resources. Thus, it can realize a parallel packet classifier on a single-chip FPGA for the next generation 400 Gb/s Internet link rate (IEEE 802.3). Since it is a ... View full abstract»

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  • Multilevel-Cell Phase-Change Memory: A Viable Technology

    Publication Year: 2016, Page(s):87 - 100
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3720 KB) | HTML iconHTML

    In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-change memory (PCM) is one such NVM technology that possesses highly desirable features and has reached an advanced level of maturity through inte... View full abstract»

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  • IEEE Journal on Emerging and Selected Topics in Circuits and Systems information for authors

    Publication Year: 2016, Page(s): 101
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  • Introducing IEEE Collabratec

    Publication Year: 2016, Page(s): 102
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  • Member Get-A-Member (MGM) Program

    Publication Year: 2016, Page(s): 103
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  • how can you get your idea to market first

    Publication Year: 2016, Page(s): 104
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  • IEEE Circuits and Systems Society Information

    Publication Year: 2016, Page(s): C3
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    Publication Year: 2016, Page(s): C4
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Aims & Scope

The IEEE Journal on Emerging and Selected Topics in Circuits and Systems publishes special issues covering the entire Field of Interest of the IEEE Circuits and Systems Society and with particular focus on emerging areas.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Yen-Kuang Chen
Intel Corporation
Santa Clara, CA, USA
y.k.chen@ieee.org