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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Issue 5 • Date May 1994

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Displaying Results 1 - 10 of 10
  • Some circuit design techniques using two cross-coupled, emitter-coupled pairs

    Page(s): 411 - 423
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (624 KB)  

    A circuit structure having two cross-coupled, emitter-coupled pairs is proposed as a fundamental analog function element for multiplying two electrical input quantities; the input voltage difference and the tail current difference. The simplest form is well-known as “the Gilbert multiplier cell.” In this circuit, the tail current difference is the differential output current of an emitter-coupled pair, nearly proportional to the differential input voltage. Therefore, if the tail current difference is the differential output current of a squaring circuit, nearly proportional to the square of the differential input voltage, a squaring multiplier is obtained and ran be used for radio communication applications as a frequency mixer with a local oscillator frequency doubler. If the tail current difference is the differential output current of a multiplier then a tripler, capable of multiplying three electrical input quantities, is obtained. The folded technique, for low voltage operation, and the multi-tanh technique, for input voltage range expansion, are employed View full abstract»

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  • Parallel modeling and structure of nonlinear Volterra discrete systems

    Page(s): 359 - 371
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    A parallel modeling of the nonlinear finite extent Volterra discrete systems, which exploits the inherent symmetries and ensures fast implementation and design with the minimum computational and hardware cost, is presented. The parallel realization model is based on the successive decomposition of the kth order Volterra kernel in terms of lower order kernels, which are ordered in sequential nested subkernels. The resulting parallel realization is a tree structure with inputs the associated quadratic Volterra kernels. Each layer of the tree structure is comprised of nodes that represent the kernels of the same order and can be computed independently and simultaneously. The proposed parallel model is characterized by a great degree of modularity and regularity, since it uses only planar triangular arrays and local communications, and constitutes the basis for efficient fast implementations using VLSI array processors View full abstract»

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  • Clock distribution in general VLSI circuits

    Page(s): 395 - 404
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    Minimization of clock skew in VLSI circuits to within a tolerable range is important for dependable operation of any digital system. Moreover, excessive delay through a clock distribution network can significantly degrade the performance of the digital system. Differences in path lengths and active elements of a clock distribution network are largely responsible for clock skew while excessive delay is a result of very long signal routes in the network. Improved integrated circuit processes are placing an increasing demand on current clock routing schemes through higher clock rates and larger die sizes. This paper proposes a clock routing scheme that primarily minimizes clock skew in a general VLSI circuit whose functional elements may be of various sizes and placements. A secondary objective is to reduce the overall network delay. The clock distribution network is generated based on the analysis of RC trees. In the networks so generated, the delay seen from the clock entry point of a circuit to all modules within the circuit is nearly identical. In constructing the clock distribution networks, the fan out of a buffer is accounted for and flexibility in placement of buffers is utilized View full abstract»

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  • Analog circuit for solving assignment problems

    Page(s): 426 - 429
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    A novel analog electronic circuit for solving assignment problems is presented. Total length of wiring in the proposed circuit amounts to at most O(n2) with n being the number of variables in contrast to O(n4) required for previously developed circuits based on the Hopfield neural networks. Moreover, its power dissipation is extremely small by virtue of subthreshold operation of MOS transistors View full abstract»

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  • Qualitative analysis of dynamical systems determined by differential inequalities with applications to robust stability

    Page(s): 377 - 386
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    In this paper we develop a Lyapunov stability theory for finite dimensional continuous-time dynamical systems described by a system of first-order ordinary differential inequalities. We utilize this theory to establish sufficient robust stability criteria for a large class of finite dimensional, continuous-time dynamical systems described by systems of ordinary differential equations. We demonstrate the applicability of the methodology advanced herein by means of a specific example that has been considered in the literature. In terms of computational complexity and conservatism of stability criteria, the present results frequently offer improvements over existing results View full abstract»

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  • Robust state estimation of electric power systems

    Page(s): 349 - 358
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    The exact fit points of the Least Median of Squares (LMS) and the Least Trimmed Squares (LTS) estimators in electric power systems are investigated. The expression of the maximum possible exact fit point δ*max is derived, and the corresponding quantile index ν of the ordered squared residual is determined. It is found that δ*max as well as ν hinge on the surplus of the network, defined as one less than the smallest number of measurements whose deletion from the data set decreases the rank of the Jacobian matrix. Based on the surplus concept, a system decomposition scheme is developed; it significantly increases the number of outliers that can be handled by the LMS and the LTS estimators. In addition, it dramatically reduces the computing time of these estimators, opening the door to their application in a real-time environment, even for large-scale systems View full abstract»

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  • Stability conditions for systems with parametric uncertainties and nonlinear feedback

    Page(s): 423 - 426
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    The purpose of this paper is to use the passivity theorem to derive new stability conditions for a class of systems that consist of a linear subsystem with parametric uncertainty and nonlinear feedback. To address the inherent conservativism in applying the passivity theorem, causal multipliers are introduced into the analysis and it is shown that a Popov-like stability condition results. The stability results are then extended for noncausal multipliers using the notion of positivity View full abstract»

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  • Design methodology for analog monolithic circuits

    Page(s): 387 - 394
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    This contribution describes an approach to design methodology for analog monolithic circuits. The underlying philosophy relies on use of three description domains-functional, structural, and geometrical-and two design tasks-synthesis and analysis. Based on this, the basic design path is described and several design styles are demonstrated. Finally, appropriate CAD and related issues are discussed View full abstract»

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  • General structures for classification

    Page(s): 372 - 376
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    The problem of classifying signals is of interest in several application areas. Typically, we are given a finite number m of pairwise disjoint sets C1,…,Cm of signals, and we would like to synthesize a system that maps the elements of each Cj into a real number aj, such that the numbers a1 ,…,am are distinct. The main purpose of this paper is to show that this classification can be performed by certain simple structures. Involving linear functionals and memoryless nonlinear elements, assuming only that the Cj are compact subsets of a real normed linear space. The results on which this conclusion is based have applications other than to classification problems. For example, one result provides a relatively simple completion of a proof of a well-known proposition concerning approximations in Rn using sigmoidal functions View full abstract»

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  • Temperature stable voltage controlled current source

    Page(s): 405 - 411
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    This paper proposes a complementary bipolar junction transistor circuit that supplies a nominally temperature invariant output current whose value is linearly related to a user defined static control voltage. The circuit developed herein is a true current source, as opposed to a current sink. It effectively functions as a static transconductor in that the controlling voltage is not limited to small signals, very little current is conducted by the controlling port, and very high static output resistance characterizes the controlled port. Moreover, the effective input-to-output transconductance is virtually independent of the absolute values of transistor parameters. Instead, its value is determined by a designable circuit resistance View full abstract»

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