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IEEE Embedded Systems Letters

Issue 2 • June 2015

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Displaying Results 1 - 13 of 13
  • Table of Contents

    Publication Year: 2015, Page(s): C1
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  • IEEE Embedded Systems Letters publication information

    Publication Year: 2015, Page(s): C2
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  • Cooperative On-Chip Temperature EstimationUsing Multiple Virtual Sensors

    Publication Year: 2015, Page(s):37 - 40
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (685 KB) | HTML iconHTML

    A variety of dynamic thermal management (DTM) schemes have been proposed to address the adverse effects of high temperatures on a chip. These DTM schemes rely on on-chip thermal sensors to get accurate temperature information over a die, and typically assume on-chip thermal sensors give accurate temperature readings. However, on-chip thermal sensors with small footprint and low power consumption, ... View full abstract»

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  • ORION3.0: A Comprehensive NoC Router Estimation Tool

    Publication Year: 2015, Page(s):41 - 45
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (555 KB) | HTML iconHTML

    Networks-on-Chip (NoCs) are increasingly used in many-core architectures. ORION2.0 (see Ref [1] Kahng etal., Proc. DATE, 2009, pp. 423-428) is a widely adopted NoC power and area estimation tool, but its estimation models can have large errors (up to 185%) versus actual implementations. We present ORION3.0, an open-source tool whose parametric and nonparametric modeling methodologies fundamentally... View full abstract»

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  • FPGA-Based Protection Scheme against Hardware Trojan Horse Insertion Using Dummy Logic

    Publication Year: 2015, Page(s):46 - 50
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (702 KB) | HTML iconHTML

    Hardware trojan horses (HTH) have recently emerged as a major security threat for field-programmable gate arrays (FPGAs). Previous studies to protect FPGAs against HTHs may still leave a considerable amount of logic resources to be misused by malicious attacks. This letter presents a low-level HTH protection scheme for FPGAs by filling the unused resources with the proposed dummy logic. In the pro... View full abstract»

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  • Hierarchical High-Level Synthesis Design Space Exploration with Incremental Exploration Support

    Publication Year: 2015, Page(s):51 - 54
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (515 KB) | HTML iconHTML

    One of the biggest advantages of C-Based VLSI design over traditional RT-level design is its ability to automatically generate architectures with different area versus performance characteristics without the need of modifying the original behavioral description. So far previous works have focuses on either pruning the design space or by creating predictive models in combination with different meta... View full abstract»

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  • On the Impacts of Greedy Thermal Management in Mobile Devices

    Publication Year: 2015, Page(s):55 - 58
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (478 KB) | HTML iconHTML

    As mobile system-on-chips incorporate multicore processors with high power densities, high chip temperatures are becoming a rising concern in mobile processors. Modern smartphones are limited in their cooling capabilities and employ CPU throttling mechanisms to avoid thermal emergencies by sacrificing performance. Traditional throttling techniques aim at achieving maximum utilization of the availa... View full abstract»

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  • Mapping of Embedded Applications on Hybrid Networks-on-Chip with Multiple Switching Mechanisms

    Publication Year: 2015, Page(s):59 - 62
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB) | HTML iconHTML

    This letter aims at optimizing the mapping of embedded applications on the hybrid network-on-chip (NoC) that intermingles multiple switching mechanisms. Specifically, we identify the critical characteristics of those switching mechanisms, deriving a new latency and energy model for this type of networks. A novel mapping scheme based on a branch-and-bound algorithm is proposed to map cores onto the... View full abstract»

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  • RSSI-Aware Energy Saving For Large File Downloading on Smartphones

    Publication Year: 2015, Page(s):63 - 66
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (588 KB) | HTML iconHTML

    Smartphones are emerging as a particularly appealing platform for network applications, especially through the WiFi interface. However, WiFi entails considerable energy consumption and smartphones are bottlenecked by their battery capacity. Finding ways to reduce energy consumption of WiFi is more than critical. In this letter, we address the problem of WiFi energy management with the awareness of... View full abstract»

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  • Expand your network, get rewarded

    Publication Year: 2015, Page(s): 67
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  • Technology insight on demand on IEEE.tv

    Publication Year: 2015, Page(s): 68
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  • IEEE Embedded Systems Letters information for authors

    Publication Year: 2015, Page(s): C3
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  • Blank page

    Publication Year: 2015, Page(s): C4
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Aims & Scope

The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software.

Full Aims & Scope

Meet Our Editors

EDITOR-IN-CHIEF
Sri Parameswaran
School of Computer Science and Engineering
University of New South Wales

DEPUTY EDITOR-IN-CHIEF
Tulika Mitra
School of Computing
National University of Singapore