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Circuits and Systems I: Fundamental Theory and Applications, IEEE Transactions on

Issue 4 • Date Apr 1994

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Displaying Results 1 - 16 of 16
  • Notes on PQ theorems

    Publication Year: 1994 , Page(s): 303 - 307
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (376 KB)  

    Results are given in this paper related to the PQ theorem. To illustrate their applicability two applications are described. One concerns the recovery of distorted bandlimited signals under considerably weaker conditions than previously assumed. The other concerns the theory of nonlinear resistive networks and the solvability of the port equations of networks with internal nodes View full abstract»

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  • Extensions to Chua's explicit piecewise-linear function descriptions

    Publication Year: 1994 , Page(s): 308 - 314
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (644 KB)  

    In this paper, we extend the class of explicit piecewise linear descriptions in the modulus form that was recently introduced by Chua cum suis. This is achieved by transforming a special form of a more general implicit description given by Van Bokhoven (1981) using the modulus transformation. This results in a set of base functions that can be used to compose the more general explicit description. It is shown that with this set all previously presented explicit PL descriptions can be covered. Furthermore, we pose some problems that occur when trying to construct an even more general description View full abstract»

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  • Bifurcations of limit cycles in periodically forced nonlinear systems: the harmonic balance approach

    Publication Year: 1994 , Page(s): 315 - 320
    Cited by:  Papers (18)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (516 KB)  

    The harmonic balance approach is used to analyze tangent (saddle-node) and flip (period-doubling) bifurcations of limit cycles in periodically forced nonlinear dynamical systems. An algebraic system of equations, whose unknowns are the coefficients of a truncated Fourier series, is defined and the relationships between the bifurcations of the solutions of this algebraic system and the tangent and flip bifurcations of the limit cycles are pointed out. Some examples are presented to illustrate the method and its accuracy View full abstract»

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  • Design of the most efficient excitation for a class of electric motor

    Publication Year: 1994 , Page(s): 341 - 344
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (320 KB)  

    Three basic concepts often used in circuit and system theory are innovatively combined to design the minimum power excitation that produces smooth torque in a popular class of electric motor. First, the exponential Fourier series is used to represent currents and voltages in three-phase permanent magnet motors. Second, the developed torque is modeled by convolutions of current and voltage harmonics. The torque model can be compactly written as a set of linear equations, in which the currents must be solved to yield smooth torque. However, the set of linear equations is underdetermined, so there is an infinite number of solutions. Hence, the solution that is chosen is the “minimum norm” solution. In practical terms, the resulting current waveforms are optimal in the sense of minimum average power. An example calculation for an actual motor is presented, and theoretical efficiency and torque ripple performance results are compared to that achieved by the popular rectangular current excitation View full abstract»

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  • A generalization of canonical piecewise-linear functions

    Publication Year: 1994 , Page(s): 345 - 347
    Cited by:  Papers (20)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (244 KB)  

    This letter proves the availability of the so-called high-level canonical representation, which is a generalization of the useful canonical representation, in the set of all continuous piecewise-linear (PWL) functions. The result is of interest in connection with research and applications where PWL functions are involved, e.g., about neural networks View full abstract»

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  • A 1.5 V BiCMOS dynamic logic circuit using a “BiPMOS pull-down” structure for VLSI implementation of full adders

    Publication Year: 1994 , Page(s): 329 - 332
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (368 KB)  

    This paper presents a 1.5 V BiCMOS dynamic logic circuit using a “BiPMOS pull-down” structure, which is free from race problems, for VLSI implementation of full adders. Using the 1.5 V BiCMOS dynamic logic circuit, a 16-bit full adder circuit, which is composed of half adders and a carry look-ahead circuit, shows a 1.7 times improvement in speed as compared to the CMOS static one View full abstract»

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  • M2R: multilayer routing algorithm for high-performance MCMs

    Publication Year: 1994 , Page(s): 253 - 265
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1336 KB)  

    We introduce a new multilayer routing strategy for high-performance MCMs whose objective is to route all nets optimizing routing performance and to satisfy various design constraints (e.g., minimizing coupling between vias as well as between signal lines and minimizing discontinuities such as vias and bends). First we introduce the Pin Pre-wiring and Redistribution Problem, which redistributes the pins or prewired subnets uniformly over the MCM substrate using pin redistribution layers. Pin redistribution is very important in MCM design. Our experience shows that it not only provides a global distribution for the pins congested in the chip site over the chip layer so as to ease the future routing difficulty, but also reduces the capacitive coupling between vias induced by many layers (up to 63 layers) by separating the pins far apart. The goal of the problem is to minimize the number of layers required to redistribute the entire set. An effective approach is proposed for solving this problem. Next we develop four effective algorithms for signal distribution, i.e., two variations on both single-layer routing and xy plane-pair routing paradigms. Based on these algorithms, a mixed version of single-layer routing and xy plane-pair routing techniques is proposed to establish a good trade-off between them to favor circuit performance and/or design objective instead of overemphasizing on the area minimization. One strategy is to apply single-layer routing iteratively until α % of the nets are routed, then route the remaining (100-α)% nets by xy plane-pair routing process. This provides the designer with a trade-off (e.g., between the number of layers and total number of vias) and shows the versatility of the proposed techniques. Various strategies are compared using practical MCM examples (each MCM has 25-100 ICs, 25-60 I/Os per IC, and 50-1,200 nets) View full abstract»

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  • (Almost) half of any circuit's operating points are unstable

    Publication Year: 1994 , Page(s): 286 - 293
    Cited by:  Papers (22)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (620 KB)  

    This paper presents new results concerning the stability of operating points of dc circuits. The authors define two classes of unstable operating points and develop criteria for identifying the class to which a given operating point belongs. They also show, by employing results from degree theory, that if a circuit possesses n structurally stable operating points (n has been shown previously to be odd), then ½(n-1) of these operating points must be unstable and hence physically unobservable. A special case of this result proves that any bistable circuit must possess at least three operating points View full abstract»

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  • Nonlinear dynamics and chaotic behavior of the sampling phase-locked loop

    Publication Year: 1994 , Page(s): 333 - 337
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (348 KB)  

    Nonlinear dynamics and chaotic behavior of the hybrid-type sampling phase-locked loop (SPLL) are studied. To perform the analysis correctly from a mathematical point of view, the nonlinear autonomous model of the SPLL has been formulated as a fixed point problem. If the loop-filter is omitted, bifurcations and chaotic behavior can be observed. If the SPLL has a loop-filter, more than one attractor has to be used to describe the acquisition properties of the circuit. One of them is the fixed-point to be achieved, but the others are periodic orbits, i.e., false locks. The regions of convergence for the different attractors are studied and plotted as a function of the loop parameters View full abstract»

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  • Designs for a wideband current amplifier and a current conveyor

    Publication Year: 1994 , Page(s): 272 - 280
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (640 KB)  

    Designs for a current amplifier and a current conveyor, both based on the first generation current conveyor, are discussed. Circuit details are given and simulation results shown. The results indicate that the current amplifier can achieve a 200 MHz bandwidth, and the CCI a 90 MHz bandwidth, in standard bipolar technologies View full abstract»

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  • Maximal perturbation bound for perturbed polynomials with roots in the left-sector

    Publication Year: 1994 , Page(s): 281 - 285
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (372 KB)  

    Considers the problem of computing the largest perturbation bounds for a perturbed polynomial while simultaneously maintaining the correct number of zeros in the left-sector. The uncertain polynomial coefficients are assumed to be described by either the interval bound or the 1-norm bound. The authors show that the largest allowable perturbation bound for the nominal polynomial can be obtained by computing the minimum distance of the Nyquist image of the perturbed polynomial from the origin of the complex plane. The proposed algorithms are frequency-domain based and can be computed efficiently View full abstract»

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  • A 470-MHz CMOS true single-phase clocked bit-serial arithmetic unit

    Publication Year: 1994 , Page(s): 337 - 341
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (412 KB)  

    A two's complement bit-serial arithmetic unit (AU) that operates at very high clock rates is presented in this paper. It is designed for a bit-serial SIMD data-path architecture and can perform several different arithmetic operations; for example sum-of-two-products. In order to attain a very high clock rate, the AU circuitry employs the true single-phase clocking (TSPC) technique, which encourages a high degree of pipelining. A 5-bit AU chip on an active area of 0.073 mm2 has been fabricated in a 1.0-μm standard CMOS process. Tests have verified correct chip operation up to a clock rate of 470 MHz at Vdd=5 V. At this frequency the AU power consumption is 11.5 mW View full abstract»

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  • Harmonic distortion in SC sigma-delta modulators

    Publication Year: 1994 , Page(s): 326 - 329
    Cited by:  Papers (5)  |  Patents (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (364 KB)  

    The maximum achievable resolution in noise-shaping modulators is a function of three principal parameters: oversampling ratio, M; noise-shaping order, L; and quantizer resolution, N. For practical implementations, thermal noise in MOS switches and amplifiers, bandwidth and slew-rate in integrator circuits in switched-capacitor (SC) implementations, and jitter noise in continuous-time (CT) and mixed CT-SC realizations have to be considered. This paper deals with harmonic distortion, which is a third design constraint in high-resolution SC noise-shaping modulators. Here we analyze harmonic distortion due to the nonideal DC-gain characteristic of operational amplifiers and derive a relationship for a standard SC integrator. Simulation results from a behavioral simulator we have developed validate the analysis View full abstract»

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  • Generating basis siphons and traps of Petri nets using the sign incidence matrix

    Publication Year: 1994 , Page(s): 266 - 271
    Cited by:  Papers (37)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (444 KB)  

    This paper introduces a new matrix called the sign incidence matrix for Petri nets. Using this sign incidence matrix, we present a simple algorithm for generating all basis siphons or traps without first generating all siphons or traps. Any siphon (trap) can be expressed as an union of basis siphons (basis traps). The concept of siphons and traps plays an important role in the analysis of Petri nets. In particular, criteria for liveness and reachability of some subclasses of Petri nets can be stated in terms of siphons and traps View full abstract»

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  • Bifurcations, chaos, and crises in voltage collapse of a model power system

    Publication Year: 1994 , Page(s): 294 - 302
    Cited by:  Papers (45)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (748 KB)  

    Bifurcations occurring in power system models exhibiting voltage collapse have been the subject of several recent studies. Although such models have been shown to admit a variety of bifurcation phenomena, the view that voltage collapse is triggered by possibly the simplest of these, namely by the (static) saddle node bifurcation of the nominal equilibrium, has been the dominant one. The authors have recently shown that voltage collapse can occur “prior” to the saddle node bifurcation. In the present paper, a new dynamical mechanism for voltage collapse is determined: the boundary crisis of a strange attractor or synonymously a chaotic blue sky bifurcation. This determination is reached for an example power system model akin to one studied in several recent papers. More generally, blue sky bifurcations (not necessarily chaotic) are identified as important mechanisms deserving further consideration in the study of voltage collapse View full abstract»

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  • Dynamic flicker frequency modulation and noise instability of oscillators

    Publication Year: 1994 , Page(s): 321 - 325
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (336 KB)  

    Due to oscillator dynamics, slow flicker modulation causes fast frequency fluctuations. This second-order effect as well as the associated spectral densities, frequency variance, and spectral line shape are considered. Second-order oscillator theory is based on the analytic signal, which generalizes the averaging and other classical methods View full abstract»

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