# IEEE Transactions on Circuits and Systems I: Regular Papers

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Displaying Results 1 - 25 of 35

Publication Year: 2015, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2015, Page(s): C2
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• ### Analysis of Low-Frequency Noise in Switched MOSFET Circuits: Revisited and Clarified

Publication Year: 2015, Page(s):929 - 937
Cited by:  Papers (2)
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Traps that are located in the gate oxide of MOSFETs have been established as a cause of low-frequency noise phenomena. Analysis of such noise is usually based on frequency domain, stationary models. It has been shown that such simplistic models produce erroneous results for circuits with time-varying bias conditions. Tian proposed an idealized trap model with the goal of capturing the nonstationar... View full abstract»

• ### Wireless Power Transfer With Zero-Phase-Difference Capacitance Control

Publication Year: 2015, Page(s):938 - 947
Cited by:  Papers (5)
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Wireless power transfer enables the frequent and ubiquitous charging of electronic devices. However, the variation of the efficiency and the received power with the transmission distance is an outstanding issue. To solve the problem of efficiency degradation of the magnetic resonance at short distances, zero-phase-difference capacitance control (ZPDCC), which is suitable for integration in large s... View full abstract»

• ### A 3.2 V –15 dBm Adaptive Threshold-Voltage Compensated RF Energy Harvester in 130 nm CMOS

Publication Year: 2015, Page(s):948 - 956
Cited by:  Papers (18)
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This paper presents an adaptive RF-DC power converter designed to efficiently convert RF signals to DC voltages utilizing auxiliary transistors to control the threshold voltage of the transistors in the main rectifier chain dynamically. The proposed circuit passively reduces the threshold voltage of the forward-biased transistors to increase the harvested power and the output voltage and increases... View full abstract»

• ### Sampled-Data Modeling of Switched- Capacitor Voltage Regulator With Frequency-Modulation Control

Publication Year: 2015, Page(s):957 - 966
Cited by:  Papers (6)
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The development of systems-on-chip requires embedded power management solutions due to the large number of power domains. The switched-capacitor voltage regulator is a suitable candidate as capacitors may be integrated whereas inductors still suffer limitations in that respect. Literature covers proposals of optimized power stages and several dedicated controllers for switched-capacitor DC-DC conv... View full abstract»

• ### Maximizing the Power Conversion Efficiency of Ultra-Low-Voltage CMOS Multi-Stage Rectifiers

Publication Year: 2015, Page(s):967 - 975
Cited by:  Papers (7)
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This paper describes an efficient method to explore the design space of AC/DC converters for energy harvesting circuits. A simple analytical model of the rectifier circuit valid down to ultra-low-voltage operation (input voltage below the thermal voltage) is proposed. Based on the Shockley diode equation, the use of an optimization equation that relates the number of stages of the rectifier to the... View full abstract»

• ### An Energy Autonomous 400 MHz Active Wireless SAW Temperature Sensor Powered by Vibration Energy Harvesting

Publication Year: 2015, Page(s):976 - 985
Cited by:  Papers (6)
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An energy autonomous active wireless surface acoustic wave (SAW) temperature sensor system is presented in this paper. The proposed system adopts direct temperature to frequency conversion using a lithium niobate SAW resonator for both temperature sensing and high-Q resonator core in a cross-coupled RF oscillator. This arrangement simplifies the temperature sensor readout circuit design and reduce... View full abstract»

• ### Minimal Realizations of Three-Port Resistive Networks

Publication Year: 2015, Page(s):986 - 994
Cited by:  Papers (14)
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This paper is concerned with the minimal realization problem of a third-order real symmetric matrix as the admittance of three-port resistive networks. First, a necessary and sufficient condition is derived for a real symmetric matrix to be realizable as the admittance of three-port resistive networks with four terminals and at most k elements, where k ∈ {1,2,...,5}. Since it is well-known ... View full abstract»

Publication Year: 2015, Page(s):995 - 1004
Cited by:  Papers (9)
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The Bode-Fano bounds on the integral over all frequency of the logarithm of the reflection coefficient between a source and a load, connected to each other through a passive matching network, are well-known measures of the bandwidth of the matching network and load. When there are multiple coupled loads being driven by multiple independent sources, the notion of a single reflection coefficient is ... View full abstract»

• ### A 0.1–1.5 GHz Harmonic Rejection Receiver Front-End With Phase Ambiguity Correction, Vector Gain Calibration and Blocker-Resilient TIA

Publication Year: 2015, Page(s):1005 - 1014
Cited by:  Papers (1)
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A 0.1-1.5 GHz harmonic rejection (HR) receiver front-end is presented. A flexible HR mixer is proposed to correct phase ambiguity and a vector gain calibration is used to eliminate the gain/phase mismatch and improve the HR ratio. With the proposed hybrid 8-phase LO generator, the highest oscillation frequency of the frequency synthesizer is reduced from four times to twice of the highest operatio... View full abstract»

• ### Investigation of Inverse Class-E Power Amplifier at Sub-Nominal Condition for Any Duty Ratio

Publication Year: 2015, Page(s):1015 - 1024
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The performance of the inverse class-E power amplifier at sub-nominal condition for any duty ratio is investigated in this paper. Comparing with the inverse class-E power amplifier at nominal condition, which demands both zero-current-switching (ZCS) and zero-current-derivative-switching (ZCDS) conditions simultaneously, the presented inverse class-E power amplifier at sub-nominal condition is onl... View full abstract»

• ### A Combinatorial Impairment-Compensation Digital Predistorter for a Sub-GHz IEEE 802.11af-WLAN CMOS Transmitter Covering a 10x-Wide RF Bandwidth

Publication Year: 2015, Page(s):1025 - 1032
Cited by:  Papers (4)
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A new combinatorial impairment-compensation digital predistorter (DPD) for a sub-GHz IEEE 802.11af-WLAN CMOS transmitter (TX) is proposed. For the TX to cover a 10x-wide bandwidth, the DPD implements a modified dynamic deviation reduction (DDR)-based Volterra series to jointly nullify the frequency-dependent I/Q imbalance, counter-intermodulation (CIM) of mixers, and nonlinearities of power amplif... View full abstract»

• ### A Unified Solution for Super-Regenerative Systems With Application to Correlator-Based UWB Transceivers

Publication Year: 2015, Page(s):1033 - 1041
Cited by:  Papers (1)
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The conventional theory of super regenerative systems (SRS) has been divided into distinct modes of operation and limiting assumptions. These assumptions make the analysis of these systems inaccurate for wide bandwidth applications. In this paper, a novel theory based on the analysis of time varying systems using Magnus expansion is proposed which unifies all modes of operation and formulates the ... View full abstract»

• ### 40-Gb/s 0.7-V 2:1 MUX and 1:2 DEMUX with Transformer-Coupled Technique for SerDes Interface

Publication Year: 2015, Page(s):1042 - 1051
Cited by:  Papers (1)
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This paper explores the use of transformer-coupled (TC) technique for the 2:1 MUX and the 1:2 DEMUX to serialize-and-deserialize (SerDes) high-speed data sequence. The widely used current-mode logic (CML) designs of latch and multiplexer/demultiplexer (MUX/DEMUX) are replaced by the proposed TC approach to allow the more headroom and to lower the power consumption. Through the stacked transformer,... View full abstract»

• ### Robust Global Stabilization of the DC-DC Boost Converter via Hybrid Control

Publication Year: 2015, Page(s):1052 - 1061
Cited by:  Papers (11)
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In this paper, we consider the modeling and (robust) control of a DC-DC Boost converter. In particular, we derive a mathematical model consisting of a constrained switched differential inclusion that includes all possible modes of operation of the converter. The obtained model is carefully selected to be amenable for the study of various important robustness properties. For this model, we design a... View full abstract»

• ### Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM

Publication Year: 2015, Page(s):1062 - 1070
Cited by:  Papers (3)
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An offset-compensated cross-coupled PFET bit-line (BL) conditioning circuit (OC-CPBC) and a selective negative BL write-assist circuit (SNBL-WA) are proposed for high-density FinFET static RAM (SRAM). The word-line (WL) underdrive read-assist and the negative BL write-assist circuits should be used for the stable operation of high-density FinFET SRAM. However, the WL underdrive read-assist circuit... View full abstract»

• ### An Efficient Constant Multiplier Architecture Based on Vertical-Horizontal Binary Common Sub-expression Elimination Algorithm for Reconfigurable FIR Filter Synthesis

Publication Year: 2015, Page(s):1071 - 1080
Cited by:  Papers (6)
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This paper proposes an efficient constant multiplier architecture based on vertical-horizontal binary common sub-expression elimination (VHBCSE) algorithm for designing a reconfigurable finite impulse response (FIR) filter whose coefficients can dynamically change in real time. To design an efficient reconfigurable FIR filter, according to the proposed VHBCSE algorithm, 2-bit binary common sub-exp... View full abstract»

• ### Array-Based Approximate Arithmetic Computing: A General Model and Applications to Multiplier and Squarer Design

Publication Year: 2015, Page(s):1081 - 1090
Cited by:  Papers (5)
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We propose a general model for array-based approximate arithmetic computing (AAAC) to guide the minimization of processing error. As part of this model, the Error Compensation Unit (ECU) is identified as a key building block for a wide range of AAAC circuits. We develop theoretical analysis geared towards addressing two critical design problems of the ECU, namely, determination of optimal error co... View full abstract»

• ### Subquadratic Space-Complexity Digit-Serial Multipliers Over $GF(2^{m})$ Using Generalized $(a,b)$-Way Karatsuba Algorithm

Publication Year: 2015, Page(s):1091 - 1098
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Karatsuba algorithm (KA) is popularly used for high-precision multiplication by divide-and-conquer approach. Recently, subquadratic digit-serial multiplier based on (a,2)-way KA decomposition is proposed in [1]. In this paper, we extend a (a,2)-way KA to derive a generalized (a,b)-way KA decomposition with a ≠ b. We have shown that (a,2)-way KA and mult-way KA are special cases of the propo... View full abstract»

• ### A Systolic Array Based GTD Processor With a Parallel Algorithm

Publication Year: 2015, Page(s):1099 - 1108
Cited by:  Papers (4)
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Generalized triangular decomposition (GTD) has been found to be useful in the field of signal processing, but the feasibility of the related hardware has not yet been established. This paper presents (for the first time) a GTD processor architecture with a parallel algorithm. The proposed parallel GTD algorithm achieves an increase in speed of up to 1.66 times, compared to the speed of its convent... View full abstract»

• ### A Low Power and High Sensing Margin Non-Volatile Full Adder Using Racetrack Memory

Publication Year: 2015, Page(s):1109 - 1116
Cited by:  Papers (7)
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The continuing miniaturization of complementary metal oxide semiconductor (CMOS) technology has brought in two critical issues-the high power and long global interconnection delay. Magnetic tunnel junction (MTJ) nanopillar with the advantages of non-volatility, fast switching speed, and high density promises new designs and architectures to significantly alleviate the power and delay issues. This ... View full abstract»

• ### A Hopf Resonator for 2-D Artificial Cochlea: Piecewise Linear Model and Digital Implementation

Publication Year: 2015, Page(s):1117 - 1125
Cited by:  Papers (2)
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The mammalian auditory system is able to process sounds over an extraordinarily large dynamic range, which makes it possible to extract information from very small changes both in sound amplitude and frequency. Evidently, response of the cochlea is essentially nonlinear, where it operates within Hopf bifurcation boundaries to maximize tuning and amplification. This paper presents a set of piecewis... View full abstract»

• ### System-On-Mud: Ultra-Low Power Oceanic Sensing Platform Powered by Small-Scale Benthic Microbial Fuel Cells

Publication Year: 2015, Page(s):1126 - 1135
Cited by:  Papers (5)
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A self-sustainable sensing platform powered entirely by small-scale benthic microbial fuel cells (MFCs) for oceanic sensing applications is presented. An ultra-low power chip featuring an ARM Cortex-M0 processor, 3 kB of SRAM, and power management unit (PMU) is designed to consume 11 nW in sleep mode for perpetual sensing operation. The PMU includes a switched-capacitor DC/DC converter designed fo... View full abstract»

• ### Error Adaptive Classifier Boosting (EACB): Leveraging Data-Driven Training Towards Hardware Resilience for Signal Inference

Publication Year: 2015, Page(s):1136 - 1145
Cited by:  Papers (7)
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The continued scaling of CMOS technologies and consideration of post-CMOS technologies has elevated hardware reliability to a first-class challenge, particularly in energy- and resource-constrained embedded sensor applications. In such applications, there is an increasing emphasis on inference functions. Machine-learning algorithms play an important role by enabling the construction of data-driven... View full abstract»

## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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## Meet Our Editors

Editor-in-Chief
Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK