IEEE Design & Test

Issue 5 • Oct. 2014

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Displaying Results 1 - 25 of 27
  • [Front cover]

    Publication Year: 2014, Page(s): C1
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  • [Front inside cover]

    Publication Year: 2014, Page(s): C2
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  • IEEE Design & Test of Computers publication information

    Publication Year: 2014, Page(s): 1
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  • Table of contents

    Publication Year: 2014, Page(s): 2
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  • Departments [Table of Contents]

    Publication Year: 2014, Page(s): 3
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  • Silicon Nanophotonics

    Publication Year: 2014, Page(s):4 - 5
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  • Guest Editors' Introduction: Silicon Nanophotonics for Future Multicore Architectures

    Publication Year: 2014, Page(s):6 - 8
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  • Silicon Nanophotonics for Future Multicore Architectures: Opportunities and Challenges

    Publication Year: 2014, Page(s):9 - 17
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (326 KB) | HTML iconHTML

    This article surveys emerging silicon nanophotonic architectures, protocols, and components, for intra-chip and inter-chip communication. It also examines the challenges in silicon nanophotonics research, presents some of the more prominent emerging solutions, and provides a critical view of their advantages and limitations. View full abstract»

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  • Exploring Silicon Nanophotonics in Throughput Architecture

    Publication Year: 2014, Page(s):18 - 27
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1044 KB) | HTML iconHTML

    In high-performance throughput processors, the interconnect experiences power and energy bottlenecks due to massive parallelism and ever-increasing memory accesses in emerging workloads. Also, high-performance throughput processors have exposed bandwidth and latency bottlenecks in on-chip interconnect and off-chip memory access. To eliminate such bottlenecks, we propose silicon nanophotonics and 3... View full abstract»

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  • Exploration of Electrical and Novel Optical Chip-to-Chip Interconnects

    Publication Year: 2014, Page(s):28 - 35
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (539 KB) | HTML iconHTML

    Off-chip interconnect is often a bottleneck due to its limited number of pins and bandwidth. The authors present an optical orbital angular momentum (OAM)-based wireless interchip interconnect and compare it with traditional electrical and optical interconnect alternatives. View full abstract»

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  • Ultralow-Power LED-Enabled On-Chip Optical Communication Designed in the III-Nitride and Silicon CMOS Process Integrated Platform

    Publication Year: 2014, Page(s):36 - 45
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1408 KB) | HTML iconHTML

    This paper explores the integration of III-V-based LEDs and detectors in a traditional Si-CMOS process to power an on-die nanophotonic link. The work also shows that the LED-enabled on-chip optical link results in more energy-efficient communication than using an off-chip laser source to power the optical link. View full abstract»

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  • An Energy-Efficient Silicon Microring Resonator-Based Photonic Transmitter

    Publication Year: 2014, Page(s):46 - 54
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1042 KB) | HTML iconHTML

    The design of two silicon microring resonator-based photonic transmitters, which were fabricated in the 130-nm SOI process and wire bonded with drivers in the 65-nm CMOS technology, is presented. The data rate of the proposed photonic transmitter can reach up to 9 Gb/s. View full abstract»

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  • A Case Study of Signal-to-Noise Ratio in Ring-Based Optical Networks-on-Chip

    Publication Year: 2014, Page(s):55 - 65
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract |PDF file iconPDF (1083 KB) | HTML iconHTML

    Microresonators have been utilized to construct optical interconnection networks. One of the drawbacks of these microresonators is that they suffer from intrinsic crosstalk noise and power loss, resulting in Signal-to-Noise Ratio (SNR) reduction and system performance degradation at the network level. The novel contribution of this paper is to systematically study the worst-case crosstalk noise an... View full abstract»

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  • Semantic Technology

    Publication Year: 2014, Page(s): 66
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  • Mr. Synopsys Speaks: The Aart of Tech-Onomic Orchestration of Adjacent Version $n+1$

    Publication Year: 2014, Page(s):67 - 75
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  • IEEE Was Here

    Publication Year: 2014, Page(s): 76
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  • IEEE Proceedings

    Publication Year: 2014, Page(s): 77
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  • CEDA Currents

    Publication Year: 2014, Page(s):78 - 80
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  • Faculty Position in Electrical Engineering at the Ecole polytechnique fédérale de Lausanne (EPFL)

    Publication Year: 2014, Page(s): 80
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  • Open Access Publishing

    Publication Year: 2014, Page(s): 81
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  • Phaser Data [advertisement]

    Publication Year: 2014, Page(s): 82
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  • Test Technology TC Newsletter

    Publication Year: 2014, Page(s):83 - 84
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  • Educational Activities

    Publication Year: 2014, Page(s): 85
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  • myIEEE

    Publication Year: 2014, Page(s): 86
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  • A tale of two technology disruptions

    Publication Year: 2014, Page(s):87 - 88
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Aims & Scope

IEEE Design & Test offers original works describing the models, methods and tools used to design and test microelectronic systems from devices and circuits to complete systems-on-chip and embedded software. The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies. The magazine seeks to bring to its readers not only important technology advances but also technology leaders, their perspectives through its columns, interviews and roundtable discussions. Topics include semiconductor IC design, semiconductor intellectual property blocks, design, verification and test technology, design for manufacturing and yield, embedded software and systems, low-power and energy efficient design, electronic design automation tools, practical technology, and standards.  

It was published as IEEE Design & Test of Computers between 1984 and 2012.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Joerg Henkel
Chair for Embedded Systems (CES)
Karlsruhe Institute of Technology (KIT)