By Topic

IEE Proceedings - Computers and Digital Techniques

Issue 1 • Date Jan 1994

Filter Results

Displaying Results 1 - 9 of 9
  • Distributed system for VLSI layout compaction

    Publication Year: 1994, Page(s):49 - 56
    Cited by:  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (612 KB)

    A distributed algorithm for solving the symbolic compaction problem based on the virtual grid approach is presented. The distributed layout compaction system (DLCS) is an implementation of this algorithm. The symbolic compaction problem consists of translating a symbolic description of a VLSI layout into the smallest possible mask level description without violating any design rule. The distribute... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Cellular automata as a BIST structure for testing CMOS circuits

    Publication Year: 1994, Page(s):41 - 47
    Cited by:  Papers (9)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (464 KB)

    Two-patterns are required to test single stuck-open faults in CMOS circuits, while detection of multiple stuck-open faults requires the application of three-patterns. The regular, modular and cascadable structure of cellular automata (CA) has been proposed as a built-in self-test (BIST) structure for on-chip generation of two-pattern and three-pattern test vectors. An analytical tool has been deve... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Identity-based conference key broadcast systems

    Publication Year: 1994, Page(s):57 - 60
    Cited by:  Papers (9)  |  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (288 KB)

    Two new ID-based conference key broadcast systems are proposed. The conference key can be distributed knowing only the receivers' identities. Only one copy of the ciphertexts is required to broadcast to all users. The security of these new schemes is based on the difficulty of factorisation as well as computing the discrete logarithm. We investigate their security and give a comparison to a recent... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Taxonomy of dynamic task scheduling schemes in distributed computing systems

    Publication Year: 1994, Page(s):1 - 10
    Cited by:  Papers (14)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (836 KB)

    System state estimation and decision making are the two major components of dynamic task scheduling in a distributed computing system. Combinations of solutions to each individual component constitute solutions to the dynamic task scheduling problem. It is important to consider a solution to the state estimation problem separate from a solution to the decision making problem to understand the simi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Efficient modelling and synthesis procedure of asynchronous sequential logic elements

    Publication Year: 1994, Page(s):61 - 64
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (280 KB)

    A model and procedure are developed for synthesising asynchronous sequential logic elements (ASLEs). This model represents the functional behaviour with a more compact form, and the procedure can synthesise them more efficiently than the traditional one. With the delineation of inputs as mode inputs,level inputs and edge inputs from the design specification, a set of equations can be generated whi... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Non-analytic object recognition using the Hough transform with the matching technique

    Publication Year: 1994, Page(s):11 - 16
    Cited by:  Papers (3)  |  Patents (5)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (436 KB)

    By using the combination of the Hough and the contour sequence matching techniques, the authors suggest a new algorithm of scale and rotation invariant for pattern recognition. In the proposed algorithm, the conventional four-dimensional Hough space is replaced by a two-dimensional one. Because of the significant reduction of memory requirement, the authors can provide a much faster and more effic... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Fault-tolerant design methodology for systolic array architectures

    Publication Year: 1994, Page(s):17 - 28
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (860 KB)

    A systematic approach to the design of fault-tolerant VLSI systolic arrays is proposed. The approach comprises three steps. First, redundancies are introduced at the computation level by deriving different versions of the computation structure. This involves the modification of the dependency matrix (D) of an algorithm to reflect a given fault-tolerance requirement. Second, the dependency matrix o... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Performance evaluation of BIN/ABIN networks in buffered/unbuffered packet-switched environments

    Publication Year: 1994, Page(s):29 - 34
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (328 KB)

    The performance of various interconnection networks (INs) is evaluated and compared. The throughput and complexity of the buffered and unbuffered Baseline IN (simple and augmented), in packet-switched environments, are compared with those of the crossbar, the (un)buffered BIN, and the single-buffered BIN. It is shown that adding buffers to a network improves its throughput. It is also shown that a... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Preventing tree saturation in multistage networks

    Publication Year: 1994, Page(s):35 - 39
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (324 KB)

    In a large-scale multiprocessing system, contention for a particular memory location (called hotspot), may create congestion in the interconnection network. Usually a tree of saturated buffers rooted at the hot memory module and extending to the processors is formed which causes excessive delay for both hotspot and regular nonhotspot requests. To prevent tree saturation, a simple combining techniq... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.