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# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 65

Publication Year: 2014, Page(s):C1 - 2234
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2014, Page(s): C2
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• ### Stability Constraints Define the Minimum Subthreshold Swing of a Negative Capacitance Field-Effect Transistor

Publication Year: 2014, Page(s):2235 - 2242
Cited by:  Papers (29)
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The current-voltage characteristics of a classical field-effect transistor (FET) is dictated by thermal injection of charge carriers over a gate-controlled energy barrier. It is well known that the subthreshold swing (S) associated with these transistors cannot be reduced below the Boltzmann limit of 60 mV/decade, which in turn defines the lower limit of power dissipation. Therefore, a number of g... View full abstract»

• ### Stochastic Modeling of Positive Bias Temperature Instability in High- $\kappa$ Metal Gate nMOSFETs

Publication Year: 2014, Page(s):2243 - 2249
Cited by:  Papers (3)
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Positive bias temperature instability (PBTI) has become one of the major reliability concerns in the present day CMOS technology. The PBTI mostly degrades the performance of high-κ/metal gate (HK/MG) nMOSFETs and is dominated by time dependent stress induced trap generation. The PBTI models proposed so far in different literature are deterministic in nature and overlook the randomness of th... View full abstract»

• ### Improved Body Effect and Analog Characteristics of n-Channel MOSFET With Lateral Asymmetric Substrate Doping

Publication Year: 2014, Page(s):2250 - 2256
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An n-channel MOSFET with lateral asymmetric substrate doping (LASD) is presented in this paper. The proposed LASD device has a p-well on the source side and a p-substrate on the drain side. The LASD MOSFET was designed by the simple p-well layout approach and fabricated using the 0.18 μm standard low-voltage CMOS process without any process modification. The experimental measurements showed... View full abstract»

• ### Output-Conductance Transition-Free Method for Improving the Radio-Frequency Linearity of Silicon-on-Insulator MOSFET Circuits

Publication Year: 2014, Page(s):2257 - 2263
Cited by:  Papers (1)
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In this paper, a novel concept is introduced to improve the radio-frequency (RF) linearity of partially depleted (PD) silicon-on-insulator (SOI) MOSFET circuits. The transition due to the nonzero body resistance (R(_{rm Body}) ) in output conductance of PD SOI devices leads to linearity degradation. A relation for R(_{rm Body}) is defined to eliminate the transition and a method to obtain transiti... View full abstract»

• ### A Pseudo-2-D-Analytical Model of Dual Material Gate All-Around Nanowire Tunneling FET

Publication Year: 2014, Page(s):2264 - 2270
Cited by:  Papers (19)
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In this paper, we have worked out a pseudo-2-D-analytical model for surface potential and drain current of a long channel p-type dual material gate gate all-around nanowire tunneling field-effect transistor. The model incorporates the effect of drain voltage, gate metal work functions, thickness of oxide, and silicon nanowire radius. The model does not assume a fully depleted channel. With the hel... View full abstract»

• ### Predictive Simulation and Benchmarking of Si and Ge pMOS FinFETs for Future CMOS Technology

Publication Year: 2014, Page(s):2271 - 2277
Cited by:  Papers (10)
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In this paper, we study and compare Si versus Ge pMOS FinFETs at advanced node dimensions using ensemble Monte Carlo simulations. It is found that due to large external resistance, lack of stressing methods, smaller bandgap, larger dielectric constant, and increased variability that in the absence of major innovation, Ge is not an ideal candidate for channel replacement material of pMOS in future ... View full abstract»

• ### Improved Electrothermal Ruggedness in SiC MOSFETs Compared With Silicon IGBTs

Publication Year: 2014, Page(s):2278 - 2286
Cited by:  Papers (12)
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A 1.2-kV/24-A SiC-MOSFET and a 1.2-kV/30-A Si-Insulated gate bipolar transistor (IGBT) have been electrothermally stressed in unclamped inductive switching conditions at different ambient temperatures ranging from -25 °C to 125 °C. The devices have been stressed with avalanche currents at their rated currents and 40% higher. The activation of the parasitic bipolar junction transistor... View full abstract»

• ### A Charge-Trapping Model for the Fast Component of Positive Bias Temperature Instability (PBTI) in High- $kappa$ Gate-Stacks

Publication Year: 2014, Page(s):2287 - 2293
Cited by:  Papers (3)
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We propose a physical model for the fast component (<;1 s) of the positive bias temperature instability (PBTI) process in SiOx/HfO2 gate-stacks. The model is based on the electron- phonon interaction governing the trapping/emission of injected electrons at the preexisting defects in the dielectric stack. The model successfully reproduces the experimental time dependences o... View full abstract»

• ### Investigations of Conduction Mechanisms of the Self-Rectifying n+Si-HfO2–Ni RRAM Devices

Publication Year: 2014, Page(s):2294 - 2301
Cited by:  Papers (2)
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The area, temperature (160-300 K), and bias polarity dependences of the I-V curves of the self-rectifying n+Si-HfO2-Ni resistance random access memory (RRAM) have been measured systematically. The complementary nonrectifying p+Si-HfO2-Ni RRAM I-V data are also provided for reference. To explain all experimental data, three resistances in series in the RR... View full abstract»

• ### Increased Multilayer Fabrication and RF Characterization of a High-Density Stacked MIM Capacitor Based on Selective Etching

Publication Year: 2014, Page(s):2302 - 2308
Cited by:  Papers (2)
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This paper presents the fabrication and characterization of a high-density multilayer stacked metal-insulator-metal (MIM) capacitor based on a novel process of depositing the MIM multilayer on pillars followed by polishing and selective etching steps to form a stacked capacitor with merely three photolithography steps. In this paper, the pillars were made of glass to prevent substrate loss, wherea... View full abstract»

• ### Germanane: A Low Effective Mass and High Bandgap 2-D Channel Material for Future FETs

Publication Year: 2014, Page(s):2309 - 2315
Cited by:  Papers (7)
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We investigate the electronic properties of Germanane and analyze its importance as 2-D channel material in switching devices. Considering two types of morphologies, namely, chair and boat, we study the real band structure, the effective mass variation, and the complex band structure of unstrained Germanane by density-functional theory. The chair morphology turns out to be a more effective channel... View full abstract»

• ### Physical Origins of High Normal Field Mobility Degradation in Ge p- and n-MOSFETs With GeOx/Ge MOS Interfaces Fabricated by Plasma Postoxidation

Publication Year: 2014, Page(s):2316 - 2323
Cited by:  Papers (12)
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Mechanisms of the mobility degradation in high normal field (or Ns) in Ge pand n-metal-oxide-semiconductor field-effect transistors (MOSFETs) with plasma postoxidation GeOx/Ge MOS interfaces: 1) carrier trapping due to surface states; 2) surface roughness scattering; and 3) electron transfer into the Δ valleys with the high effective mass, have been systematically investigated. I... View full abstract»

• ### Impact of Correlated RF Noise on SiGe HBT Noise Parameters and LNA Design Implications

Publication Year: 2014, Page(s):2324 - 2331
Cited by:  Papers (1)
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This paper presents analytical models of SiGe HBT and low-noise amplifier (LNA) noise parameters accounting for high-frequency noise correlation. The models are verified using measurement data and circuit simulation. The impact of noise correlation is shown to be a strong function of base resistance rb and emitter resistance re, which act as both noise sources and resistance.... View full abstract»

• ### Nonplanar InGaAs Gate Wrapped Around Field-Effect Transistors

Publication Year: 2014, Page(s):2332 - 2337
Cited by:  Papers (3)
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Nonplanar In0.53Ga0.47As gate wrap around field-effect transistors (GWAFETs) with atomic-layer deposited high-k dielectric and metal gate have been demonstrated in this paper. By applying novel device structure and optimizing fabrication process, In0.53Ga0.47As GWAFETs exhibit significant performance improvements over planar MOSFETs on both current drive... View full abstract»

• ### Fabrication of Submicrometer InGaAs/AlAs Resonant Tunneling Diode Using a Trilayer Soft Reflow Technique With Excellent Scalability

Publication Year: 2014, Page(s):2338 - 2342
Cited by:  Papers (5)
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A trilayer soft reflow fabrication method using solvent vapor that resulted in a submicrometer resonant tunneling diode (RTD) is reported in detail. The processing steps are simple, time efficient and are all based on conventional i-line photolithography. The trilayer soft reflow technique is able to shrink the emitter lateral width from 1 down to 0.35 μm (65% reduction) using a solvent at ... View full abstract»

• ### A Continuous Analytical Model for 2-DEG Charge Density in AlGaN/GaN HEMTs Valid for All Bias Voltages

Publication Year: 2014, Page(s):2343 - 2349
Cited by:  Papers (2)
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An analytical model for 2 Dimensional Electron Gas (2-DEG) charge density in AlGaN/GaN High Electron Mobility Transistors is developed considering electron charge in the AlGaN barrier layer. Simplified Fermi-Dirac statistics are used to calculate the electron charge density in the AlGaN barrier. This model is valid for the entire range of operation from subthreshold to practical forward biases. Th... View full abstract»

• ### A Highly Reliable 2-Bits/Cell Split-Gate Flash Memory Cell With a New Program-Disturbs Immune Array Configuration

Publication Year: 2014, Page(s):2350 - 2356
Cited by:  Papers (2)
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A highly reliable 2-bits/cell split-gate flash memory cell in a novel program-disturbs immune array architecture is fabricated and demonstrated. Using a novel metal interconnect technique, a new virtual-ground array architecture is realized to greatly improve program disturbs as compared with conventional and-type configuration. A fully self-aligned process with shallow trench isolation in cell ar... View full abstract»

• ### An 8T Low-Voltage and Low-Leakage Half-Selection Disturb-Free SRAM Using Bulk-CMOS and FinFETs

Publication Year: 2014, Page(s):2357 - 2363
Cited by:  Papers (6)
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In this paper, we present a new 8T design for static random access memory (SRAM) cell that is based on traditional Si technology and reduces leakage power considerably compared with a conventional design. Proposed design can be fully functional at smaller supply voltages over the conventional 6T SRAM cell. To verify the proposed design, a 32 kb SRAM is designed and simulated in 90 nm CMOS technolo... View full abstract»

• ### High Performance of Fin-Shaped Tunnel Field-Effect Transistor SONOS Nonvolatile Memory With All Programming Mechanisms in Single Device

Publication Year: 2014, Page(s):2364 - 2370
Cited by:  Papers (2)
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This paper demonstrates a silicon-oxide-nitrideoxide-silicon (SONOS) nonvolatile memory (NVM) with fin-shaped polycrystalline silicon channel tunnel field-effect transistor (TFET). It differs from other memory devices in that its programming mechanisms include Fowler-Nordheim (FN) tunneling, channel hot-electron (CHE) injection, and band-toband tunneling-induced hot electron (BBHE) in single memor... View full abstract»

• ### Design of Gate-All-Around Silicon MOSFETs for 6-T SRAM Area Efficiency and Yield

Publication Year: 2014, Page(s):2371 - 2377
Cited by:  Papers (7)
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Gate-all-around (GAA) MOSFETs relevant for the 11.9-nm CMOS technology node are optimized with device dimensions following the scale length rule. Variability in transistor performance due to systematic and random variations is estimated with the aid of TCAD 3-D device simulations, for these well-tempered GAA structures. The tradeoff between read stability and write-ability of 6-T static RAM cell d... View full abstract»

• ### Analytical Modeling of Oxide-Based Bipolar Resistive Memories and Complementary Resistive Switches

Publication Year: 2014, Page(s):2378 - 2386
Cited by:  Papers (31)
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To allow for novel memory and computing schemes based on the resistive switching memory (RRAM), physically based compact models are needed. This paper presents a new analytical model for HfO2-based RRAM, relying on a simplified description of the conductive filament (CF) in terms of its diameter and gap length. The set and reset operations are described by CF growth and gap opening, res... View full abstract»

• ### Bidirectional Communication in an HF Hybrid Organic/Solution-Processed Metal-Oxide RFID Tag

Publication Year: 2014, Page(s):2387 - 2393
Cited by:  Papers (8)
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A bidirectional communication protocol allows radio-frequency identification (RFID) tags to have readout of multiple tags in the RF field without collision of data. In this paper, we realized bidirectional communication between a reader system and thin-film RFID tag by introducing a novel protocol for the uplink communication. Amplitude modulation on the 13.56-MHz base carrier is used to transmit ... View full abstract»

• ### A New Definition of the Threshold Voltage for Amorphous InGaZnO Thin-Film Transistors

Publication Year: 2014, Page(s):2394 - 2397
Cited by:  Papers (5)
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An important parameter which characterizes thin-film transistors (TFTs) is the threshold voltage. Various methods have been proposed to extract the threshold voltage in amorphous InGaZnO (a-IGZO) TFTs, but few models have been presented based on material characteristics and the carrier transport. With regard to a-IGZO films, under low carrier concentrations, current conduction would be dominated b... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy