# IEEE Transactions on Electron Devices

## Filter Results

Displaying Results 1 - 25 of 47

Publication Year: 2014, Page(s):C1 - 934
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2014, Page(s): C2
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• ### A Warm Welcome to Two New T-ED Editors

Publication Year: 2014, Page(s): 935
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• ### Profiling of Channel-Hot-Carrier Stress-Induced Trap Distributions Along Channel and Gate Dielectric in High-$k$ Gated MOSFETs by a Modified Charge Pumping Technique

Publication Year: 2014, Page(s):936 - 942
Cited by:  Papers (4)
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To better understand the channel-hot-carrier (CHC)-induced reliability problems, a modified charge-pumping (CP) technique is proposed to characterize the distribution profiles of trap generation in MOSFETs with high- k gate-stack. The effects of gate leakage current on CP measurements were minimized to ensure the correct CP data. While applying dynamic drain bias, the gate-induced drain leakage cu... View full abstract»

• ### Studies of Safe Operating Area of InGaP/GaAs Heterojunction Bipolar Transistors

Publication Year: 2014, Page(s):943 - 949
Cited by:  Papers (2)
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The safe operating area (SOA) of InGaP/GaAs heterojunction bipolar transistors has been studied in detail both experimentally and theoretically. Devices without ballasting resistors were measured in dc to reveal the intrinsic SOA characteristics, which are influenced by both self-heating and the breakdown effect. Two distinct regions in the SOA boundary were observed indicating two different domin... View full abstract»

• ### Experimental Investigation on Alloy Scattering in sSi/ ${\rm Si}_{0.5}{\rm Ge}_{0.5}$/sSOI Quantum-Well p-MOSFET

Publication Year: 2014, Page(s):950 - 952
Cited by:  Papers (3)
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Alloy scattering in a sSi/Si0.5Ge0.5/strained Silicon on Insulator (SOI) (sSOI) quantum-well (QW) p-MOSFET is investigated by hole density modulation through applying back-gate biases. The hole mobility under negative back-gate biases is found degraded by intensified alloy scattering at low electrical field because more holes are distributed in the bulk Si0.5Ge View full abstract»

• ### Top-Down Fabrication of Epitaxial SiGe/Si Multi-(Core/Shell) p-FET Nanowire Transistors

Publication Year: 2014, Page(s):953 - 956
Cited by:  Papers (4)
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Short-gate length epitaxial Si1-xGex/Si multi-(core/shell) p-type nanowire (NW) transistors with high-permittivity dielectric and metal gate were fabricated and their electrical properties examined. Silicon NWs were first of all patterned in ultrathin silicon-on-insulator wafers by lithography and etching. Selective epitaxial growth of Si0.7Ge0.3/Si or S... View full abstract»

• ### Modeling Quasi-Static Characteristics of Devices Consisting of Silicon, Dielectrics, and Conductors Based on Their Helmholtz Free Energy

Publication Year: 2014, Page(s):957 - 962
Cited by:  Papers (2)
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Devices consisting of multiple distinct regions of semiconductor, dielectric, and conductor present special challenges to standard analysis methods. It is imperative to understand the interactions among these multiple regions because of their direct implication in device switching speed and power loss. We present a novel thermodynamic approach to modeling the quasi-static behavior of several devic... View full abstract»

• ### Stack Gate Technique for Dopingless Bulk FinFETs

Publication Year: 2014, Page(s):963 - 968
Cited by:  Papers (2)
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FinFETs have been made successfully for mass manufacturing on bulk and silicon-on-insulator wafers. When choosing the bulk option, additional process steps are needed for substrate leakage suppression. Typically, heavy substrate doping for punchthrough stopping between the source and drain is used, but precise control of the doping profile to prevent its up-diffusion into the channel has been a ch... View full abstract»

• ### Analytical Modeling of Threshold Voltage and Interface Ideality Factor of Nanoscale Ultrathin Body and Buried Oxide SOI MOSFETs With Back Gate Control

Publication Year: 2014, Page(s):969 - 975
Cited by:  Papers (10)
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Simple analytical models for the front and back gate threshold voltages and ideality factors with back gate control of lightly doped short channel fully depleted silicon-on-insulator ultrathin body and buried oxide thickness MOSFETs have been developed based on the minimum value of the front and back surface potentials. The threshold voltage and ideality factor models of the front and back gates h... View full abstract»

• ### A Conjoined Electron and Thermal Transport Study of Thermal Degradation Induced During Normal Operation of Multigate Transistors

Publication Year: 2014, Page(s):976 - 983
Cited by:  Papers (6)
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A 3-D full-band particle Monte Carlo (MC) simulator, with full electron and phonon dispersion and a 2-D quantum correction is self-consistently coupled to a phonon MC simulator. The coupling entails feeding the phonon data obtained from the 3-D electrical MC to the phonon MC. The phonon MC reciprocates by providing the resulting spatial temperature map, which is used in the electron MC, with tempe... View full abstract»

• ### Accuracy of Microwave Transistor $f_{\rm T}$ and $f_{\rm MAX}$ Extractions

Publication Year: 2014, Page(s):984 - 990
Cited by:  Papers (6)
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We present a complete methodology to evaluate the accuracy of the microwave transistor figures-of-merit fT (current gain cutoff frequency) and fMAX (maximum oscillation frequency). These figures-of-merit are usually extracted from calibrated S-parameter measurements affected by residual calibration and measurement uncertainties. Thus, the uncertainties associated with fT... View full abstract»

• ### Investigation of Key Technologies for Poly-Si/TaN/HfLaON/IL ${\rm SiO}_{2}$ Gate-Stacks in Advanced Device Applications

Publication Year: 2014, Page(s):991 - 997
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We demonstrated for the first time integration of a poly-Si/TaN/HfLaON/IL SiO2 gate-stacks into high-performance sub-30-nm nMOSFETs using a gate-first process flow successfully. The properties of TaN/HfLaON/IL SiO2 gate-stacks were studied. The results showed that the HfLaON gate dielectric material exhibited excellent thermal stability and electrical characteristics. A three... View full abstract»

• ### Analysis of Harmonic Distortion in UDG-MOSFETs

Publication Year: 2014, Page(s):998 - 1005
Cited by:  Papers (4)
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In this paper, the harmonic distortion (HD) in the underlap double-gate MOSFETs (UDG-MOSFETs) with high- k spacers is analyzed. The HD occurs due to the nonlinearity in the device performance and therefore, a detailed analysis of the HD as a function of spacer dielectric constant (k) is critical to ensure device reliability for RF performance. In this paper, the analysis is performed for the prima... View full abstract»

• ### A Thickness-Mode AlGaN/GaN Resonant Body High Electron Mobility Transistor

Publication Year: 2014, Page(s):1006 - 1013
Cited by:  Papers (19)
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A multigigahertz AlGaN/GaN resonant body transistor (RBT) is reported, wherein the mechanical resonance and electrical signal modulation are achieved simultaneously. A 175-Å-thick AlGaN layer is used as the piezoelectric transduction layer, and the 2-D electron gas present at the AlGaN/GaN interface is employed as the bottom electrode as well as the transistor conducting channel. The carrie... View full abstract»

• ### Modeling of the Gate Leakage Current in AlGaN/GaN HFETs

Publication Year: 2014, Page(s):1014 - 1021
Cited by:  Papers (5)
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A new physics-based model of the gate leakage current in AlGaN/GaN heterojunction field effect transistors (HFETs) is demonstrated. The model predicts accurately the gate-leakage current for a wide range of gate-drain voltage. The model is based on the formulation of tunneling and space charge limited (SCL) current flow. The gate leakage current is shown to flow through two paths: 1) the surface o... View full abstract»

• ### Comprehensive Study of the Complex Dynamics of Forward Bias-Induced Threshold Voltage Drifts in GaN Based MIS-HEMTs by Stress/Recovery Experiments

Publication Year: 2014, Page(s):1022 - 1030
Cited by:  Papers (36)  |  Patents (1)
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The transient recovery characteristics of the threshold voltage drift (ΔVth) of GaN-based HEMTs with a SiO2 gate dielectric induced by forward gate bias stress are systematically and comprehensively investigated for stress times from 100 ns to 10 ks, recovery times from 4 μs to 10 ks, and stress biases from 1 to 7 V. The measured recovery data are analyzed using... View full abstract»

• ### Fast Analytical Modeling of Dynamic Thermal Behavior of Semiconductor Devices and Circuits

Publication Year: 2014, Page(s):1031 - 1038
Cited by:  Papers (2)
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This paper presents a set of closed-form analytical expressions to approximate the transient solution to the heat equation without requiring any computationally intensive series summation. The parameters of these expressions can be easily extracted from the physical layout for constructing a thermal impedance matrix to be used in a self-consistent electrothermal circuit simulation of a large numbe... View full abstract»

• ### Toward Conformal Damage-Free Doping With Abrupt Ultrashallow Junction: Formation of Si Monolayers and Laser Anneal as a Novel Doping Technique for InGaAs nMOSFETs

Publication Year: 2014, Page(s):1039 - 1046
Cited by:  Papers (17)
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New doping techniques are needed for the formation of abrupt, ultrashallow junctions with high doping concentration in the source/drain or source/drain extension regions of metal-oxide-semiconductor field-effect transistors (MOSFETs) at advanced technology nodes. In addition, 3-D device structures, such as fin field-effect transistors, require a good doping conformality. In this paper, the formati... View full abstract»

• ### Optimal AlGaN/GaN HEMT Buffer Layer Thickness in the Presence of an Embedded Thermal Boundary

Publication Year: 2014, Page(s):1047 - 1053
Cited by:  Papers (3)
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Thermal-boundary resistance (TBR) is present at the interfaces between different materials due to mismatch in phonon density of states. When GaN is grown on silicon or silicon carbide, or when chemical-vapor deposited diamond is grown on GaN, the TBR of the interface between the GaN epilayers and the substrate can contribute significantly to the overall thermal resistance of electronic devices. Ho... View full abstract»

• ### Memristor: Part I—The Underlying Physics and Conduction Mechanism

Publication Year: 2014, Page(s):1054 - 1061
Cited by:  Papers (8)
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Memristor switching and observed I-V characteristics are explained using the underlying physics of the device in terms of the formation and rupture of filaments. Three different conduction mechanisms, namely-filament-assisted tunneling current, bulk tunneling current, and currents flowing through low and high conductivity filaments give rise to the total current in memristive systems. Heating of f... View full abstract»

• ### Memristor: Part II–DC, Transient, and RF Analysis

Publication Year: 2014, Page(s):1062 - 1070
Cited by:  Papers (6)
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The dc and RF circuit performance of memristor circuits, including transient behavior, is developed by considering current contributions arising from different conduction mechanisms, namely, filament-assisted and bulk tunneling currents and currents flowing through low and high conductivity filaments. The dc circuit model explains the observed I-V hysteresis and most importantly allows scaling and... View full abstract»

• ### Characteristic Evolution From Rectifier Schottky Diode to Resistive-Switching Memory With Al-Doped Zinc Tin Oxide Film

Publication Year: 2014, Page(s):1071 - 1076
Cited by:  Papers (7)
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We demonstrate a metal sandwiched Al-doped zinc tin oxide (AZTO) thin-film device to exhibit a characteristic evolution process from Schottky junction diode to resistive-switching random access memory (RRAM) applications. The proposed TiN/Ti/AZTO/Pt device can initially show good rectifying characteristics and high forward-bias current for Schottky diodes. After applying with an electrically trigg... View full abstract»

• ### The Resistivity of Zinc Oxide Under Different Annealing Configurations and Its Impact on the Leakage Characteristics of Zinc Oxide Thin-Film Transistors

Publication Year: 2014, Page(s):1077 - 1084
Cited by:  Papers (8)
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Sputtered zinc oxide (ZnO) without intentional doping was thermally annealed and the dependence of its resistivity on different sample configurations and heat-treatment conditions was studied. The ZnO was either exposed to the ambience or sealed with an impermeable cover during the annealing. The resistivity resulting from the sealed configuration was found to be lower. The possible origins of the... View full abstract»

• ### Influence of Mechanical Bending on Flexible InGaZnO-Based Ferroelectric Memory TFTs

Publication Year: 2014, Page(s):1085 - 1092
Cited by:  Papers (10)
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Future flexible electronic systems require memory devices combining low-power operation and mechanical bendability. Here, we present mechanically flexible amorphous InGaZnO (a-IGZO) memory thin-film transistors (TFTs) with a ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator. Memory operation is demonstrated with a memory window of 3.2 V and a memory ON/OFF rati... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy