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IEEE Embedded Systems Letters

Issue 1 • March 2014

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  • Table of contents

    Publication Year: 2014, Page(s): C1
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  • IEEE Embedded Systems Letters publication information

    Publication Year: 2014, Page(s): C2
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  • Introduction of New Associate Editors

    Publication Year: 2014, Page(s): 1
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  • Guest Editorial: Special Issue on Rigorous Modeling and Analysis of Cyber-Physical Systems

    Publication Year: 2014, Page(s):2 - 3
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  • An FPGA-Based Plant-on-Chip Platform for Cyber-Physical System Analysis

    Publication Year: 2014, Page(s):4 - 7
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (691 KB) | HTML iconHTML

    Digital control systems are traditionally designed independent of their implementation platform, assuming constant sensor sampling rates and processor response times. Applications are deployed to processors that are shared amongst control and noncontrol tasks, to maximize resource utilization. This potentially overlooks that computing mechanisms meant for improving average CPU usage, such as cache... View full abstract»

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  • HLC-PCP: A Resource Synchronization Protocol for Certifiable Mixed Criticality Scheduling

    Publication Year: 2014, Page(s):8 - 11
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1007 KB) | HTML iconHTML

    Today's safety-critical Cyber-Physical Systems (CPS) often need to integrate multiple diverse applications with varying levels of importance, or criticality. Mixed-criticality scheduling (MCS) has been proposed with the objectives of achieving certification at multiple criticality levels and efficient utilization of hardware resources. Current work on MCS typically assumes tasks at different criti... View full abstract»

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  • Verilog-A Based Effective Complementary Resistive Switch Model for Simulations and Analysis

    Publication Year: 2014, Page(s):12 - 15
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (781 KB) | HTML iconHTML

    Resistive memory, also known as memristor, is recently emerging as a potential successor to traditional charge-based memories. However, the nanoscale features of these devices introduce challenges in modeling and simulation. In this paper, we propose a novel Verilog-A based complementary resistive switch memory model for effective simulation and analysis. Our proposed model captures desired nonlin... View full abstract»

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  • Open Access

    Publication Year: 2014, Page(s): 16
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  • IEEE Embedded Systems Letters information for authors

    Publication Year: 2014, Page(s): C3
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  • [Blank page - back cover]

    Publication Year: 2014, Page(s): C4
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Aims & Scope

The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software.

Full Aims & Scope

Meet Our Editors

EDITOR-IN-CHIEF
Sri Parameswaran
School of Computer Science and Engineering
University of New South Wales

DEPUTY EDITOR-IN-CHIEF
Tulika Mitra
School of Computing
National University of Singapore