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Electron Device Letters, IEEE

Issue 2 • Date Feb. 2014

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Displaying Results 1 - 25 of 51
  • Table of contents

    Publication Year: 2014 , Page(s): C1 - 150
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  • IEEE Electron Device Letters publication information

    Publication Year: 2014 , Page(s): C2
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    Freely Available from IEEE
  • A 0.8 THz f_{\rm MAX} SiGe HBT Operating at 4.3 K

    Publication Year: 2014 , Page(s): 151 - 153
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (545 KB) |  | HTML iconHTML  

    We demonstrate record ac performance (0.8 THz) for a silicon-germanium heterojunction bipolar transistor (SiGe HBT) operating at cryogenic temperatures. An extracted peak fMAX of 798 GHz (peak fT of 479 GHz) at 4.3 K was measured for a device with a BVCEO of 1.67 V. This scaled SiGe HBT also exhibits excellent thermal properties, as required from an electro-thermal reliability perspective. Taken together, these results strongly suggest that at the limits of scaling, robust, and manufacturable SiGe HBTs designed for room temperature operation are likely to achieve THz speeds. View full abstract»

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  • Modeling MOSFET Drain Current Non-Gaussian Distribution With Power-Normal Probability Density Function

    Publication Year: 2014 , Page(s): 154 - 156
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (4062 KB) |  | HTML iconHTML  

    In this letter, a family of power-normal probability density functions is proposed for the asymmetric non-Gaussian distribution of drain current. The results of the proposed methodology are compared against both statistical silicon data and SPICE model Monte Carlo simulation results. Excellent agreement is observed for the power-normal distribution with order of 2. With this proposed distribution, drain current at non-Gaussian high-sigma tail can be predicted by only median and variance extracted from statistical data of a small set of samples (e.g., 1 k). For the first time, a simple analytic model is presented to capture memory read current non-Gaussian tail distribution near -6σ or even beyond, which is a major challenge in memory design for 28 nm technology node and below. View full abstract»

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  • Analysis of Correlated Gate and Drain Random Telegraph Noise in Post-Soft Breakdown TiN/HfLaO/ {\rm SiO}_{x} nMOSFETs

    Publication Year: 2014 , Page(s): 157 - 159
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (569 KB) |  | HTML iconHTML  

    We investigate correlated gate (IG) and drain (ID) random telegraph noise phenomena observed in post breakdown regime on nMOSFET TiN/HfLaO/ SiOx gate-stacks. We observe two different IG-ID correlation patterns (i.e., of the same and opposite polarities) that we attributed to charge trapping into oxygen vacancy traps of different kinds located in the SiOx close to the Si/SiOx interface. Results reported in this letter provide useful information for improving the understanding of IG/ID RTN phenomena and its impact on the reliability of post-SBD nanometer MOSFETs. View full abstract»

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  • Energy Distribution of Positive Charges in {\rm Al}_{2}{\rm O}_{3}{\rm GeO}_{2}/{\rm Ge} pMOSFETs

    Publication Year: 2014 , Page(s): 160 - 162
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (459 KB) |  | HTML iconHTML  

    The high hole mobility of Ge makes it a strong candidate for end of roadmap pMOSFETs and low interface states have been achieved for the Al2O3-GeO2-Ge gate-stack. This structure, however, suffers from significant negative bias temperature instability (NBTI), dominated by positive charge (PC) in Al2O3/GeO2. An in-depth understanding of the PCs will assist in the minimization of NBTI and the defect energy distribution will provide valuable information. The energy distribution also provides the effective charge density at a given surface potential, a key parameter required for simulating the impact of NBTI on device and circuit performance. For the first time, this letter reports the energy distribution of the PC in Al2O3/GeO2 on Ge. It is found that the energy density of the PC has a clear peak near Ge Ec at the interface and a relatively low level between Ec and Ev. Below Ev at the interface, it increases rapidly and screens 20% of the Vg rise. View full abstract»

    Open Access
  • A Novel Micromachined AlGaN/GaN Power HEMT With Air-Bridged Matrix Heat Redistribution Layer Design

    Publication Year: 2014 , Page(s): 163 - 165
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (646 KB) |  | HTML iconHTML  

    This letter develops a thermally stable micromachined AlGaN/GaN high electron mobility transistor (HEMT) on an Si substrate with an air-bridged heat redistribution layer design. After removal of the Si substrate beneath the HEMT, a significant breakdown voltage improvement was observed. The drain and source terminals were arranged as the matrix type. The 3 μm-thick Au was adopted for terminals connection and current redistribution layer of the proposed power cell. Compared with the traditional multi-fingers layout, the current density was doubled. In addition, the self-heating phenomenon of power cell was also suppressed by the removal of the substrate and air-bridged matrix layouts. View full abstract»

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  • Uniform-Base InP/GaInAsSb DHBTs Exhibiting f_{\rm MAX}/f_{\rm T}>635/420~{\rm GHz}

    Publication Year: 2014 , Page(s): 166 - 168
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (693 KB) |  | HTML iconHTML  

    Type-II InP/GaInAsSb-based double heterojunction bipolar transistors (DHBTs) with fMAX=636 GHz and a simultaneous fT=424 GHz were realized with a 20-nm-thick compositionally uniform quaternary GaInAsSb base and a 125-nm InP collector. The GaInAsSb alloy exhibits superior electron and hole transport properties compared with GaAsSb, resulting in improved device performance. The present transistors offer the highest fMAX to date for GaInAsSb DHBTs and match the highest fMAX of any Sb-based DHBT. View full abstract»

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  • Performance of Cu-Plating Vertical LEDs in Heat Dissipation Using Diamond-Like Carbon

    Publication Year: 2014 , Page(s): 169 - 171
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (540 KB) |  | HTML iconHTML  

    Performance in heat dissipation of Cu-plating type vertical GaN light-emitting diodes (CVLEDs) with a diamond like carbon (DLC) layer was investigated at various injection current levels. Through the incorporation of DLC, the CVLED with DLC exhibits a high heat dissipating ability, where the DLC-CVLEDs can be handled at an ultrahigh injection current of 2000 mA and reach an output power of 620 mW. In addition, the thermal resistance of the CVLED with DLC calculated by surface temperature data at 1400 mA injection current was 34% lower than that of CVLED without DLC, which clearly indicated that the benefit of using DLC layer on improvement of heat dissipation will be more significant as a higher current is injected. View full abstract»

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  • MSM Varactor Diodes Based on {\rm In}_{0.7}{\rm Ga}_{0.3}{\rm As} HEMTs With Cut-Off Frequency of 908 GHz

    Publication Year: 2014 , Page(s): 172 - 174
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (473 KB) |  | HTML iconHTML  

    Metal-semiconductor-metal varactor diodes were realized on the 2-D electron gas (2DEG) of an In0.7Ga0.3As HEMT structure. The electrical performances, such as capacitance switching ratio (Cmax/Cmin) and cutoff frequency (fo), were determined by using S-parameters measurements up to 40 GHz. Devices with 130-nm gate length and a gate distance of 2 μm exhibited a cutoff frequency (fo) of 908 GHz and a capacitance switching ratio of 1.4. The corresponding figure of merit, which is defined as fo·Cmax/Cmin, was 1.29 THz. View full abstract»

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  • High-Voltage and Low-Leakage-Current Gate Recessed Normally-Off GaN MIS-HEMTs With Dual Gate Insulator Employing PEALD- {\rm SiN}_{x} /RF-Sputtered- {\rm HfO}_{2}

    Publication Year: 2014 , Page(s): 175 - 177
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (695 KB) |  | HTML iconHTML  

    To fabricate gate recessed normally-off AlGaN/GaN metal-insulator-semiconductor high electron mobility transistors, we have employed a novel SiNx/HfO2 dual gate insulator. A plasma enhanced atomic layer deposition (PEALD) technique was used for very thin high quality SiNx (5 nm) as an interfacial layer followed by RF-sputtered HfO2 as a high- k dielectric for the second gate insulator structure. The PEALD SiNx interfacial layer effectively suppresses the forward gate leakage current and the current collapse. We have achieved excellent characteristics such as large threshold voltage of 1.65 V, high breakdown voltage of 900 V, extremely small off-state drain leakage current less than 10-9 A/mm and high ON/OFF drain current ratio of ~ 109, low on-state resistance of 1.84 mΩ·cm2, and small subthreshold slope of 85 mV/decade. View full abstract»

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  • A Test Structure to Characterize Nano-Scale Ohmic Contacts in III-V MOSFETs

    Publication Year: 2014 , Page(s): 178 - 180
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (799 KB) |  | HTML iconHTML  

    We propose and demonstrate a novel test structure to characterize the electrical properties of nano-scale metal-semiconductor contacts. The structure is in essence a two-port transmission line model (TLM) with contacts in the nanometer regime. Unlike the conventional TLM, two types of Kelvin measurements are possible. When performed on devices with different contact spacing, this allows the extraction of the contact resistance, the semiconductor sheet resistance, and the metal sheet resistance. For this, a 2-D distributed resistive network model has been developed. We demonstrate this technique in Mo/n+-InGaAs contacts with contact lengths from 19 to 450 nm where we have measured an average contact resistivity of 0.69±0.3 Ω·μm2. For relatively long contacts , this corresponds to an extremely small contact resistance of 6.6±1.6 Ω·μm. View full abstract»

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  • RF and DC Analysis of Stressed InGaAs MOSFETs

    Publication Year: 2014 , Page(s): 181 - 183
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (529 KB) |  | HTML iconHTML  

    A complete reliability study of the DC and RF characteristics for InGaAs nMOSFETs with Al2O3/HfO2 dielectric is presented. The main stress variation at high frequencies is related to a threshold voltage shift, whereas no decrease is found in the maximum of the cutoff frequency and RF transconductance. Constant gate stress leads to a charge build up causing a threshold voltage shift. Furthermore, electron trapping at the drain side degrades the performance after hot carrier stress. The maximum DC transconductance is reduced following constant gate bias stress, by an increase in charge trapping at border defects. These border defects at the channel/high-κ interface are filled by cold carrier trapping when the transistor is turned on, whereas they do not respond at high frequencies. View full abstract»

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  • Large On-Current Enhancement in Hetero-Junction Tunnel-FETs via Molar Fraction Grading

    Publication Year: 2014 , Page(s): 184 - 186
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (486 KB) |  | HTML iconHTML  

    We propose to employ a grading of the molar fraction in the source region of III-V hetero-junction tunnel-FETs as a means to improve the on-current without degrading the subthreshold swing. Our full quantum simulations show that the molar-fraction grading increases the on-current by enlarging the hole wave function penetration from the source to the channel region. We also compare the performance of graded AlGaSb/InAs tunnel FETs and InAs MOSFETs and show that at VDS=0.3 V, the tunnel device can outperform the MOSFET in terms of both on-current and subthreshold slope. View full abstract»

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  • A 2T Dual Port Capacitor-Less DRAM

    Publication Year: 2014 , Page(s): 187 - 189
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1067 KB) |  | HTML iconHTML  

    A novel two-transistor (2T) dual port capacitor-less DRAM concept based on bulk floating body is demonstrated for the first time in this letter. The read operation can be performed without disturbance of refresh or write. A novel read method is proposed to improve device performance especially at high temperature. Experimental results show a refresh cycle time of 1.28 s, an initial memory window of 192.84 μA/μm, and an initial signal sensing margin of 112.75 μA/μm with ±5 sigma variations at 85°C. The 2T cell is very promising for high-speed, low-power, and low-cost embedded DRAM application. View full abstract»

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  • Improvement of Bottom Oxide Thickness Scaling of Inter-Poly Dielectric by Floating Gate Top Plasma Nitridation

    Publication Year: 2014 , Page(s): 190 - 192
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2707 KB) |  | HTML iconHTML  

    This letter concerns the electrical properties of floating gate (FG) that has undergone top nitridation, used in NAND flash memory devices As the dimensions are scaled down to 5 nm and beyond, the use of a thinner inter-poly dielectric (IPD) can provide the required gate coupling ratio, leaving more room for the control gate poly filling between the FG. However, the effect of the IPD scaling on data retention capability is the main bottleneck. Two interesting retention failure phenomena are demonstrated in a sample of thin bottom poly oxide (BPO). They are attributed to the enhanced degradation of the electrical field at the top corners of the FG and the potential difference between neighboring FG along the WL direction. These phenomena must be taken into consideration while setting the limits of the BPO in the IPD film scheme. The proposed FG top nitridation overcomes this limitation on the thinning of the bottom oxide improving the data retention characteristics of NAND flash memory devices. View full abstract»

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  • Unified Analytical Model for Switching Behavior of Magnetic Tunnel Junction

    Publication Year: 2014 , Page(s): 193 - 195
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (292 KB) |  | HTML iconHTML  

    The switching time of the magnetic tunnel junction for spin-transfer torque magnetoresistive random access memory is investigated as a function of the current. We present a unified analytical model for switching time so that the problem of discontinuity around the critical current is solved. The suggested unified model shows excellent agreement with the experimental data of parallel/antiparallel states simultaneously. Furthermore, only one set of parameters is used to represent all switching regime in our model. View full abstract»

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  • A Self-Compliant One-Diode-One-Resistor Bipolar Resistive Random Access Memory for Low Power Application

    Publication Year: 2014 , Page(s): 196 - 198
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (862 KB) |  | HTML iconHTML  

    In this letter, a self-compliant one-diode-one-resistor (1D1R) bipolar resistive random access memory (RRAM) has been demonstrated. By inserting a Ni/AlOy/n+-Si diode cell, a bipolar RRAM (TiN/HfOx/Ni) with a self-compliance current of 10 μA is achieved. This 1D1R memory cell exhibits excellent performance, such as high ON/OFF resistance ratio , good reproducibility and retention ( at 100 °C), and improved resistance distribution. And more importantly, by setting a lower SET applied voltage in the 1D1R cell, a reduced compliance current can be implemented, leading to a lower RESET voltage/current. View full abstract»

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  • Ultrathin Metal/Amorphous-Silicon/Metal Diode for Bipolar RRAM Selector Applications

    Publication Year: 2014 , Page(s): 199 - 201
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1259 KB) |  | HTML iconHTML  

    We propose a novel metal/silicon/metal (MSM) selector using ultrathin undoped amorphous silicon (a-Si) for resistive-RAM selector application. The new selector behaves as a bidirectional diode, showing a high current drive (~2.2 MA/cm)2, high selectivity (~240 for 1/2 bias), fast switching speed , and excellent endurance ( at target drive current). The doping-free a-Si structure alleviates the dopant-induced variability concerns for ultrascaled devices and eliminates the need for a dopant-activation anneal. Circuit simulations show feasibility of 1-Mb array, with over 25% read margin and 70% write margin, when using the new MSM structure as a selector for a HfO2-based resistive switching memory element. View full abstract»

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  • Novel Defects-Trapping {\rm TaO}_{\rm X}/{\rm HfO}_{\rm X} RRAM With Reliable Self-Compliance, High Nonlinearity, and Ultra-Low Current

    Publication Year: 2014 , Page(s): 202 - 204
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (660 KB) |  | HTML iconHTML  

    The dependence of resistive switching of Ta/TaOX/HfOX device governed by general filamentary or novel defects-trapping mechanism on the operation current is demonstrated in this letter. The device with stable resistive switching, high nonlinearity, and robust self-compliance ~ 1 μA is demonstrated, which can be integrated in the vertical RRAM structure. Based on constant current density switching ( ~ 103 A/cm2) governed by defects-trapping transport, where the low and high resistance states attributed to the resistance of Ta/TaOX layer and device initial state, the switching current reduction by scaling down the cell size is proposed in transition metal oxide RRAM. View full abstract»

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  • Total Ionizing Dose Retention Capability of Conductive Bridging Random Access Memory

    Publication Year: 2014 , Page(s): 205 - 207
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (344 KB) |  | HTML iconHTML  

    Resistance switching memory devices based on cation transport through an electrolyte and redox reactions at the electrodes have been implemented in a commercial memory technology known as conductive bridging random access memory (CBRAM). In this letter, the number of bit errors and variations in the supply current of CBRAM circuits exposed to ionizing radiation is investigated and compared with common memory technologies. The results indicate that even after exposure to high levels of ionizing radiation, CBRAM devices show no degradation in memory retention, which suggests that the technology has high reliability capability when compared with existing nonvolatile memory solutions. View full abstract»

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  • Nanobattery Effect in RRAMs—Implications on Device Stability and Endurance

    Publication Year: 2014 , Page(s): 208 - 210
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1495 KB) |  | HTML iconHTML  

    The impact of the recently discovered nanobattery effect on the switching, the endurance, and the retention of resistive random access memory devices is demonstrated. We show that the relaxation of the electromotive force voltage may lead to a shift of the resistance level for high resistive states, which is included into device modeling. Based on the extended memristive device model, which accounts for the nanobattery effects, endurance and retention problems can be explained. View full abstract»

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  • A SPICE Model of Resistive Random Access Memory for Large-Scale Memory Array Simulation

    Publication Year: 2014 , Page(s): 211 - 213
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1226 KB) |  | HTML iconHTML  

    A SPICE model of oxide-based resistive random access memory (RRAM) for dc and transient behaviors is developed based on the conductive filament evolution model and is implemented in large-scale array simulation. The simulations of one transistor-one resistor RRAM array up to 16 kb with wire resistance (Rwire) and capacitance (Cwire) indicate that: 1) resistance-capacitance delay during RESET and leakage current during SET have significant impact on write operations; 2) with array size enlarging, the power dissipation increases during RESET but decreases during SET; and 3) the increased Rwire and Cwire lead to the degradation of high resistance state and the fluctuation of low resistance state, respectively. View full abstract»

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  • Optimized Lightning-Rod Effect to Overcome Trade-Off Between Switching Uniformity and On/Off Ratio in ReRAM

    Publication Year: 2014 , Page(s): 214 - 216
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (525 KB) |  | HTML iconHTML  

    For uniform switching of resistive random access memory, narrower physical switching gap between an electrode and remained conducting filament can be an effective method, which also leads to degradation of ON/OFF ratio. To overcome a trade-off between the switching uniformity and the ON/OFF ratio, an additional layer was intentionally inserted. Consequently, improved uniformity of switching parameters was achieved without degradation of the ON/OFF ratio. View full abstract»

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  • Tri-Resistive Switching Behavior of Hydrogen Induced Resistance Random Access Memory

    Publication Year: 2014 , Page(s): 217 - 219
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (565 KB) |  | HTML iconHTML  

    In this letter, the special role of hydrogen ions in hafnium doped silicon oxide resistive random access memory (RRAM) is presented. In addition to the more typical oxygen ion-dominated resistive switching, hydrogen ions were also observed to trigger a resistance transformation phenomenon, producing a tri-resistive device. Unlike a normal RRAM device, a hydrogen plasma-treated device is operated with a reversed voltage polarity, and the direction of hydrogen ion migration results in the chemical bonds breaking and repairing. By changing the voltage polarity and stop voltage, this tri-resistive behavior can be achieved. This particular hydrogen-induced switching behavior suggests a different RRAM switching mechanism and is finally explained by our model. View full abstract»

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IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron devices.

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Amitava Chatterjee