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# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 66
• ### Front cover

Publication Year: 2014, Page(s): C1
| PDF (363 KB)
• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2014, Page(s): C2
| PDF (149 KB)

Publication Year: 2014, Page(s):217 - 219
| PDF (165 KB)
• ### A warm welcome to a new T-ED Editor

Publication Year: 2014, Page(s): 220
| PDF (310 KB) | HTML
• ### Foreword Special Issue on Compact Modeling of Emerging Devices

Publication Year: 2014, Page(s):221 - 224
| | PDF (258 KB) | HTML

The 13 papers in this special issue focus on compact modeling of emerging devices. View full abstract»

• ### Compact Models and the Physics of Nanoscale FETs

Publication Year: 2014, Page(s):225 - 233
Cited by:  Papers (27)
| | PDF (1194 KB) | HTML

The device physics of nanoscale MOSFETs is related to traditional compact models. Beginning with the virtual source model, a model for nanoscale MOSFETs expressed in traditional form, we show how the Landauer approach gives a clear physical interpretation to the parameters in the model. The analysis shows that transport in the channel is limited by diffusion near the virtual source both below and ... View full abstract»

• ### BSIM6: Analog and RF Compact Model for Bulk MOSFET

Publication Year: 2014, Page(s):234 - 244
Cited by:  Papers (30)
| | PDF (1957 KB) | HTML

BSIM6 is the latest industry-standard bulk MOSFET model from the BSIM group developed specially for accurate analog and RF circuit designs. The popular real-device effects have been brought from BSIM4. The model shows excellent source-drain symmetry during both dc and small signal analysis, thus giving excellent results during analog and RF circuit simulations, e.g., harmonic balance simulation. T... View full abstract»

• ### RF-Noise Modeling in Advanced CMOS Technologies

Publication Year: 2014, Page(s):245 - 254
Cited by:  Papers (11)
| | PDF (1590 KB) | HTML

RF circuit design in deep-submicrometer CMOS technologies relies heavily on accurate modeling of thermal noise. Based on Nyquist's law, predictive modeling of thermal noise in MOSFETs was possible for a long time, provided that parasitic resistances and short-channel effects were properly accounted for. In sub-100-nm technologies, however, microscopic excess noise starts to play a significant role... View full abstract»

• ### Compact Modeling of SOI MOSFETs With Ultrathin Silicon and BOX Layers

Publication Year: 2014, Page(s):255 - 265
Cited by:  Papers (3)
| | PDF (1938 KB) | HTML

The reported compact SOI-MOSFET model hiroshima university starc igfet model-silicon on thin buried oxide (HiSIM-SOTB) has been developed for devices with ultrathin silicon on insulator (SOI) and buried oxide (BOX) layers. The potential distribution determined by the Poisson equation is accurately solved with the Newton iteration method across the SOI layer and in the substrate on the backside of ... View full abstract»

• ### Compact Modeling and Contact Effects in Thin Film Transistors

Publication Year: 2014, Page(s):266 - 277
Cited by:  Papers (12)
| | PDF (1007 KB) | HTML

A compact model for the current-voltage characteristics of organic thin-film transistors (OTFTs), which includes the effects of the contact regions, is proposed. Different physical and morphological aspects of contacts with organic or other emerging materials such as graphene, semiconducting dichalcogenides such as MoS2, or NW devices are described. The electrical behavior of the contacts is studi... View full abstract»

• ### Compact DC Modeling of Organic Field-Effect Transistors: Review and Perspectives

Publication Year: 2014, Page(s):278 - 287
Cited by:  Papers (28)
| | PDF (1639 KB) | HTML

In spite of impressive improvements achieved for organic field-effect transistors (OFETs), there is still a lack of theoretical understanding of their behaviors. Furthermore, it is challenging to develop a universal model that would cover a huge variety of materials and device structures available for state-of-the-art OFETs. Nonetheless, currently there is a strong need for specific OFET compact m... View full abstract»

• ### Compact Model for Short-Channel Junctionless Accumulation Mode Double Gate MOSFETs

Publication Year: 2014, Page(s):288 - 299
Cited by:  Papers (33)
| | PDF (2081 KB) | HTML

A 2-D closed form, analytical compact model for long- and short-channel junctionless accumulation mode double gate MOSFETs is presented. The physics-based 2-D model for the potential is derived with the help of Poisson's equation and the conformal mapping technique by Schwarz-Christoffel. From this closed-form solution, we derive simple equations for the calculation of the threshold voltage VT and... View full abstract»

• ### SPICE Modeling of Double-Gate Tunnel-FETs Including Channel Transports

Publication Year: 2014, Page(s):300 - 307
Cited by:  Papers (22)
| | PDF (1063 KB) | HTML

SPICE modeling of double-gate (DG) tunnel FETs (TFETs) including channel transports is reported. An ideal drain current model neglecting the channel transport is developed first. It captures the interband tunneling characteristics, describes their geometry dependences, and is suitable for DG TFETs with limited drivability. The ideal current model and previously proposed charge model are then exten... View full abstract»

• ### Compact Model for Ultrathin Low Electron Effective Mass Double Gate MOSFET

Publication Year: 2014, Page(s):308 - 313
Cited by:  Papers (5)
| | PDF (1320 KB) | HTML

We present a core compact model for undoped, high mobility, and low density of states materials in a double gate device architecture. Analytical equations for calculating current and charge are presented in a drift-diffusion compact modeling framework. This model accurately handles both Fermi-Dirac statistics and bias-dependent diffusivity. The results from analytical equations are validated again... View full abstract»

• ### A Compact Model for Generic MIS-HEMTs Based on the Unified 2DEG Density Expression

Publication Year: 2014, Page(s):314 - 323
Cited by:  Papers (9)
| | PDF (2070 KB) | HTML

In this paper, the 2-D electron gas density (ns) and Fermi level (Ef) analytical expressions as an explicit function of the terminal biases that covers the strong- and moderate-inversion and subthreshold regions and scalable with physical parameters are developed. It is validated by the comparison with the (exact) numerical solutions for different device parameters, in which ... View full abstract»

• ### Compact Modeling of Nanoscale Trapezoidal FinFETs

Publication Year: 2014, Page(s):324 - 332
Cited by:  Papers (10)
| | PDF (4620 KB) | HTML

An analytical compact model for the drain current of undoped or lightly doped nanoscale FinFETs with trapezoidal cross section is proposed. The compact model of rectangular FinFETs is extended to trapezoidal FinFETs using equivalent nonplanar device parameters and corner effects. The model has been validated by comparing the results with those of 3-D numerical device simulations. The very good acc... View full abstract»

• ### Floating-Body Effect in Partially/Dynamically/Fully Depleted DG/SOI MOSFETs Based on Unified Regional Modeling of Surface and Body Potentials

Publication Year: 2014, Page(s):333 - 341
Cited by:  Papers (1)
| | PDF (2066 KB) | HTML

A compact terminal current/charge model for partially/dynamically/fully depleted (PD)/(DD)/(FD) double-gate (DG) and silicon-on-insulator (SOI) MOSFETs with floating-body (FB) effect based on unified regional modeling of the surface and body potentials is presented. The model accurately describes the physical behavior of the impact-ionization current that gives rise to the hump in the C-V characte... View full abstract»

• ### Modeling of Distance-Dependent Mismatch and Across-Chip Variations in Semiconductor Devices

Publication Year: 2014, Page(s):342 - 350
Cited by:  Papers (2)
| | PDF (595 KB) | HTML

We present a simple and general method of modeling distance-dependent mismatch and across-chip variations (ACV). We are able to model various shapes of spatial correlation of a process/device/circuit parameter exactly in a compact device model. Examples include Gaussian and exponential types of spatial correlations. There are no grid points, groups, and brackets in our method. The resulting spatia... View full abstract»

• ### Analysis of Carrier Transport in Short-Channel MOSFETs

Publication Year: 2014, Page(s):351 - 358
Cited by:  Papers (12)
| | PDF (1159 KB) | HTML

A method for extracting transport parameters in short-channel FETs is presented in the context of the Lundstrom model for quasi-ballistic short-channel FETs. The parameters extracted from measured data are unidirectional thermal velocity, critical length, and mean free path at low and high drain biases. The method is based on an analysis of the channel length dependence of apparent mobility and vi... View full abstract»

• ### Investigation of the Subthreshold Swing in Vertical Tunnel-FETs Using ${\rm H}_{2}$ and ${\rm D}_{2}$ Anneals

Publication Year: 2014, Page(s):359 - 364
Cited by:  Papers (8)
| | PDF (2538 KB) | HTML

This paper analyzes both experimentally and by simulation the impact of traps on the transfer characteristics of tunnel-FETs (TFETs). The interface trap density in vertical heterojunction TFETs is varied by annealing in hydrogen or deuterium ambient. We show that a high-interface trap density (~2×1012/cm2) results in a peak current in the device transfer characteristic... View full abstract»

• ### Measurements of Process Variability in 40-nm Regular and Nonregular Layouts

Publication Year: 2014, Page(s):365 - 371
Cited by:  Papers (2)
| | PDF (1353 KB) | HTML

As technology scales down, IC design is becoming more difficult due to the increase in process variations, which translates into a dispersion of circuit parameter values thus degrading manufacturing yield. Regular layouts are recommended to reduce variability with the cost of area overhead with respect to conventional layouts. The aim of this paper is to measure the impact of variability in two im... View full abstract»

• ### Modeling of Thermoelectric Effects in Phase Change Memory Cells

Publication Year: 2014, Page(s):372 - 378
Cited by:  Papers (15)
| | PDF (1683 KB) | HTML

Thermoelectric effects on phase change memory elements are computationally analyzed through 2-D rotationally symmetric finite-element simulations of reset operation on a Ge2Sb2Te5 (GST) mushroom cell with 10-nm critical dimension. Temperature-dependent material parameters are used to determine the thermoelectric contributions at the junctions (Peltier heat) and wit... View full abstract»

• ### Impacts of 3-D Integration Processes on Memory Retention Characteristics in Thinned DRAM Chip for High-Reliable 3-D DRAM

Publication Year: 2014, Page(s):379 - 385
Cited by:  Papers (6)
| | PDF (2354 KB) | HTML

The impacts of 3-D integration processes on memory retention characteristics in thinned DRAM chip were evaluated. The retention characteristics of DRAM cell in a DRAM chip which was face-down bonded to an interposer with under-fill degraded depending on the decreased chip thickness, especially dramatically degraded below 40- μm thickness. Meanwhile, the retention characteristics of DRAM cel... View full abstract»

• ### Discrete Dopant Impurity Scattering in $p$ -Channel Silicon Nanowire Transistors: A $k.p$ Approach

Publication Year: 2014, Page(s):386 - 393
Cited by:  Papers (2)
| | PDF (1462 KB) | HTML

In this paper, we present the results of a numerical study on the influence of discrete dopant atom distribution and crystal orientation on the electrical characteristics of p-channel silicon nanowire-based transistors using 3-D quantum simulations. The valence band was modeled employing a three-band k.p Hamiltonian with optimized Lüttinger parameters, while the device characteristics were... View full abstract»

• ### An Improvement of the Capacitance–Voltage Method to Determine the Band Offsets in a-Si:H/c-Si Heterojunctions

Publication Year: 2014, Page(s):394 - 399
Cited by:  Papers (4)
| | PDF (1275 KB) | HTML

Due to the strong inversion layer at the c-Si interface, there may be errors in the determination of the band offsets in a-Si:H/c-Si heterojunctions from the usual capacitance-voltage (C-V) method. Considering the charge effect in the strong inversion layer, the theoretical differential capacitance in (n+) a-Si:H/(p) c-Si heterojunctions at high frequency is developed. The calculated re... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy