# IEEE Transactions on Components, Packaging and Manufacturing Technology

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Displaying Results 1 - 25 of 27
• ### [Front cover]

Publication Year: 2013, Page(s): C1
| PDF (308 KB)
• ### IEEE Transactions on Components, Packaging and Manufacturing Technology publication information

Publication Year: 2013, Page(s): C2
| PDF (122 KB)

Publication Year: 2013, Page(s):1989 - 1990
| PDF (131 KB)
• ### Our Thanks to Reviewers IEEE Transactions on Components, Packaging and Manufacturing Technology

Publication Year: 2013, Page(s):1991 - 1993
| PDF (64 KB)
• ### Thermally Conductive MgO-Filled Epoxy Molding Compounds

Publication Year: 2013, Page(s):1994 - 2005
Cited by:  Papers (2)
| | PDF (3264 KB) | HTML

The use of magnesium oxide (MgO) as a filler in an epoxy molding compound (EMC) was considered to identify the maximum thermal conductivity that could be achieved without compromising rheological or processing control and processing flexibility. MgO is an attractive candidate filler for EMCs used in automotive and other applications because MgO is inexpensive, electrically insulative, has relative... View full abstract»

• ### Fabrication of Micro-Polymer Lenses With Spacers Using Low-Cost Wafer-Level Glass-Silicon Molds

Publication Year: 2013, Page(s):2006 - 2013
Cited by:  Papers (3)
| | PDF (837 KB) | HTML

A novel low-cost molding process to prepare polymer-based micro-lens arrays with spacers for optical applications was investigated in this paper. The process consists of the following steps: 1) hemispherical glass bubble arrays, used as the upper part of the molds, was prepared by combining a hot-forming process and a chemical-foaming process; 2) the silicon mold, used as the lower part of the mol... View full abstract»

• ### Performance Comparison of Flip-Chip-Assembled 5-GHz 0.18- $mu{rm m}$ CMOS Power Amplifiers on Different Packaging Substrates

Publication Year: 2013, Page(s):2014 - 2021
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In this paper, three 5-GHz power amplifiers (PAs) are presented, which were implemented in 0.18- μm CMOS technology on different package substrates using flip-chip assembly. To make a fair comparison, the three PAs use the same circuit topology and transistor peripherals. The first case is a fully on-chip integrated CMOS PA with on-chip inductors. The second case uses low-temperature cofire... View full abstract»

• ### Wafer-Level Packaging Design With Through Substrate Grooves as Interconnection for GaAs-Based Image Sensor

Publication Year: 2013, Page(s):2022 - 2028
Cited by:  Papers (2)
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A wafer-level packaging design for GaAs-based image sensor is presented. Key processes, such as GaAs/glass wafer bonding, GaAs substrate thinning, through substrate grooves (TSGs) fabrication, redistribution layer formation, polymer passivation, and laser jet bumping, are examined and characterized. GaAs image sensor package with 64 leads is successfully fabricated on 4-in thinned GaAs/glass test ... View full abstract»

• ### Explaining Nondestructive Bond Stress Data From High-Temperature Testing of Au-Al Wire Bonds

Publication Year: 2013, Page(s):2029 - 2036
Cited by:  Papers (7)
| | PDF (2419 KB) | HTML

The application of an alternative method of bond monitoring during high-temperature aging is reported using a custom made test chip with piezoresistive integrated CMOS microsensors located around test bond pads. The sensor detects radial stresses originating from the bond pad and can resolve changes because of intermetallic compound (IMC) formation, voiding, or crack formation at the bond interfac... View full abstract»

• ### Interconnect Reliability Characterization of a High-Density 3-D Chip-on-Chip Interconnect Technology

Publication Year: 2013, Page(s):2037 - 2047
Cited by:  Papers (9)
| | PDF (2075 KB) | HTML

This paper investigates the solder interconnect reliability of a high-density 3-D chip-on-chip technology under an accelerated thermal cycling (ATC) test condition through finite element (FE) modeling and experimental validation. The fabrication of the 3-D chip-on-chip technology is accomplished with a two-step gap control bonding process to minimize the solder squeezing phenomenon. The alternativ... View full abstract»

• ### Reduced Power Precision Temperature Control Using Variable Conductance Heat Pipes

Publication Year: 2013, Page(s):2048 - 2058
Cited by:  Papers (1)
| | PDF (1232 KB) | HTML

This paper assesses the use of variable conductance heat pipes (VCHPs) for reduced-power precision temperature control of photonics components. When subambient cooling is not required we consider only a VCHP and where it is required we consider a VCHP-thermoelectric module (TEM) assembly. In the former case, the setpoint of the component mounted to the VCHP is 70°C and a range of heat loads... View full abstract»

• ### Prospects of Thin-Film Thermoelectric Devices for Hot-Spot Cooling and On-Chip Energy Harvesting

Publication Year: 2013, Page(s):2059 - 2067
Cited by:  Papers (7)
| | PDF (1064 KB) | HTML

Advances in thin-film thermoelectric (TE) materials have created opportunities for using TE devices in high heat flux applications such as hot-spot (H-S) cooling and on-chip energy harvesting. In this paper, we compare the performance of TE modules integrated directly on the silicon die with those that are attached to the heat spreader of the chip package. We make use of the Bi2Te3... View full abstract»

• ### The Study of the Polydispersivity Effect on the Thermal Conductivity of Particulate Thermal Interface Materials by Finite Element Method

Publication Year: 2013, Page(s):2068 - 2074
Cited by:  Papers (1)
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Thermal interface materials (TIMs) are particulate composite materials widely used in the microelectronics industry to reduce the thermal resistance between the device and the heat sink. Predictive modeling using fundamental physical principles is critical to developing new TIMs, since it can be used to quantify the effect of polydispersivity, volume fraction and arrangements on the effective ther... View full abstract»

• ### Study of Response Surface Methodology in Thermal Optimization Design of Multichip Modules

Publication Year: 2013, Page(s):2075 - 2080
Cited by:  Papers (4)
| | PDF (1229 KB) | HTML

A 3-D model of multichip module (MCM) is built with ANSYS and the temperature field distribution is studied. A regression equation describing the relationship of structure parameters and material properties with the maximum chip junction temperature of MCM is made, which integrates the response surface methodology and ANSYS. Quantitative analysis of the effect of four design parameters on the maxi... View full abstract»

• ### Signal Integrity-Aware Virtual Prototyping of Field Bus-Based Embedded Systems

Publication Year: 2013, Page(s):2081 - 2091
Cited by:  Papers (4)
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In this paper, we introduce a modeling methodology for field bus-based embedded systems that allows dynamic evaluation of their signal integrity characteristics at the virtual prototyping step. Our methodology is based on the following criteria: 1) a signal integrity-aware I/O interface mixed model; 2) a physical model of transmission lines to estimate signal degradation caused by the bus lines; a... View full abstract»

• ### Localized Planar EBG Structure of CSRR for Ultrawideband SSN Mitigation and Signal Integrity Improvement in Mixed-Signal Systems

Publication Year: 2013, Page(s):2092 - 2100
Cited by:  Papers (8)
| | PDF (4148 KB) | HTML

In this paper, a power plane with localized planar electromagnetic bandgap (EBG) structure is designed for suppressing simultaneous switching noise (SSN) in mixed-signal systems. Nonbianisotropic complementary split ring resonator with a bandgap behavior is used to constitute the EBG cells, which are partially located on the power plane to prohibit the noise propagation within the board. An equiva... View full abstract»

• ### Parallel Transient Simulation of Package/Board Power Distribution Networks Based on a 2-D Overlapping Partitioning Methodology

Publication Year: 2013, Page(s):2101 - 2112
Cited by:  Papers (2)
| | PDF (1439 KB) | HTML

Typical SPICE models for characterization of package/board power distribution networks (PDNs) are based on a 2-D discretization of the Helmholtz wave equation and hence require high computational costs. In this paper, a novel waveform relaxation (WR) algorithm for the parallelizable simulation of PDNs is presented. The key feature of this paper is the development of a 2-D partitioning methodology ... View full abstract»

• ### Theoretical Study on the Rank of Integral Operators for Broadband Electromagnetic Modeling From Static to Electrodynamic Frequencies

Publication Year: 2013, Page(s):2113 - 2126
Cited by:  Papers (12)
| | PDF (1741 KB) | HTML

To facilitate the broadband modeling of integrated electronic and photonic systems from static to electrodynamic frequencies, we propose an analytical approach to study the rank of the integral operator for electromagnetic analysis, which is valid for an arbitrarily shaped object with an arbitrary electric size. With this analytical approach, we theoretically prove that for a prescribed error boun... View full abstract»

• ### Loss Performance of Planar Interconnects on FR-4 Up to 67 GHz

Publication Year: 2013, Page(s):2127 - 2133
Cited by:  Papers (2)
| | PDF (707 KB) | HTML

This paper shows the performance of planar transmission lines (TLs) on a multilayer stack-up with a flame resistant-4 (FR-4)-based core up to 67 GHz. These lines will be used as interconnects to integrate a CMOS circuit with an antenna fabricated on FR-4 for a low-cost system-in-package solution. The attenuation characteristics of coplanar waveguide (CPW), grounded coplanar waveguide (GCPW), and m... View full abstract»

• ### Capacitance Calculation for Via Structures Using an Integral Equation Method Based on Partial Capacitance

Publication Year: 2013, Page(s):2134 - 2146
Cited by:  Papers (5)
| | PDF (1123 KB) | HTML

In this paper, a new integral equation formulation for via structures is developed for the capacitance extraction between vias and planes. The formulation is initially developed for axially symmetric geometries and then extended to axially asymmetric geometries by changing the circular ring cells to arc cells. The extended method can be used to calculate the shared-antipad via structure, which is ... View full abstract»

• ### Broadband Microwave Frequency Characterization of 3-D Printed Materials

Publication Year: 2013, Page(s):2147 - 2155
Cited by:  Papers (39)
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3-D printing allows increased design flexibility in the fabrication of microwave circuits and devices and is reaching a level of maturity that allows for functional parts. Little is known about the RF and microwave properties of the standard materials that have been developed for 3-D printing. This paper measures a wide variety of materials over a broad spectrum of frequencies from 1 MHz to 10 GHz... View full abstract»

• ### Ultrasonic-Assisted Thermocompression Bonding Method of Solder Anisotropic Conductive Film Joints for Reliable Camera Module Packaging

Publication Year: 2013, Page(s):2156 - 2163
| | PDF (1793 KB) | HTML

In this paper, to improve the reliability of anisotropic conductive film (ACF) joints in the camera module packaging without any mechanical damages, ultrasonic-assisted thermocompression (TC) bonding was investigated using solder ACFs. This technology uses small lateral-direction ultrasonic vibration during the TC ACF bonding to break solder oxide layers for sufficient solder wetting on the electr... View full abstract»

• ### Joint Quality Affected by Electrode Contact Condition During Resistance Spot Welding

Publication Year: 2013, Page(s):2164 - 2173
Cited by:  Papers (3)
| | PDF (1971 KB) | HTML

The effects of electrical resistance at the workpiece-electrode contact surface or the electrode face on the joint quality, characterized by nugget shape, temperature, cooling rate, and solute concentration responsible for microstructure of the fusion zone during resistance spot welding (RSW), are systematically investigated. The model accounts for electromagnetic force, heat generation due to con... View full abstract»

• ### Microelectromechanical Systems (MEMS) Resistive Heaters as Circuit Protection Devices

Publication Year: 2013, Page(s):2174 - 2179
Cited by:  Papers (1)
| | PDF (1048 KB) | HTML

With increased opportunities for the exploitation (i.e., reverse engineering) of vulnerable electronic components and systems, circuit protection has become a critical issue. Circuit protection techniques are generally software-based and include cryptography (encryption/decryption), obfuscation of codes, and software guards. Examples of hardware-based circuit protection include protective coatings... View full abstract»

• ### 2013 Index IEEE Transactions on Components, Packaging and Manufacturing Technology Vol. 3

Publication Year: 2013, Page(s):2180 - 2220
| PDF (808 KB)

## Aims & Scope

IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging.

Full Aims & Scope

## Meet Our Editors

Managing Editor
R. Wayne Johnson
Auburn University