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Biomedical Circuits and Systems, IEEE Transactions on

Issue 5 • Date Oct. 2013

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  • Table of contents

    Page(s): C1 - C4
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  • IEEE Transactions on Biomedical Circuits and Systems publication information

    Page(s): C2
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  • Guest Editorial—Special Issue on Selected Papers From BioCAS 2012

    Page(s): 561 - 562
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  • A Fully-Asynchronous Low-Power Implantable Seizure Detector for Self-Triggering Treatment

    Page(s): 563 - 572
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    In this paper, we present a new asynchronous seizure detector that is part of an implantable integrated device intended to identify electrographic seizure onset and trigger a focal treatment to block the seizure progression. The proposed system has a low-power front-end bioamplifier and a seizure detector with intelligent mechanism to reduce power dissipation. This system eliminates the unnecessary clock gating during normal neural activity monitoring mode and reduces power dissipation in the seizure detector; as a result, this device is suitable for long-term implantable applications. The proposed system includes analog and digital building blocks with programmable parameters for extracting electrographic seizure onset information from real-time EEG recordings. Sensitivity of the detector is enhanced by optimizing the variable parameters based on specific electrographic seizure onset activities of each patient. The detection algorithm was validated using Matlab tools and implemented in standard 0.13 μm CMOS process with total die area of 1.5×1.5 mm2. The fabricated chip is validated offline using intracranial EEG recordings from two patients with refractory epilepsy. Total power consumption of the chip is 9 μW and average detection delay is 13.7 s after seizure onset, well before the onset of clinical manifestation. The proposed system achieves an accurate detection performance with 100% sensitivity and no false alarms during the analyses of 15 seizures and 19 non-seizure datasets. View full abstract»

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  • A 155 /spl mu/W 88-dB DR Discrete-Time /spl Delta/ /spl Sigma/ Modulator for Digital Hearing Aids Exploiting a Summing SAR ADC Quantizer

    Page(s): 573 - 582
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    This paper presents a low-power switched-capacitor ΔΣ modulator for digital hearing-aid applications that features a novel summing successive approximation (SAR). The summing SAR performs multi-bit quantization together with the analog addition required in feed-forward (FF) ΔΣ modulator (ΔΣM) topologies, with no attenuation of the input signals and no need for amplifiers. The prototype is implemented in a 0.18- μm CMOS technology and its measurements demonstrate a dynamic range of 88 dB in 10 kHz bandwidth while consuming 155 μW from a 1.8 V supply. The combined use of passive addition and SAR quantization reduces the complexity and power consumption of the modulator. The summing SAR ADC quantizer results in a calculated power saving of 40% when compared to a multi-bit FF ΔΣM using active addition and flash quantization. View full abstract»

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  • A 0.7-V 17.4-/spl mu/W 3-Lead Wireless ECG SoC

    Page(s): 583 - 592
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    This paper presents a fully integrated sub-1 V 3-lead wireless ECG System-on-Chip (SoC) for wireless body sensor network applications. The SoC includes a two-channel ECG front-end with a driven-right-leg circuit, an 8-bit SAR ADC, a custom-designed 16-bit microcontroller, two banks of 16 kb SRAM, and a MICS band transceiver. The microcontroller and SRAM blocks are able to operate at sub-/near-threshold regime for the best energy consumption. The proposed SoC has been implemented in a standard 0.13- μm CMOS process. Measurement results show the microcontroller consumes only 2.62 pJ per instruction at 0.35 V . Both microcontroller and memory blocks are functional down to 0.25 V. The entire SoC is capable of working at single 0.7-V supply. At the best case, it consumes 17.4 μW in heart rate detection mode and 74.8 μW in raw data acquisition mode under sampling rate of 500 Hz. This makes it one of the best ECG SoCs among state-of-the-art biomedical chips. View full abstract»

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  • Opto-$mu{rm ECoG}$ Array: A Hybrid Neural Interface With Transparent $mu{rm ECoG}$ Electrode Array and Integrated LEDs for Optogenetics

    Page(s): 593 - 600
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    Electrocorticogram (ECoG) recordings, taken from electrodes placed on the surface of the cortex, have been successfully implemented for control of brain machine interfaces (BMIs). Optogenetics, direct optical stimulation of neurons in brain tissue genetically modified to express channelrhodopsin-2 (ChR2), enables targeting of specific types of neurons with sub-millisecond temporal precision. In this work, we developed a BMI device, called an Opto- μECoG array, which combines ECoG recording and optogenetics-based stimulation to enable multichannel, bi-directional interactions with neurons. The Opto- μECoG array comprises two sub-arrays, each containing a 4 × 4 distribution of micro-epidural transparent electrodes (~200 μm diameter) and embedded light-emitting diodes (LEDs) for optical neural stimulation on a 2.5×2.5 mm2 footprint to match the bilateral hemispherical area of the visual cortex in a rat. The transparent electrodes were fabricated with indium tin oxide (ITO). Parylene-C served as the main structural and packaging material for flexibility and biocompatibility. Optical, electrical, and thermal characteristics of the fabricated device were investigated and in vivo experiments were performed to evaluate the efficacy of the device. View full abstract»

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  • Massively-Parallel Neuromonitoring and Neurostimulation Rodent Headset With Nanotextured Flexible Microelectrodes

    Page(s): 601 - 609
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    We present a compact wireless headset for simultaneous multi-site neuromonitoring and neurostimulation in the rodent brain. The system comprises flexible-shaft microelectrodes, neural amplifiers, neurostimulators, a digital time-division multiplexer (TDM), a micro-controller and a ZigBee wireless transceiver. The system is built by parallelizing up to four 0.35 μm CMOS integrated circuits (each having 256 neural amplifiers and 64 neurostimulators) to provide a total maximum of 1024 neural amplifiers and 256 neurostimulators. Each bipolar neural amplifier features 54 dB-72 dB adjustable gain, 1 Hz-5 kHz adjustable bandwidth with an input-referred noise of 7.99 μVrms and dissipates 12.9 μW. Each current-mode bipolar neurostimulator generates programmable arbitrary-waveform biphasic current in the range of 20-250 μA and dissipates 2.6 μW in the stand-by mode. Reconfigurability is provided by stacking a set of dedicated mini-PCBs that share a common signaling bus within as small as 22×30×15 mm3 volume. The system features flexible polyimide-based microelectrode array design that is not brittle and increases pad packing density. Pad nanotexturing by electrodeposition reduces the electrode-tissue interface impedance from an average of 2 MΩ to 30 kΩ at 100 Hz. The rodent headset and the microelectrode array have been experimentally validated in vivo in freely moving rats for two months. We demonstrate 92.8 percent seizure rate reduction by responsive neurostimulation in an acute epilepsy rat model. View full abstract»

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  • A Compact, Low Input Capacitance Neural Recording Amplifier

    Page(s): 610 - 620
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    Conventional capacitively coupled neural recording amplifiers often present a large input load capacitance to the neural signal source and hence take up large circuit area. They suffer due to the unavoidable trade-off between the input capacitance and chip area versus the amplifier gain. In this work, this trade-off is relaxed by replacing the single feedback capacitor with a clamped T-capacitor network. With this simple modification, the proposed amplifier can achieve the same mid-band gain with less input capacitance, resulting in a higher input impedance and a smaller silicon area. Prototype neural recording amplifiers based on this proposal were fabricated in 0.35 μm CMOS, and their performance is reported. The amplifiers occupy smaller area and have lower input loading capacitance compared to conventional neural amplifiers. One of the proposed amplifiers occupies merely 0.056 mm2. It achieves 38.1-dB mid-band gain with 1.6 pF input capacitance, and hence has an effective feedback capacitance of 20 fF. Consuming 6 μW, it has an input referred noise of 13.3 μVrms over 8.5 kHz bandwidth and NEF of 7.87. In-vivo recordings from animal experiments are also demonstrated. View full abstract»

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  • Rapid Detection of E. coli Bacteria Using Potassium-Sensitive FETs in CMOS

    Page(s): 621 - 630
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    A novel integrated system for the detection of live bacteria in less than 10 minutes is presented. It utilizes the specificity of bacteriophages as biological detection elements with the sensitivity of integrated ion-selective field-effect transistors (ISFETs) implemented in conventional 0.18 μm CMOS with additional post-processes PVC-based potassium-sensitive membrane to provide a rapid, low-cost bacteria detection platform. Experimental methods to cancel ISFET non-idealities as well as data processing techniques to enhance detection capability of the bacteria sensor are demonstrated. Three groups of experimental results are provided using four strains of E. coli with two bacteriophages at two different temperatures. Measurements incorporating positive and negative control experiments are presented that successfully exhibit sensor specificity as well detection capability. View full abstract»

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  • Neuron Array With Plastic Synapses and Programmable Dendrites

    Page(s): 631 - 642
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    We describe a novel neuromorphic chip architecture that models neurons for efficient computation. Traditional architectures of neuron array chips consist of large scale systems that are interfaced with AER for implementing intra- or inter-chip connectivity. We present a chip that uses AER for inter-chip communication but uses fast, reconfigurable FPGA-style routing with local memory for intra-chip connectivity. We model neurons with biologically realistic channel models, synapses and dendrites. This chip is suitable for small-scale network simulations and can also be used for sequence detection, utilizing directional selectivity properties of dendrites, ultimately for use in word recognition. View full abstract»

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  • CMOS Spectrally-Multiplexed FRET-on-a-Chip for DNA Analysis

    Page(s): 643 - 654
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    A spectral-multiplexed fluorescence contact imaging microsystem for DNA analysis is presented. The microsystem integrates a filterless CMOS Color PhotoGate (CPG) sensor that exploits the polysilicon gate as an optical filter, and therefore does not require an external color filter. The CPG is applied to fluorescence-based transduction in a spectrally multiplexed format by differentiating among multiple emission bands, hence replacing the functionality of a bank of emission filters. A microsystem has been quantitatively modeled and prototyped based on the CPG fabricated in a standard 0.35 μm CMOS technology. The multi-color imaging capability of the microsystem in analyzing DNA targets has been validated in the detection of marker gene sequences for spinal muscular atropy disease and Escherichia coli (E. coli). Spectral-multiplexing enables the two DNA targets to be simultaneously detected with a measured detection limits of 240 nM and 210 nM for the two target concentrations at a sample volume of 10 μL for the green and red transduction channels, respectively. View full abstract»

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  • Camera Phone-Based Quantitative Analysis of C-Reactive Protein ELISA

    Page(s): 655 - 659
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    We demonstrate the use of a camera phone as a low-cost optical detector for quantitative analysis of a high-sensitivity C-reactive protein (hs-CRP) enzyme-linked immunosorbent assay (ELISA). The camera phone was used to acquire images of the ELISA carried out in a conventional 96 well plate. Colorimetric analysis of the images was used to determine a standard curve that exhibited excellent agreement with a fitted 4-parameter logistic model (R2=0.998). The limit of detection (LOD) for this approach was determined to be 0.026±0.002 μg/ml (1.035±0.079 μM) CRP. Furthermore, these results were found to be in very close agreement with measurements obtained for the same assay using a laboratory-based instrument. These findings indicate the basic technology to enable low-cost quantitative home-based monitoring of an important clinical biomarker of inflammatory disease may already be present in the patient's home. View full abstract»

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  • A 0.18 \mu {\rm m} Biosensor Front-End Based on 1/f Noise, Distortion Cancelation and Chopper Stabilization Techniques

    Page(s): 660 - 673
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    This paper presents a novel sensor front-end circuit that addresses the issues of 1/f noise and distortion in a unique way by using canceling techniques. The proposed front-end is a fully differential transimpedance amplifier (TIA) targeted for current mode electrochemical biosensing applications. In this paper, we discuss the architecture of this canceling based front-end and the optimization methods followed for achieving low noise, low distortion performance at minimum current consumption are presented. To validate the employed canceling based front-end, it has been realized in a 0.18 μm CMOS process and the characterization results are presented. The front-end has also been tested as part of a complete wireless sensing system and the cyclic voltammetry (CV) test results from electrochemical sensors are provided. Overall current consumption in the front-end is 50 μA while operating on a 1.8 V supply. View full abstract»

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  • Capacitive-Coupling-Based Information Transmission System for Implantable Devices: Investigation of Transmission Mechanism

    Page(s): 674 - 681
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    Many medical electronic devices that can be implanted deep inside the body have been developed recently. These devices are designed to transmit the information that is collected inside the body to receiving antennas outside the body. In this work, we examine a method that uses a high-frequency current in the transmitting electrodes of the implanted device for the transmission of information to receiving electrodes attached to the body surface. To investigate the transmission mechanism and the factors that determines the optimum frequency, the output voltage V2 and the input and output impedance (Zin and Zout) were analyzed by conducting a finite-difference time-domain electromagnetic simulation. The results clearly show that the receiving part (electrodes and wire), including biological tissue, acts as a loop antenna. The maximum V2 value was obtained at the first parallel resonance frequency of Zout at 370 MHz under a load resistance of 1 MΩ. In contrast, the output current of the source increased at the series resonance frequency of Zin. The series resonance frequency could be adjusted to move a target frequency by adding an inductance between the source and the transmitting electrodes. View full abstract»

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  • Impedance Measurement System for Determination of Capacitive Electrode Coupling

    Page(s): 682 - 689
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    Capacitive electrodes have been studied as an alternative to gel electrodes, as they allow measurement of biopotentials without conductive contact with the patient. However, because the skin interface is not as precisely defined as with gel electrodes, this could lead to signal deformation and misdiagnoses. Thus, measurement of a capacitive coupling of the electrodes may allow to draw conclusions about the applicability of such systems. In addition, combining capacitive biosignal sensing with an impedance measurement unit may enable bioimpedance measurements, from which additional information on the hydration status can be extracted. A prototype system is introduced which measures impedance over capacitive electrodes in parallel with biopotential measurements. Also presented are the first results on characterization of the skin electrode coupling achieved with the system. View full abstract»

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  • 15-nW Biopotential LPFs in 0.35- \mu{\rm m} CMOS Using Subthreshold-Source-Follower Biquads With and Without Gain Compensation

    Page(s): 690 - 702
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    Most biopotential readout front-ends rely on the g m- C lowpass filter (LPF) for forefront signal conditioning. A small g m realizes a large time constant ( τ = C / g m) suitable for ultra-low-cutoff filtering, saving both power and area. Yet, the noise and linearity can be compromised, given that each g m cell can involve one or several noisy and nonlinear V- I conversions originated from the active devices. This paper proposes the subthreshold-source-follower (SSF) Biquad as a prospective alternative. It features: 1) a very small number of active devices reducing the noise and nonlinearity footsteps; 2) No explicit feedback in differential implementation, and 3) extension of filter order by cascading. This paper presents an in-depth treatment of SSF Biquad in the nW-power regime, analyzing its power and area tradeoffs with gain, linearity and noise. A gain-compensation (GC) scheme addressing the gain-loss problem of NMOS-based SSF Biquad due to the body effect is also proposed. Two 100-Hz 4th-order Butterworth LPFs using the SSF Biquads with and without GC were fabricated in 0.35- μm CMOS. Measurement results show that the non-GC (GC) LPF can achieve a DC gain of -3.7 dB (0 dB), an input-referred noise of 36 μV rms (29 μV rms ), a HD3@60 Hz of -55.2 dB ( - 60.7 dB) and a die size of 0.11 mm2 (0.08 mm2). Both LPFs draw 15 nW at 3 V. The achieved figure-of-merits (FoMs) are favorably comparable with the state-of-the-art. View full abstract»

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  • A Highly Linear Fully Integrated Powerline Filter for Biopotential Acquisition Systems

    Page(s): 703 - 712
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    Powerline interference is one of the most dominant problems in detection and processing of biopotential signals. This work presents a new fully integrated notch filter exhibiting high linearity and low power consumption. High filter linearity is preserved utilizing active-RC approach while IC implementation is achieved through replacing passive resistors by R-2R ladders achieving area saving of approximately 120 times. The filter design is optimized for low power operation using an efficient circuit topology and an ultra-low power operational amplifier. Fully differential implementation of the proposed filter shows notch depth of 43 dB (78 dB for 4th-order) with THD of better than -70 dB while consuming about 150 nW from 1.5 V supply. View full abstract»

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  • Simultaneous Neural and Movement Recording in Large-Scale Immersive Virtual Environments

    Page(s): 713 - 721
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    Virtual reality (VR) allows precise control and manipulation of rich, dynamic stimuli that, when coupled with on-line motion capture and neural monitoring, can provide a powerful means both of understanding brain behavioral relations in the high dimensional world and of assessing and treating a variety of neural disorders. Here we present a system that combines state-of-the-art, fully immersive, 3D, multi-modal VR with temporally aligned electroencephalographic (EEG) recordings. The VR system is dynamic and interactive across visual, auditory, and haptic interactions, providing sight, sound, touch, and force. Crucially, it does so with simultaneous EEG recordings while subjects actively move about a 20×20 ft2 space. The overall end-to-end latency between real movement and its simulated movement in the VR is approximately 40 ms. Spatial precision of the various devices is on the order of millimeters. The temporal alignment with the neural recordings is accurate to within approximately 1 ms. This powerful combination of systems opens up a new window into brain-behavioral relations and a new means of assessment and rehabilitation of individuals with motor and other disorders. View full abstract»

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  • A 1.5 ns OFF/ON Switching-Time Voltage-Mode LVDS Driver/Receiver Pair for Asynchronous AER Bit-Serial Chip Grid Links With Up to 40 Times Event-Rate Dependent Power Savings

    Page(s): 722 - 731
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    This paper presents a low power fast ON/OFF switchable voltage mode implementation of a driver/receiver pair intended to be used in high speed bit-serial Low Voltage Differential Signaling (LVDS) Address Event Representation (AER) chip grids, where short (like 32-bit) sparse data packages are transmitted. Voltage-Mode drivers require intrinsically half the power of their Current-Mode counterparts and do not require Common-Mode Voltage Control. However, for fast ON/OFF switching a special high-speed voltage regulator is required which needs to be kept ON during data pauses, and hence its power consumption must be minimized, resulting in tight design constraints. A proof-of-concept chip test prototype has been designed and fabricated in low-cost standard 0.35 μm CMOS. At ±500 mV voltage swing with 500 Mbps serial bit rate and 32 bit events, current consumption scales from 15.9 mA (7.7 mA for the driver and 8.2 mA for the receiver) at 10 Mevent/s rate to 406 μA ( 343 μA for the driver and 62.5 μA for the receiver) for an event rate below 10 Kevent/s, therefore achieving a rate dependent power saving of up to 40 times, while keeping switching times at 1.5 ns. Maximum achievable event rate was 13.7 Meps at 638 Mbps serial bit rate. Additionally, differential voltage swing is tunable, thus allowing further power reductions. View full abstract»

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  • IEEE Transactions on Biomedical Circuits and Systems information for authors

    Page(s): 732
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  • IEEE Transactions on Biomedical Circuits and Systems society information

    Page(s): C3
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Aims & Scope

IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) publishes peer-reviewed manuscripts reporting original and transformative research at the intersection between the life sciences and circuits and systems engineering principles.

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Meet Our Editors

Editor-in-Chief
Gert Cauwenberghs
University of California at San Diego