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IEEE Design & Test

Issue 3 • Date June 2013

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Displaying Results 1 - 22 of 22
  • [Front cover]

    Publication Year: 2013, Page(s): C1
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  • While the world benefi s from what's new, ieee can focus you on what's next [advertisement]

    Publication Year: 2013, Page(s): C2
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  • [Masthead]

    Publication Year: 2013, Page(s): 1
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  • Table of contents

    Publication Year: 2013, Page(s): 2
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  • Departments [Table of Contents]

    Publication Year: 2013, Page(s): 3
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  • A look at our industry's challenges

    Publication Year: 2013, Page(s):4 - 5
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  • Protection Against Hardware Trojan Attacks: Towards a Comprehensive Solution

    Publication Year: 2013, Page(s):6 - 17
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1016 KB) | HTML iconHTML

    With the increasing disintegration of the design and manufacturing chain of our microelectronic products, we should not only worry about including unintentional, unwanted hardware features (“bugs”), but also about including intentional malicious hardware features: “Trojan Horses,”which act as spies or terrorists. This article provides an overview of hardware Trojans and... View full abstract»

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  • Exploiting Multiple Mahalanobis Distance Metrics to Screen Outliers From Analog Product Manufacturing Test Responses

    Publication Year: 2013, Page(s):18 - 24
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (339 KB) | HTML iconHTML

    Mahalanobis distance is commonly used for fault classification in analogue testing. However, it cannot guarantee a robust mean value and covariance matrix, which makes it an unreliable metric in the presence of outliers. In this case study the authors therefore work with a multi-variate classifier based on multiple Mahalanobis distances from selected sets of test-response measurements. For an indu... View full abstract»

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  • Expedited-compact architecture for average scan power reduction

    Publication Year: 2013, Page(s):25 - 33
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (626 KB) | HTML iconHTML

    In expedited-compact scan, the output response of the STUMPS channels is smartly compacted without the overhead of the full-scan chain-shift operation, thereby reducing the scan mode power. The authors propose suitable integration with other scan compression methods. View full abstract»

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  • An Optical BILBO for Online Testing of Embedded Systems

    Publication Year: 2013, Page(s):34 - 48
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1605 KB) | HTML iconHTML

    This paper discusses an online testing strategy based on BIST approaches where a novel optical built-in logic-block observation (OBILBO) register was proposed. The OBILBO is similar to the conventional one in addition to optical probing capability, since novel optical probes (OPs) are considered in its architecture. Preliminary simulation results show that, for duplex system cases, fault detection... View full abstract»

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  • Automatic Calibration of Streaming Applications for Software Mapping Exploration

    Publication Year: 2013, Page(s):49 - 58
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (728 KB) | HTML iconHTML

    This article investigates how to construct fast and accurate MPSoC virtual platforms to enable software mapping exploration. The proposed framework can fully automate the calibration of abstract MPSoC virtual platforms for mapping streaming applications. View full abstract»

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  • XML-Based Hierarchical Description of 3D Systems and SIP

    Publication Year: 2013, Page(s):59 - 69
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (485 KB) | HTML iconHTML

    This paper discusses the complexity of integration of dies from multiple semiconductor manufacturers in 3D stacks with each die providing different functionality, e.g., analog, digital, RF, etc. The authors show how an XMLbased infrastructure for data representation and sharing facilitates the efficient exchange of data, thus easing the challenges of 3D integration, due to the fact that XML is an ... View full abstract»

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  • A Designer's Guide to Subresolution Lithography: Enabling the Impossible to Get to the 14-nm Node [Tutorial]

    Publication Year: 2013, Page(s):70 - 92
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3683 KB) | HTML iconHTML

    Device scaling with manufacturing methods that overcome the inherent limits of optical lithography is a constant focus of the microelectronics industry. The authors of this tutorial article review the state-of-the-art and major challenges of subresolution lithography, and discuss modern double-patterning lithography solutions and supporting EDA tools to surpass them. View full abstract»

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  • IEEE Global History Network - IEEE Was Here

    Publication Year: 2013, Page(s): 93
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  • An Introduction to Mixed-Signal IC Test & Measurement [Book Review]

    Publication Year: 2013, Page(s):94 - 96
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  • CEDA Currents

    Publication Year: 2013, Page(s):97 - 98
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  • IEEE Educational Activities [advertisement]

    Publication Year: 2013, Page(s): 99
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  • Test Technology TC Newsletter

    Publication Year: 2013, Page(s):100 - 101
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  • IEEE Xplore Digital Library

    Publication Year: 2013, Page(s): 102
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  • Don't forget test! [design-for-test]

    Publication Year: 2013, Page(s):103 - 104
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  • [Back inside cover]

    Publication Year: 2013, Page(s): C3
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  • [Back cover]

    Publication Year: 2013, Page(s): C4
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Aims & Scope

IEEE Design & Test offers original works describing the models, methods and tools used to design and test microelectronic systems from devices and circuits to complete systems-on-chip and embedded software. The magazine focuses on current and near-future practice, and includes tutorials, how-to articles, and real-world case studies. The magazine seeks to bring to its readers not only important technology advances but also technology leaders, their perspectives through its columns, interviews and roundtable discussions. Topics include semiconductor IC design, semiconductor intellectual property blocks, design, verification and test technology, design for manufacturing and yield, embedded software and systems, low-power and energy efficient design, electronic design automation tools, practical technology, and standards.  

It was published as IEEE Design & Test of Computers between 1984 and 2012.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Joerg Henkel
Chair for Embedded Systems (CES)
Karlsruhe Institute of Technology (KIT)