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# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 47

Publication Year: 2013, Page(s):C1 - 2442
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2013, Page(s): C2
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• ### A Warm Welcome to a New T-ED Editor

Publication Year: 2013, Page(s): 2443
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• ### Low-Field Behavior of Source-Gated Transistors

Publication Year: 2013, Page(s):2444 - 2449
Cited by:  Papers (8)
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A physical description of low-field behavior of a Schottky source-gated transistor (SGT) is outlined where carriers crossing the source barrier by thermionic emission are restricted by JFET action in the pinch-off region at the drain end of the source. This mode of operation leads to transistor characteristics with low saturation voltage and high output impedance without the need for field relief ... View full abstract»

• ### Characterization of RF-MOSFETs in Common-Source Configuration at Different Source-to-Bulk Voltages From S-Parameters

Publication Year: 2013, Page(s):2450 - 2456
Cited by:  Papers (7)
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Using a new test fixture that allows us to bias the bulk terminal through an additional compensated DC probe, a two-port S-measurement-based methodology to characterize RF-MOSFETs in common-source configuration is herein presented. In addition to obtaining S-parameters at different bulk-to-source voltages using a single two-port configured test-fixture, the proposal allows the analysis of the elec... View full abstract»

• ### Interface Trap Density of Gate-All-Around Silicon Nanowire Field-Effect Transistors With TiN Gate: Extraction and Compact Model

Publication Year: 2013, Page(s):2457 - 2463
Cited by:  Papers (7)
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Si/SiO2 interface trap charge distribution of cylindrical cross-sectioned gate-all-around silicon nanowire field-effect transistor is extracted by using three-dimensional simulation. While the interface chemistry of conventional gatestack ( Si/SiO2 polysilicon) in conventional planar devices is well documented, not much work is available on interface trap distribution Dit of ... View full abstract»

• ### Tunable Bandgap in Bilayer Armchair Graphene Nanoribbons: Concurrent Influence of Electric Field and Uniaxial Strain

Publication Year: 2013, Page(s):2464 - 2470
Cited by:  Papers (4)
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In this paper, the effect of uniaxial strain on the electronic properties of bilayer armchair graphene nanoribbons (BLAGNRs) is theoretically investigated for the first time. Our calculations based on density functional theory (DFT) reveal the tunable nature of the electronic properties of BLAGNRs with the application of uniaxial strain. We further explore the simultaneous effect of perpendicular ... View full abstract»

• ### Complementary Role of Field and Temperature in Triggering ON/OFF Switching Mechanisms in ${rm Hf}/{rm HfO}_{2}$ Resistive RAM Cells

Publication Year: 2013, Page(s):2471 - 2478
Cited by:  Papers (23)
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We present an investigation on the role of temperature and electric field as driving forces in the initiation of the resistive switching processes. The impact of temperature in both on- and off-states is analyzed in detail, using an electrothermal numerical model formulation. dc and pulsed temperature-dependent data, collected on scaled crossbar test structure cells, serially connected with an on-... View full abstract»

• ### The Effect of Germanium Fraction on High-Field Band-to-Band Tunneling in ${rm p}^{+}$-SiGe/${rm n}^{+}$-SiGe Junctions in Forward and Reverse Biases

Publication Year: 2013, Page(s):2479 - 2484
Cited by:  Papers (3)
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The dependence of band-to-band tunneling in p+-Si1-xGex/n+-Si1-xGex homojunctions on Ge fraction and electric field is investigated in the range 2-3×108 V/m. Negative differential resistance (NDR) in forward bias is observed for each device with the highest peak tunneling-current density of 8.2 kA/cm2 without any postannealing step. Reverse-biased... View full abstract»

• ### Interplay Between Process-Induced and Statistical Variability in 14-nm CMOS Technology Double-Gate SOI FinFETs

Publication Year: 2013, Page(s):2485 - 2492
Cited by:  Papers (26)
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This paper presents a comprehensive simulation study of the interactions between long-range process and short-range statistical variability in a 14-nm technology node silicon-on-insulator FinFET. First, the individual and combined impact of the relevant variability sources, including random discrete dopants, fin line edge roughness (LER), gate LER, and metal gate granularity are studied for the no... View full abstract»

• ### Experimental Comparison Between Trigate p-TFET and p-FinFET Analog Performance as a Function of Temperature

Publication Year: 2013, Page(s):2493 - 2497
Cited by:  Papers (26)
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This paper presents, for the first time, the experimental comparison between the p-type trigate FinFET and trigate p-TFET analog performances for devices fabricated on the same wafer. A careful analysis of the electrical characteristics is performed to choose the best bias conditions for the analog comparison between these devices. A higher intrinsic voltage gain is obtained for p-TFET devices bec... View full abstract»

• ### Wideband Impedance Model for Coaxial Through-Silicon Vias in 3-D Integration

Publication Year: 2013, Page(s):2498 - 2504
Cited by:  Papers (17)
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Coaxial through-silicon via (TSV) is a promising 3-D integration solution, which can offer lower coupling with its surrounding environment and achieve better electromagnetic compatibility and signal integrity than other TSV structures. In this paper, an analytical wideband equivalent circuit model is proposed for the impedance modeling of coaxial TSVs in 3-D integration. Closed-form formulas for c... View full abstract»

• ### New Analysis Method for Time-Dependent Device-To-Device Variation Accounting for Within-Device Fluctuation

Publication Year: 2013, Page(s):2505 - 2511
Cited by:  Papers (14)
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Variability of nanometer-size devices is a major challenge for circuit design. Apart from the as-fabricated variability, the postfabrication degradation introduces a time-dependent variability, originating from statistical distribution of charge location and number. The existing characterization techniques do not always capture the maximum degradation. Some of them does not separate the device-to-... View full abstract»

• ### Sub-60-nm Extremely Thin Body ${rm In}_{x}{rm Ga}_{1-x}{rm As}$-On-Insulator MOSFETs on Si With Ni-InGaAs Metal S/D and MOS Interface Buffer Engineering and Its Scalability

Publication Year: 2013, Page(s):2512 - 2517
Cited by:  Papers (21)
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We report the operation of sub-60-nm deeply scaled InGaAs- and InAs-on-insulator (-OI) MOSFETs on Si substrates with MOS interface buffer engineering and Ni-InGaAs metal source/drain (S/D). InAs-OI MOSFETs provide 400% Ion enhancement, compared with an In0.53Ga0.47As control device with the same drain-induced-barrier-lowering (DIBL) of 100 mV/V, which is attributable to the m... View full abstract»

• ### Scalable Virtual-Ground Multilevel-Cell Floating-Gate Flash Memory

Publication Year: 2013, Page(s):2518 - 2524
Cited by:  Papers (2)
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An adequate gate coupling ratio (GCR) and compensation for floating-gate to floating-gate (FG-to-FG) coupling interference must be maintained to enable further scaling of virtual-ground multilevel-cell (MLC) FG flash memory. A high GCR of 0.6 is obtained using a novel bowl-shaped FG structure cell technology without sacrificing cell size. Increasing the GCR is important for reducing FG-to-FG coupl... View full abstract»

• ### 2-D Compact Model for Drain Current of Fully Depleted Nanoscale GeOI MOSFETs for Improved Analog Circuit Design

Publication Year: 2013, Page(s):2525 - 2531
Cited by:  Papers (6)
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Compact models for MOS devices are extremely useful as they can be incorporated in circuit simulators with sufficient accuracy. We present for the first time a 2-D surface-potential-based compact model for the drain current of nanoscale germanium-on-insulator (GeOI) MOSFETs including the interface-trapped and fixed-oxide charge densities at both front- and back-gates. The proposed drain current mo... View full abstract»

• ### Minority Carrier Transport and Their Lifetime in InGaAs/GaAsP Multiple Quantum Well Structures

Publication Year: 2013, Page(s):2532 - 2536
Cited by:  Papers (2)
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Minority carrier transport across InGaAs/GaAsP multiple quantum wells is studied by measuring the response of p-i-n and n-i-p GaAs solar cell structures. It is observed that the spectral response depends critically upon the width of the GaAsP barriers and the device polarity. Electron tunneling is not as efficient as hole tunneling due to a higher conduction band barrier. The spectral response dep... View full abstract»

• ### Hydrogenated IGZO Thin-Film Transistors Using High-Pressure Hydrogen Annealing

Publication Year: 2013, Page(s):2537 - 2541
Cited by:  Papers (13)
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Hydrogenation of thin-film indium-gallium-zincoxide (IGZO) is carried out by applying a high-pressure hydrogen annealing (HPHA) process under 5-atm pressure at different temperatures of 260°C, 270°C, and 280°C. The HPHA effectively increases the carrier concentration and the Hall mobility up to ~ 1019 cm-3 and ~ 6.4 cm2/Vs, respectively. The HP... View full abstract»

• ### Solution-Processed Logic Gates Based On Nanotube/Polymer Composite

Publication Year: 2013, Page(s):2542 - 2547
Cited by:  Papers (4)
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Hysteresis-free logic gates capable of operation at 100 kHz are fabricated basing on local-gate thin-film transistors with their channel featuring solution-processed composite films of single-walled carbon nanotubes (SWCNTs) and poly(9,9-dioctylfluorene-co-bithiophene) (F8T2). Using dip-coating for deposition of composite films, high-density SWCNTs are found to be embedded in an F8T2 layer and thu... View full abstract»

• ### Measuring the Thermal Resistance in Light Emitting Diodes Using a Transient Thermal Analysis Technique

Publication Year: 2013, Page(s):2548 - 2555
Cited by:  Papers (5)
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We explore a modified thermal resistance analysis by induced transient method applied to light emitting diodes (LEDs) to discretize the junction-to-package thermal resistance. The temperature response of LED and package configuration is evaluated for discrete contributions from identifiable spatial domains in the multilayered device and package structure to obtain their thermal resistances and the... View full abstract»

• ### Modification of a Driving Waveform in an AC Plasma Display Panel With Sc-doped MgO Protecting Layer

Publication Year: 2013, Page(s):2556 - 2560
Cited by:  Papers (1)
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In this paper, the change in addressing characteristics of an AC Plasma display panel with Sc-doped MgO protecting layer are investigated with the variation of operation temperature, addressing waiting time, and scan voltage level during address period using ramp addressing pulse. The addressing voltage in the cell which is addressed long time after reset period is higher but showed narrower distr... View full abstract»

• ### Low-Power CMOS Image Sensor Based on Column-Parallel Single-Slope/SAR Quantization Scheme

Publication Year: 2013, Page(s):2561 - 2566
Cited by:  Papers (13)
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This paper presents a low-power megapixel image sensor design. In this paper, a column-parallel 11-bit two-step quantization scheme is proposed. It consists of a 3-bit single-slope analog-to-digital converter (ADC) and an 8-bit successive approximation register (SAR) ADC. The power consumption of the column-parallel circuitry is significantly reduced when compared with the traditional single-slope... View full abstract»

• ### Characterization of the First FBK High-Density Cell Silicon Photomultiplier Technology

Publication Year: 2013, Page(s):2567 - 2573
Cited by:  Papers (31)
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In this paper, we present the results of the characterization of the first high-density (HD) cell silicon photomultipliers produced at FBK. The most advanced prototype manufactured with this technology has a cell size of 15 × 15 μm2 featuring a nominal fill factor of 48%. To reach this high area coverage, we developed a new border structure to confine the high electric-fie... View full abstract»

• ### Investigation of Photo-Induced Hysteresis and Off-Current in Amorphous In-Ga-Zn Oxide Thin-Film Transistors Under UV Light Irradiation

Publication Year: 2013, Page(s):2574 - 2579
Cited by:  Papers (11)
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We investigated the hysteresis and off-current (Ioff) of amorphous In-Ga-Zn oxide thin-film transistors illuminated by 400 nm light at various intensities. Both hysteresis and Ioff are induced by the ionized oxygen vacancy (Vo2+) that forms at the interface between the gate insulator and active layer. In our measurements, Ioff was much less than the esti... View full abstract»

• ### Characteristics of the GaAs Photoconductive Semiconductor Switch Operated in Linear-Alike Mode

Publication Year: 2013, Page(s):2580 - 2585
Cited by:  Papers (3)
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The photoconductive semiconductor switches (PCSSs) have two operating modes, i.e., linear mode and nonlinear mode (also “lock-on” mode). The low bias voltage and high trigger energy are needed when the switch is operated in a linear mode, but the high bias voltage and low trigger energy are needed when the switch is operated in a nonlinear mode. When the GaAs PCSS is triggered under ... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy