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Applied Superconductivity, IEEE Transactions on

Issue 2 • Date June 1993

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Displaying Results 1 - 5 of 5
  • Phase tree: a periodic, fractional flux quantum vernier for high-speed interpolation of analog-to-digital converters

    Page(s): 3001 - 3008
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (823 KB)  

    A Josephson junction circuit that can rapidly track and record a magnetic flux signal to a small binary fraction of the flux quantum is proposed. This so-called phase tree circuit behaves periodically, recording the residue of the signal modulo the flux quantum in 2/sup p/ths of a flux quantum for a p-level binary tree. Signal quantization is accomplished by comparators that read the 2/sup p-1/ circulating currents in the leaf-level branches, providing a total of 2/sup p/ possibilities in the periodic code. The phase tree can therefore be used as a vernier, linear over a large number of periods because a single analog element determines the quantization levels once the network is properly biased. A system consisting of a conventional m-bit analog-to-digital converter (ADC m approximately=4-7) and an auxiliary p-bit phase tree interpolator (p approximately=2-5) can achieve at least m+p-1 bits without loss of bandwidth or sample rate.<> View full abstract»

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  • Shift registers and correlators using a two-phase single-flux quantum pulse clock

    Page(s): 3009 - 3012
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    A two-phase clocking scheme for rapid single flux quantum logic circuits, in particular, shift registers and correlators, is discussed. The two-phase pulse clock is generated on chip with one external clock line. The use of a two-phase clock improves the clock operating margins and eliminate the racethrough problem. A 32-b shift register has been built and tested up to a clock frequency of 21.6 GHz. A one-bit digital correlator with 32 stages has also been tested at low speed. The chips are fabricated using a Nb process.<> View full abstract»

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  • A 2-kbit superconducting memory chip

    Page(s): 3013 - 3021
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    A 2-kb nondestructive readout memory chip has been built using an Nb/AlO/sub x//Nb Josephson-junction process with a 2.5- mu m design rule. A bitmap of 56% functional cells among 1.5 K tested cells, a read access time of 200 ps, an average cycle time of 500 ps without the decoder, and a power dissipation of 1.6 mW including peripheral circuits have been obtained. The decoding time is estimated to be 540 ps. The circuits in this 5-mm by 5-mm, 24-pin chip includes 2 K memory cells, 6-b decoder and drivers, serial-to-parallel and parallel-to-serial converters, and circuits for design of testability or timing measurements. More than 14000 junctions are used on the chip.<> View full abstract»

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  • Margin analysis of quantum flux parametron logic gates

    Page(s): 3022 - 3028
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    An analytical approach is used to estimate the (quasi-static) margins of quantum flux parametron (QFP) logic gates. The operation of a single QFP is analyzed in detail, and input biases or output variations caused by parameter fluctuations are obtained. The results are used to estimate the margins and yields of the QFP logic gates. The relations between the margin and the parameter fluctuations are obtained. The yields are estimated assuming normal distributions of the fluctuations. The calculations are consistent with experiments performed to date. The static margins of the QFP logic gates discussed here are sufficient, with presently available process technology, for medium size integrated circuits.<> View full abstract»

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  • Intrinsic stress in DC sputtered niobium

    Page(s): 3029 - 3031
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    The intrinsic mechanical stress of DC-magnetron-sputtered Nb films is characterized as a function of sputtering parameters and target erosion. The zero-stress point shifts to lower cathode voltages as the target erodes. The zero-stress point is always characterized by the same cathode-current-Ar-pressure relationship.<> View full abstract»

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IEEE Transactions on Applied Superconductivity contains articles on the applications of superconductivity and other relevant technology.

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Meet Our Editors

Editor-in-Chief
Britton L. T. Plourde
Syracuse University
bplourde@syr.edu
http://www.phy.syr.edu/~bplourde