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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Issue 10 • Oct. 1993

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Displaying Results 1 - 23 of 23
  • Comments on "Simulation of lossless symmetrical three conductor systems" by W. Guggenbuhl et al

    Publication Year: 1993, Page(s):1617 - 1619
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (296 KB)

    W. Guggenbuhl et al. (see ibid., vol.10, pp.904-910, 1991) presented an example of modeling a three-conductor interconnection system and simulating the transients with the use of the SPICE program. The commenters point out that Guggenbuhl did not reference some important publications in the area and leaves an impression that the problem of simulation of multiple, coupled, lossless transmission lin... View full abstract»

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  • A proposed method for dynamic fitting of MOS model parameters

    Publication Year: 1993, Page(s):1503 - 1507
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (428 KB)

    A method for optimization of MOS model parameters is introduced. The method is based upon dynamically fitting the measured frequency response of a reconfigurable ring oscillator. The ring oscillator contains two added switching transistors and two loading capacitors. By controlling the switching transistors, the capacitive load of the inverters and thus the oscillation frequency can be varied. The... View full abstract»

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  • Modeling of the charge balance condition on floating gates and simulation of EEPROMs

    Publication Year: 1993, Page(s):1499 - 1502
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (308 KB)

    A robust numerical model for the charge balance condition (CBC) on floating gates (FG) is presented, in which the quasi-Fermi level, instead of the potential (as in conventional models), is assumed to be a constant in the FG. By solving Poisson's equation in the FG region with an extra equation for the CBC, the accurate distribution of both potential and charge can be obtained. A quasi-stationary ... View full abstract»

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  • An adaptive timing-driven placement for high performance VLSIs

    Publication Year: 1993, Page(s):1488 - 1498
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1076 KB)

    An application of constructive successive augmentation methodology to VLSI placement under constraints on routability, area and timing is described. To improve effectiveness of decision making, the placement algorithm uses adaptive and look-ahead procedures. This methodology was implemented in the placer-router JUNE for macrocell-library-based sea-of-gates design style with over-the-cell routing. ... View full abstract»

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  • SaPOSM: an optimization method applied to parameter extraction of MOSFET models

    Publication Year: 1993, Page(s):1481 - 1487
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (524 KB)

    Points out that SaPOSM integrates an efficient deterministic optimization algorithm, called POSM, with the popular stochastic optimization paradigm simulated annealing (SA). It offers great promise for improving the optimization results significantly while using only a moderate amount of computing time. Tested on a suite of multi-minima optimization benchmark problems, SaPOSM's performance rivals ... View full abstract»

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  • An improved model for solving the optimal placement for river-routing problem

    Publication Year: 1993, Page(s):1473 - 1480
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (520 KB)

    Describes two linear-time river-routing algorithms for respectively optimizing and computing channel separation between the interior rows and columns of synthesized random-logic cells for custom module generation. The method uses river routing within the cells to virtually eliminate routing channels between the cell rows and columns while producing little or no increase in cell area. The first alg... View full abstract»

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  • Parity-scan design to reduce the cost of test application

    Publication Year: 1993, Page(s):1604 - 1611
    Cited by:  Papers (29)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (664 KB)

    Points out that scan design approach is representative of those techniques that can reduce the cost of test generation for sequential circuits. However, the length of a test sequence for the scan design approach can grow quite large due to the scan operation shifting the values into the scan chain, which makes the cost of test application large. A design-for-testability approach called parity-scan... View full abstract»

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  • Numerical simulation of optical devices

    Publication Year: 1993, Page(s):1557 - 1569
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (980 KB)

    The description of the optical-generation phenomena has been incorporated in the semiconductor-device analysis program HFIELDS, keeping the structural and geometrical flexibility of the original code. To this end a substantial effort has been devoted to the software implementation. The latter required the introduction of a number of optical windows and interleaved material layers through which a r... View full abstract»

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  • Heuristic minimization of multiple-valued relations

    Publication Year: 1993, Page(s):1458 - 1472
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1384 KB)

    An approach to minimization that is based on a state-of-the-art paradigm for the two-level minimization of functions is presented. Some special properties of relations, in contrast to functions, which must be carefully considered in realizing a high-quality procedure for solving the minimization problem are clarified. An efficient heuristic method to find an optimal sum-of-products representation ... View full abstract»

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  • Applications of one-dimensional cellular automata and linear feedback shift registers for pseudo-exhaustive testing

    Publication Year: 1993, Page(s):1580 - 1591
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (984 KB)

    Recent studies have shown that cellular automata (CA) can be used in place of linear feedback shift registers (LFSRs). Due to their regular structure and local feedback connections, VLSI layout of CA is easy and results in saving silicon area. Some properties of CAs derived using Rules 90 and 150 in terms of characteristic polynomials are presented. In particular, (a) computation of characteristic... View full abstract»

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  • On the over-specification problem in sequential ATPG algorithms

    Publication Year: 1993, Page(s):1599 - 1604
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (612 KB)

    Most sequential ATPG (automatic test pattern generation) programs employ the time-frame expansion technique. Within a time-frame, combinational test generation algorithms that are variations of D-algorithm or PODEM are used. Here, it is shown that some ATPG programs may err in identifying untestable faults. In other words, these test generators may not be able to find the test sequence for a testa... View full abstract»

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  • Berkeley reliability tools-BERT

    Publication Year: 1993, Page(s):1524 - 1534
    Cited by:  Papers (111)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (960 KB)

    Berkeley reliability tools (BERT) simulates the circuit degradation (drift) due to hot-electron degradation in MOSFETs and bipolar transistors and predicts circuit failure rates due to oxide breakdown and electromigration in CMOS, bipolar, and BiCMOS circuits. With the increasing importance of reliability in today's and future technology, a reliability simulator such as this is expected to serve a... View full abstract»

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  • Clock suppression techniques for synchronous circuits

    Publication Year: 1993, Page(s):1547 - 1556
    Cited by:  Papers (8)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (908 KB)

    A clock suppression based technique that takes advantage of the higher abstraction level provided by synchronous design techniques to improve logic simulation performance was given by the authors (see Proc. IEEE Int. Conf. on Comput. Aided Des. Integr. Circuit Syst., pp.62-65, 1990). Here, the authors elaborate on those techniques and present extensions that can offer an average performance increa... View full abstract»

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  • Microword length minimization in microprogrammed controller synthesis

    Publication Year: 1993, Page(s):1449 - 1457
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (772 KB)

    The problem of microword length minimization is crucial to the synthesis of microprogrammed controllers in digital systems. Unfortunately, this problem is NP-hard. Although various enumerative and heuristic methods have been developed, usually they cannot provide fast and efficient solutions to a large size problem. Here, the problem is formulated into a graph partitioning problem. An efficient gr... View full abstract»

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  • A novel hierarchical approach for proximity effect correction in electron beam lithography

    Publication Year: 1993, Page(s):1508 - 1514
    Cited by:  Papers (2)  |  Patents (68)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (632 KB)

    An efficient CAD pattern processing algorithm based on dose modulation technique is proposed for proximity effect correction calculation in electron beam (EB) lithography. The algorithm resolves a costly and lengthy computation during the pattern processing. First, the original pattern data with multiple-level cell hierarchy is reduced to pattern data with two-level cell hierarchy. Then, a zoning ... View full abstract»

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  • Optimal part selection

    Publication Year: 1993, Page(s):1611 - 1617
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (492 KB)

    The authors point out that part selection is the problem of choosing a set of parts that implements given functions and meets cost bounds. Multiple-function parts make globally optimal part selection an exponentially complex task. Task difficulty is compounded by optimizing among multiple cost attributes. An algorithm that generates optimal designs, and handles multiple cost attributes is presente... View full abstract»

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  • Ellipsoidal method for design centering and yield estimation

    Publication Year: 1993, Page(s):1570 - 1579
    Cited by:  Papers (39)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (772 KB)

    A method for constraint region approximation, design centering and yield estimation is introduced. Extreme points of the constraint region are identified by inscribing into it the largest possible ellipsoid. Ellipsoid center is the point that centers the design. Ellipsoidal, polytope and second order Taylor series approximation schemes to the constraint region are discussed. Accuracy and implement... View full abstract»

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  • A robust over-the-cell channel router

    Publication Year: 1993, Page(s):1592 - 1599
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (672 KB)

    An efficient algorithm for over-the-cell routing in the standard cell layout design technology is presented. Two variations are discussed: one aims to minimize the channel density with fewest tracks over the cells while the other aims to minimize the final channel width. The algorithm can fit both the two-layer and three-layer routing models. With the two-layer model, there is a single routing lay... View full abstract»

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  • Nonoscillatory streamline upwind formulations for drift-diffusion equation

    Publication Year: 1993, Page(s):1535 - 1541
    Cited by:  Papers (4)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (508 KB)

    Several representative discretization schemes for the drift-diffusion (or convection-diffusion) equation are reviewed. After the discussion of the drawbacks being inherent in the previous approaches, a discretization method named NOSU (nonoscillatory streamline upwind) for the convection-diffusion equation is developed. The NOSU approach substantially eliminates the interior and boundary layer osc... View full abstract»

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  • Multitrees with internal storage

    Publication Year: 1993, Page(s):1428 - 1436
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (600 KB)

    Some multitrees with internal storage data structure are presented for the storage of graphical objects in CAD systems. Memory requirements are as low as those for the very compact quad trees without bisector lists (QWBL). Moreover, multitrees with internal storage (MTIS) are as fast as quad list quad trees (QLQT) for region search operations View full abstract»

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  • Non-isothermal extension of the Scharfetter-Gummel technique for hot carrier transport in heterostructure simulations

    Publication Year: 1993, Page(s):1515 - 1523
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (636 KB)

    Points out that the Scharfetter-Gummel technique is widely used in algorithms for the simulation of isothermal semiconductor devices. Recent interest in the modeling of ultrasmall devices requires a nonisothermal analysis, i.e., a hydrodynamic model. Several nonisothermal extensions to the Scharfetter-Gummel technique for carrier flux have been proposed for homostructure devices. An extension is p... View full abstract»

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  • Improved universal MOSFET electron mobility degradation models for circuit simulation

    Publication Year: 1993, Page(s):1542 - 1546
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (300 KB)

    Based on the physical insights provided by the universal mobility curve, an improved comprehensive universal model for effective electron mobility in inversion layers of n-channel MOSFETs is developed for circuit simulation. This model expresses the effective electron mobility at room temperature as a function of effective vertical field. It exhibits a high degree of accuracy for a wide range of d... View full abstract»

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  • FAMOS: an efficient scheduling algorithm for high-level synthesis

    Publication Year: 1993, Page(s):1437 - 1448
    Cited by:  Papers (19)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1008 KB)

    FAMOS, an iterative improvement scheduling algorithm for the high-level synthesis of digital systems, is described. The algorithm is based on a move acceptance strategy and various selection functions defined to represent the cost of hardware resources such as functional units and registers. A main feature of the algorithm is that it can escape from local minima. The algorithm can deal with divers... View full abstract»

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Aims & Scope

The purpose of this Transactions is to publish papers of interest to individuals in the area of computer-aided design of integrated circuits and systems composed of analog, digital, mixed-signal, optical, or microwave components.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief

VIJAYKRISHNAN NARAYANAN
Pennsylvania State University
Dept. of Computer Science. and Engineering
354D IST Building
University Park, PA 16802, USA
vijay@cse.psu.edu