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IEE Proceedings G - Circuits, Devices and Systems

Issue 3 • June 1989

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Displaying Results 1 - 11 of 11
  • Minimisation technique for series-gated emitter-coupled logic

    Publication Year: 1989, Page(s):105 - 113
    Cited by:  Papers (1)  |  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (699 KB)

    The authors describe a systematic technique to synthesise series-gated emitter-coupled logic (ECL). The technique is applied in an autosynthesis program whereby multilevel ECL circuit schematics are generated automatically from Boolean equation or truth table input.<> View full abstract»

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  • Minimal multiplier realisation of bilinear-LDI digital allpass networks

    Publication Year: 1989, Page(s):114 - 117
    Cited by:  Papers (8)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (317 KB)

    The authors outline a procedure for the bilinear-LDI digital realisation of arbitrary-order stable analogue allpass transfer functions. The salient features of the resulting digital networks are: (i) they are structurally allpass, i.e. their transfer functions are allpass independently of the specific choice of their multiplier coefficient values; (ii) they are minimal in the number of digital mul... View full abstract»

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  • Multipole approximation of capacitively loaded VLSI interconnection

    Publication Year: 1989, Page(s):118 - 120
    Cited by:  Papers (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (179 KB)

    A method for obtaining the multipole approximations of the transfer functions of capacitively loaded uniformly distributed RC lines is proposed. The use of this method for calculating the transients and transient-related parameters of capacitively loaded VLSI interconnections is discussed.<> View full abstract»

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  • Improved 2-port systolic adaptor for wave digital filters

    Publication Year: 1989, Page(s):121 - 125
    Cited by:  Patents (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (426 KB)

    It has been shown previously that a bit-level systolic adaptor can be developed from input/output equations. The design, however, was not fully pipelined and so did not make full use of the power inherent in systolic processors. The authors present an improved architecture which exhibits much higher throughput and CMOS implementation of this is considered. A simple modification to allow internal s... View full abstract»

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  • Iterative solutions for highly doped emitters under illumination

    Publication Year: 1989, Page(s):126 - 127
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (170 KB)

    Iterative solutions are proposed for quasineutral regions with position-dependent composition under illumination. Recently a solution for dark conditions in terms of multiple integral series has been proposed. The authors present a conceptually similar solution, but one which includes the generation term in the continuity equation. This approach has been used to analyse the emitter's internal quan... View full abstract»

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  • Circularly symmetric two-dimensional multiplierless FIR digital filter design using an enhanced McClellan transformation

    Publication Year: 1989, Page(s):129 - 134
    Cited by:  Papers (9)  |  Patents (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (453 KB)

    A new analytical approach to the determination of the coefficients of the 1st-order McClellan transformation is presented. The resultant 1st-order expression can then be used to design 2-D (2-dimensional) lowpass/highpass, bandpass/bandstop and multiband digital filters from the corresponding 1-D digital filters with a high accuracy in the circularity of magnitude response along the passband cut-o... View full abstract»

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  • Parallel computational techniques for simulating dopant diffusion in silicon

    Publication Year: 1989, Page(s):135 - 137
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (273 KB)

    Parallel computational techniques have been used to simulate dopant diffusion in Si (e.g. source/drain fabrication of a CMOS transistor) on an ICL distributed array processor (DAP), a single-instruction multiple-data-stream (SIMD) type machine. The finite element and conjugate gradient methods were used for solution. An order of magnitude reduction in computation time has been achieved.<> View full abstract»

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  • Contact resistance measurements of a MOSFET

    Publication Year: 1989, Page(s):138 - 140
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (263 KB)

    The author examines in detail a recent technique for measuring contact resistance of a MOSFET. It is observed that the equations used for determining the contact resistance based on the 'diode' mode and the 'MOSFET' mode differ by a constant factor depending on the device geometry in the limit when the sheet resistance dominates. Ideally, the ratio of the probe voltage/drain current (V/sub m//I) i... View full abstract»

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  • Simplified Gram-Schmidt preprocessor for broadband tapped delay-line adaptive array

    Publication Year: 1989, Page(s):141 - 149
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (774 KB)

    The author derives a simplified Gram-Schmidt preprocessor for decorrelating the signals in a broadband tapped delay-line adaptive array. After studying the structure of the covariance matrix at a small bandwidth, a two-stage preprocessing structure is proposed. The first stage of preprocessing is independent of the external noise environment, and thus can be designed a priori and can be easily imp... View full abstract»

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  • Pseudoanalogue operation in digital circuits

    Publication Year: 1989, Page(s):150 - 154
    Cited by:  Patents (3)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (402 KB)

    Components such as amplifiers and analogue-digital convertors are not usually available as part of a standard digital gate array system. A technique is presented by which low-level analogue input signals can be amplified and converted into a digital representation using only the digital cells on a standard gate array in conjunction with a few external passive components. An analysis of the basic m... View full abstract»

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  • New floating point impedance simulation using operational amplifiers (comments with reply)

    Publication Year: 1989
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (157 KB)

    For the original article see ibid., vol.135, no.3, p.116-8, 1988. The commenter makes several observations with regard to the simplification of the circuit in question. In reply, the author takes note of these suggestions but claims that his approach offers a greater flexibility of choice among the many available practically viable circuits. He then goes on to justify his claim.<> View full abstract»

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