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Computers, IEEE Transactions on

Issue 2 • Date Feb. 2013

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Title History

Guest Editors' Introduction: Special Section on System-Level Design and Validation of Heterogeneous Chip Multiprocessors

Automatic Generation of Transducer Models for Bus-Based MPSoC Design

UNIVERCM: The UNIversal VERsatile Computational Model for Heterogeneous System Integration

Post-Silicon Code Coverage for Multiprocessor System-on-Chip Designs

Antecedence Graph Approach to Checkpointing for Fault Tolerance in Mobile Agent Systems

A Quick Pessimistic Diagnosis Algorithm for Hypercube-Like Multiprocessor Systems under the PMC Model

Compiler-Directed Energy Reduction Using Dynamic Voltage Scaling and Voltage Islands for Embedded Systems

Efficient Hardware Implementations of BRW Polynomials and Tweakable Enciphering Schemes

Elastic Buffer Flow Control for On-Chip Networks

Fast Deep Packet Inspection with a Dual Finite Automata

LS-Sig: Locality-Sensitive Signatures for Transactional Memory

Optimally Removing Intercore Communication Overhead for Streaming Applications on MPSoCs

Peer-Assisted On-Demand Streaming: Characterizing Demands and Optimizing Supplies

Privacy-Preserving Public Auditing for Secure Cloud Storage

Taming Hardware Event Samples for Precise and Versatile Feedback Directed Optimizations

T-SPaCS—A Two-Level Single-Pass Cache Simulation Methodology

An Adjacent Switching Activity Metric under Functional Broadside Tests

Integer Codes Correcting Burst Errors within a Byte

Call for Papers for new Transactions on Emerging Topics in Computing

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