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IEEE Transactions on Computers

Issue 2 • Date Feb. 1981

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Displaying Results 1 - 17 of 17
  • A fast parallel algorithm for routing in permutation networks

    Publication Year: 1981, Page(s):93 - 100
    Cited by:  Papers (72)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2059 KB)

    An algorithm is given for routing in permutation networks-that is, for computing the switch settings that implement a given permutation. The algorithm takes serial time O(n(log N)2) (for one processor with random access to a memory of O(n) words) or parallel time O((log n)3) (for n synchronous processors with conflict-fr... View full abstract»

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  • Data broadcasting in SIMD computers

    Publication Year: 1981, Page(s):101 - 107
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1925 KB)

    Considers the data broadcasting problem for single instruction stream, multiple data stream (SIMD) computers. Two versions of this problem, i.e., random access read (RAR) and random access write (RAW) are considered. Efficient data broadcasting algorithms are developed for both cases. For the case of a RAR, the complexity of the algorithm is O(q2n) on a q-dimensiona... View full abstract»

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  • General theory of metastable operation

    Publication Year: 1981, Page(s):107 - 115
    Cited by:  Papers (57)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2429 KB)

    Metastable operation is a fundamental phenomenon of sequential networks that process asynchronous inputs. Nevertheless, because of its subtle nature and the relatively low probability of its occurrence in conventional systems, this phenomenon is neither well understood nor widely appreciated. With continuing advances in digital technology, however, there is a growing interest in large-scale highly... View full abstract»

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  • Kronecker products and shuffle algebra

    Publication Year: 1981, Page(s):116 - 125
    Cited by:  Papers (35)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2002 KB)

    Relates three classical concepts, viz. mixed radix number system, Kronecker product of matrices, and perfect shuffle. It presents an algebra which describes the hardware organization of the computation of a product Mv, where M is a matrix in Kronecker product form and v is a vector. The algebraic formalism describes both the blockwise structure of the computation and th... View full abstract»

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  • P-functions: A new tool for the analysis and synthesis of binary programs

    Publication Year: 1981, Page(s):126 - 134
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1760 KB)

    Considers the realization of switching functions by programs composed of certain conditional transfers (binary programs). Methods exist for optimizing binary trees, i.e. binary programs without reconvergent instructions. This paper studies methods for optimizing binary simple programs (programs with possible reconvergent instructions, but where a variable may be tested only once during a computati... View full abstract»

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  • Universality considerations in VLSI circuits

    Publication Year: 1981, Page(s):135 - 140
    Cited by:  Papers (50)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1261 KB)

    The problem of embedding the interconnection pattern of a circuit into a two-dimensional surface of minimal area is discussed. Since even for some natural patterns graphs containing m connections may require Ω(m2) area, in order to achieve compact embeddings restricted classes of graphs have to be considered. For example, arbitrary trees (of bounded degree) can be e... View full abstract»

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  • A generalized algorithm for constructing checking sequences

    Publication Year: 1981, Page(s):141 - 144
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1022 KB)

    An efficient method for constructing checking sequences for strongly connected reduced, synchronous, completely specified, deterministic, sequential machines processing linking homing sequences (LHS) has been described. For machines not possessing an LHS, the only method for constructing a checking sequence requires the use of locating sequences which are often very long. In this correspondence a ... View full abstract»

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  • Bit steering in the minimization of control memory in microprogrammed digital computers

    Publication Year: 1981, Page(s):144 - 147
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1013 KB)

    Presents an algorithm for microprogram control memory width minimization with the bit steering technique. The necessary and sufficient conditions to detect the steerability of two mutually exclusive sets of microcommands are established. The algorithm encodes the microcommands of the sets with a bit steering common part and also extends the theory to multiple (more than two) sets of microcommands. View full abstract»

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  • Comments on “algorithms for reporting and counting geometric intersections”

    Publication Year: 1981, Page(s):147 - 148
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (591 KB)

    Comments on the paper by Bentley and Ottman (ibid., vol.28, p.643-7, 1979) which presents an algorithm for reporting all K intersections among N planar line segments in 0((N+K) log N) time and 0(N+K) storage. With a small modification that storage requirement can be reduced to 0(N) with no increase in computational time, which is important be... View full abstract»

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  • Control memory word width optimization using multiple-valued circuits

    Publication Year: 1981, Page(s):148 - 153
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1371 KB)

    The optimization of read-only memory (ROM) digit dimension for microprogrammed digital computers is considered. The design of integrated injection logic (I2L) multiple valued ROMs is reviewed and designs for corresponding digit-line decoders are presented. Results are presented for determining microoperation groupings that achieve the lower bound digit dimension for multivalued encoding... View full abstract»

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  • Efficient sorting with CCD's and magnetic bubble memories

    Publication Year: 1981, Page(s):153 - 157
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1147 KB)

    The use of sorting in various computer-related applications such as database management, is well established. Normally, sorting is implemented by employing a combination of hardware and software techniques. In this correspondence the authors examine the utility of serial-shifting nature of the charge coupled device (CCD) and the magnetic bubble memories for achieving low-cost sorting within the se... View full abstract»

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  • Comments on “the buffer behavior in computer communication systems”

    Publication Year: 1981, Page(s): 157
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (377 KB)

    Heines1 recently analyzed the buffer behavior in computer communication system under: 1) Poisson arrivals, 2) periodic opportunities for service, 3) random blocking of service, and 4) averaging queue length and delay time observed at customer departure times. Heines' analysis revealed a different result to that of Hsu's [1]. This is because the probability distribution of the buffer con... View full abstract»

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  • Structure specification with a procedural hardware description language

    Publication Year: 1981, Page(s):157 - 161
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1040 KB)

    Describes the extension and formalization of the hardware description language AHPI to form AHPL III. This language provides for nesting AHPL descriptions within descriptions. It incorporates a general index extension mechanism which permits the efficient representation of sets of duplicate descriptions of any complexity. Three types of structures, procedural structures, functional registers, and ... View full abstract»

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  • Synchronization and voting

    Publication Year: 1981, Page(s):161 - 164
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (902 KB)

    This is an elaboration of the paper `Synchronization and matching in redundant systems' by Davies and Wakerly (ibid., vol.27, p.531-9, 1978). The design of voters for synchronization is strongly dependent on the signaling convention used. This correspondence presents voter designs for three different signaling conventions (transition, level, and pulse). The issue of improved voter performance is a... View full abstract»

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  • The topology of cellular partitioning networks

    Publication Year: 1981, Page(s):164 - 168
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (946 KB)

    Investigates generalizations of triangular permuting networks in two directions: the connecting power of cells and the network topology. The main result indicates that permuting, coupling, and partitioning capabilities can be obtained by using 2-, 3-, and 4-state cells, respectively, in a large class of network topologies. View full abstract»

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  • Call for papers

    Publication Year: 1981, Page(s): 1
    Request permission for commercial reuse | PDF file iconPDF (138 KB)
    Freely Available from IEEE
  • Planned special issues

    Publication Year: 1981, Page(s): 1
    Request permission for commercial reuse | PDF file iconPDF (98 KB)
    Freely Available from IEEE

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The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org