IEEE Transactions on Computers

Issue 11 • Nov. 2012

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Displaying Results 1 - 15 of 15
  • Cover1

    Publication Year: 2012, Page(s): c1
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  • Cover2

    Publication Year: 2012, Page(s): c2
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  • Statistical Reliability Estimation of Microprocessor-Based Systems

    Publication Year: 2012, Page(s):1521 - 1534
    Cited by:  Papers (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1588 KB) | HTML iconHTML Multimedia Media

    What is the probability that the execution state of a given microprocessor running a given application is correct, in a certain working environment with a given soft-error rate? Trying to answer this question using fault injection can be very expensive and time consuming. This paper proposes the baseline for a new methodology, based on microprocessor error probability profiling, that aims at estim... View full abstract»

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  • Exploiting Core Working Sets to Filter the L1 Cache with Random Sampling

    Publication Year: 2012, Page(s):1535 - 1550
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2133 KB) | HTML iconHTML

    Locality is often characterized by working sets, defined by Denning as the set of distinct addresses referenced within a certain window of time. This definition ignores the fact that dramatic differences exist between the usage patterns of frequently used data and transient data. We therefore propose to extend Denning's definition with that of core working sets, which identify blocks that are used... View full abstract»

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  • Redundant Floating-Point Decimal CORDIC Algorithm

    Publication Year: 2012, Page(s):1551 - 1562
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (494 KB) | HTML iconHTML Multimedia Media

    In this work, we propose a new decimal redundant CORDIC algorithm to manage transcendental functions, using floating-point representation. The algorithms determine the direction of the elementary rotation using sign estimations. Unlike binary redundant CORDIC, repetition of iterations are not required to ensure convergence since novel decimal codes have been carefully selected with sufficient redu... View full abstract»

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  • Mapping Trigger Conditions onto Trigger Units during Post-silicon Validation and Debugging

    Publication Year: 2012, Page(s):1563 - 1575
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1804 KB) | HTML iconHTML

    On-chip trigger units are employed for detecting events of interest during post-silicon validation and debugging. Their implementation constrains the trigger conditions that can be programmed at runtime. It is often the case that some trigger events of interest, which were not accounted for during design time, cannot be detected due to the constraints imposed by the hardware implementation of the ... View full abstract»

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  • Testing and Diagnosing Comparison Faults of TCAMs with Asymmetric Cells

    Publication Year: 2012, Page(s):1576 - 1587
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1361 KB) | HTML iconHTML

    Ternary content addressable memory (TCAM) is a key component in various digital systems due to its fast lookup operation. Symmetric and asymmetric TCAM cells are two widely used cells for implementing a TCAM array. This paper presents several comparison fault models of TCAMs with asymmetric cells based on electrical defects. Some new comparison faults which do not exist in a TCAM with symmetric ce... View full abstract»

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  • Logic Synthesis for Switching Lattices

    Publication Year: 2012, Page(s):1588 - 1600
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2111 KB) | HTML iconHTML

    This paper studies the implementation of Boolean functions by lattices of four-terminal switches. Each switch is controlled by a Boolean literal. If the literal takes the value 1, the corresponding switch is connected to its four neighbors; else it is not connected. A Boolean function is implemented in terms of connectivity across the lattice: it evaluates to 1 iff there exists a connected path be... View full abstract»

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  • Online Bounds on Balancing Two Independent Criteria with Replication and Reallocation

    Publication Year: 2012, Page(s):1601 - 1610
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (735 KB) | HTML iconHTML

    We study the online bicriteria load balancing problem in this paper. We choose a system of distributed homogeneous file servers located in a cluster as the scenario and propose three online approximate solutions for balancing their loads and required storage spaces upon placements. We first revisit the best existing solution for simple placement (i.e., without replication and reallocation), and re... View full abstract»

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  • Packer: Parallel Garbage Collection Based on Virtual Spaces

    Publication Year: 2012, Page(s):1611 - 1623
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1677 KB) | HTML iconHTML

    The fundamental challenge of garbage collector (GC) design is to maximize the recycled space with minimal time overhead. For efficient memory management, in many GC designs the heap is divided into large object space (LOS) and normal object space (non-LOS). When either space is full, garbage collection is triggered even though the other space may still have plenty of room, thus leading to ineffici... View full abstract»

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  • Subspace Snooping: Exploiting Temporal Sharing Stability for Snoop Reduction

    Publication Year: 2012, Page(s):1624 - 1637
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1677 KB) | HTML iconHTML

    Although snoop-based coherence protocols provide fast cache-to-cache transfers with a simple and robust coherence mechanism, scaling the protocols has been difficult due to the overheads of broadcast snooping. In this paper, we propose a coherence filtering technique called subspace snooping, which stores the potential sharers of each memory page in the page table entry. By using the sharer inform... View full abstract»

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  • Multilayer Bus Optimization for Real-Time Embedded Systems

    Publication Year: 2012, Page(s):1638 - 1650
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1624 KB) | HTML iconHTML Multimedia Media

    A major challenge in the design of multicore embedded systems is how to tackle the communications among tasks with performance requirements and precedence constraints. In this paper, we consider the problem of scheduling real-time tasks over multilayer bus systems with the objective of minimizing the communication cost. We show that the problem is NP-hard and determine the best possible approximat... View full abstract»

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  • Just-in-Time Analytics on Large File Systems

    Publication Year: 2012, Page(s):1651 - 1664
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (679 KB) | HTML iconHTML

    As file systems reach the petabytes scale, users and administrators are increasingly interested in acquiring high-level analytical information for file management and analysis. Two particularly important tasks are the processing of aggregate and top-k queries which, unfortunately, cannot be quickly answered by hierarchical file systems such as ext3 and NTFS. Existing preprocessing-based solutions,... View full abstract»

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  • Cover3

    Publication Year: 2012, Page(s): c3
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  • IEEE Computer Society [Back cover]

    Publication Year: 2012, Page(s): c4
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org