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IEEE Embedded Systems Letters

Issue 3 • Date Sept. 2012

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Displaying Results 1 - 13 of 13
  • Table of contents

    Publication Year: 2012, Page(s): C1
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  • IEEE Embedded Systems Letters publication information

    Publication Year: 2012, Page(s): C2
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  • HDRL: Homogeneous Dual-Rail Logic for DPA Attack Resistive Secure Circuit Design

    Publication Year: 2012, Page(s):57 - 60
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (798 KB) | HTML iconHTML

    Differential power analysis (DPA) attacks find the correlation between power consumption and secret data in crypto-hardware. This letter proposes homogeneous dual-rail logic (HDRL), a standard cell DPA attack countermeasure that theoretically guarantees fully balanced power consumption and significantly improves DPA attack resistivity. Our experimental results on the AES S-Box circuit show that HD... View full abstract»

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  • Scheduling of Accuracy-Constrained Real-Time Systems in Dynamic Environments

    Publication Year: 2012, Page(s):61 - 64
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (514 KB) | HTML iconHTML

    Many real-time embedded systems are sensitive to both the accuracy and timeliness of job results. In this letter, two sources of inaccuracy are considered for such systems: 1) input data noise (IDN) due to the environmental transient noises, and 2) age of data (AD) related to the time of capturing data, which may depend on the length of time between capturing and using the input data. Thus, in the... View full abstract»

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  • Optimized Frame Packing for Embedded Systems

    Publication Year: 2012, Page(s):65 - 68
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (613 KB) | HTML iconHTML

    During system synthesis (i.e., task allocation) the transmission of messages between tasks is usually addressed in a simplistic way. If a message is exchanged via an external bus, it is assumed each message is packed in an individual frame. This assumption leads to an overestimation of bus bandwidth demand and frame response time. For some systems (i.e., automotive), this pessimism is not acceptab... View full abstract»

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  • Zebra: Building Efficient Network Message Parsers for Embedded Systems

    Publication Year: 2012, Page(s):69 - 72
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (356 KB) | HTML iconHTML

    Supporting standard text-based protocols in embedded systems is challenging because of the often limited computational resources that embedded systems provide. To overcome this issue, a promising approach is to build parsers directly in the hardware. Unfortunately, developing such parsers is a daunting task for most developers as it is at the crossroads of several areas of expertise, such as low-l... View full abstract»

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  • Bandwidth-Sensitivity-Aware Arbitration for FPGAs

    Publication Year: 2012, Page(s):73 - 76
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (521 KB) | HTML iconHTML

    Field-programmable gate arrays (FPGAs) commonly implement massively parallel circuits that require significant memory bandwidth. Due to I/O and memory limitations, parallel tasks often share bandwidth via arbitration, whose efficiency is critical to ensure parallelism is not wasted. In this letter, we introduce a bandwidth-sensitivity-aware heuristic for arbitration that analyzes the effect of mem... View full abstract»

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  • Special Issue on Rigorous Modeling and Analysis of Cyber-Physical Systems

    Publication Year: 2012, Page(s): 77
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  • Cali for participation - ESWEEK 2012- http://www.esweek.org

    Publication Year: 2012, Page(s): 78
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  • IEEE Xplore Digital Library [advertisement]

    Publication Year: 2012, Page(s): 79
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  • IEEE Foundation [advertisement]

    Publication Year: 2012, Page(s): 80
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  • IEEE Embedded Systems Letters information for authors

    Publication Year: 2012, Page(s): C3
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  • [Blank page - back cover]

    Publication Year: 2012, Page(s): C4
    Cited by:  Papers (1)
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Aims & Scope

The IEEE Embedded Systems Letters (ESL), provides a forum for rapid dissemination of latest technical advances in embedded systems and related areas in embedded software.

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Meet Our Editors

EDITOR-IN-CHIEF
Sri Parameswaran
School of Computer Science and Engineering
University of New South Wales

DEPUTY EDITOR-IN-CHIEF
Tulika Mitra
School of Computing
National University of Singapore